BRPI0914051A2 - "estrutura de cobertura de metal descontínua / não uniforme para integração de interconexão e respectivo método de fabricação" - Google Patents

"estrutura de cobertura de metal descontínua / não uniforme para integração de interconexão e respectivo método de fabricação"

Info

Publication number
BRPI0914051A2
BRPI0914051A2 BRPI0914051A BRPI0914051A BRPI0914051A2 BR PI0914051 A2 BRPI0914051 A2 BR PI0914051A2 BR PI0914051 A BRPI0914051 A BR PI0914051A BR PI0914051 A BRPI0914051 A BR PI0914051A BR PI0914051 A2 BRPI0914051 A2 BR PI0914051A2
Authority
BR
Brazil
Prior art keywords
discontinuous
manufacturing
roof structure
metal roof
uniform metal
Prior art date
Application number
BRPI0914051A
Other languages
English (en)
Inventor
Chao-Kun Hu
Chin-Chao Yang
Lynne M Gignac
Surbhi Mittal
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BRPI0914051A2 publication Critical patent/BRPI0914051A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/041—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being discontinuous
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6548—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
BRPI0914051A 2008-10-08 2009-07-21 "estrutura de cobertura de metal descontínua / não uniforme para integração de interconexão e respectivo método de fabricação" BRPI0914051A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/247,632 US8823176B2 (en) 2008-10-08 2008-10-08 Discontinuous/non-uniform metal cap structure and process for interconnect integration
PCT/US2009/051226 WO2010042265A1 (en) 2008-10-08 2009-07-21 Discontinuous/non-uniform metal cap structure and process for interconnect integration

Publications (1)

Publication Number Publication Date
BRPI0914051A2 true BRPI0914051A2 (pt) 2015-11-03

Family

ID=42075150

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0914051A BRPI0914051A2 (pt) 2008-10-08 2009-07-21 "estrutura de cobertura de metal descontínua / não uniforme para integração de interconexão e respectivo método de fabricação"

Country Status (8)

Country Link
US (2) US8823176B2 (pt)
EP (1) EP2342743A4 (pt)
KR (1) KR20110083636A (pt)
CN (1) CN102171810A (pt)
BR (1) BRPI0914051A2 (pt)
SG (1) SG188903A1 (pt)
TW (1) TW201027684A (pt)
WO (1) WO2010042265A1 (pt)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8211776B2 (en) 2010-01-05 2012-07-03 International Business Machines Corporation Integrated circuit line with electromigration barriers
US8796853B2 (en) 2012-02-24 2014-08-05 International Business Machines Corporation Metallic capped interconnect structure with high electromigration resistance and low resistivity
US9076847B2 (en) 2013-01-18 2015-07-07 International Business Machines Corporation Selective local metal cap layer formation for improved electromigration behavior
US9123726B2 (en) 2013-01-18 2015-09-01 International Business Machines Corporation Selective local metal cap layer formation for improved electromigration behavior
US8962479B2 (en) * 2013-05-10 2015-02-24 International Business Machines Corporation Interconnect structures containing nitrided metallic residues
US8906799B1 (en) 2013-07-29 2014-12-09 International Business Machines Corporation Random local metal cap layer formation for improved integrated circuit reliability
WO2015030803A1 (en) 2013-08-30 2015-03-05 Hewlett-Packard Development Company, Lp Substrate etch
US10699945B2 (en) * 2018-10-04 2020-06-30 International Business Machines Corporation Back end of line integration for interconnects
US11239165B2 (en) 2020-03-10 2022-02-01 International Business Machines Corporation Method of forming an interconnect structure with enhanced corner connection
US12157943B2 (en) 2020-09-03 2024-12-03 Applied Materials, Inc. Methods of selective deposition
US12334442B2 (en) 2022-08-31 2025-06-17 International Business Machines Corporation Dielectric caps for power and signal line routing

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5300813A (en) * 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US5695810A (en) * 1996-11-20 1997-12-09 Cornell Research Foundation, Inc. Use of cobalt tungsten phosphide as a barrier material for copper metallization
US6147009A (en) * 1998-06-29 2000-11-14 International Business Machines Corporation Hydrogenated oxidized silicon carbon material
US6342733B1 (en) * 1999-07-27 2002-01-29 International Business Machines Corporation Reduced electromigration and stressed induced migration of Cu wires by surface coating
EP1418619A4 (en) * 2001-08-13 2010-09-08 Ebara Corp SEMICONDUCTOR COMPONENTS AND MANUFACTURING METHOD THEREFOR AND PLATING SOLUTION
US7404985B2 (en) * 2002-06-04 2008-07-29 Applied Materials, Inc. Noble metal layer formation for copper film deposition
US6821909B2 (en) * 2002-10-30 2004-11-23 Applied Materials, Inc. Post rinse to improve selective deposition of electroless cobalt on copper for ULSI application
US7279423B2 (en) * 2002-10-31 2007-10-09 Intel Corporation Forming a copper diffusion barrier
US6706625B1 (en) * 2002-12-06 2004-03-16 Chartered Semiconductor Manufacturing Ltd. Copper recess formation using chemical process for fabricating barrier cap for lines and vias
US6975032B2 (en) * 2002-12-16 2005-12-13 International Business Machines Corporation Copper recess process with application to selective capping and electroless plating
KR100519169B1 (ko) * 2003-05-09 2005-10-06 매그나칩 반도체 유한회사 반도체 소자의 금속배선 형성방법
US6955984B2 (en) * 2003-05-16 2005-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. Surface treatment of metal interconnect lines
US20040262772A1 (en) * 2003-06-30 2004-12-30 Shriram Ramanathan Methods for bonding wafers using a metal interlayer
US7008871B2 (en) * 2003-07-03 2006-03-07 International Business Machines Corporation Selective capping of copper wiring
US7074719B2 (en) * 2003-11-28 2006-07-11 International Business Machines Corporation ALD deposition of ruthenium
US7170050B2 (en) * 2004-09-17 2007-01-30 Pacific Biosciences Of California, Inc. Apparatus and methods for optical analysis of molecules
US20060068588A1 (en) 2004-09-30 2006-03-30 Tokyo Electron Limited Low-pressure deposition of ruthenium and rhenium metal layers from metal carbonyl precursors
US7476618B2 (en) * 2004-10-26 2009-01-13 Asm Japan K.K. Selective formation of metal layers in an integrated circuit
JP2006179599A (ja) * 2004-12-21 2006-07-06 Toshiba Corp 半導体装置およびその製造方法
US20060205204A1 (en) * 2005-03-14 2006-09-14 Michael Beck Method of making a semiconductor interconnect with a metal cap
WO2007003223A1 (en) * 2005-07-04 2007-01-11 Freescale Semiconductor, Inc. Method and apparatus for forming a noble metal layer, notably on inlaid metal features
JP2007035734A (ja) * 2005-07-25 2007-02-08 Nec Electronics Corp 半導体装置およびその製造方法
US7446034B2 (en) * 2005-10-06 2008-11-04 Taiwan Semiconductor Manufacturing Co., Ltd. Process for making a metal seed layer
US7435674B2 (en) * 2006-03-27 2008-10-14 International Business Machines Corporation Dielectric interconnect structures and methods for forming the same
US20080054466A1 (en) * 2006-08-31 2008-03-06 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing semiconductor device
JP2008172051A (ja) * 2007-01-12 2008-07-24 Nec Electronics Corp 半導体装置およびその製造方法
US20080197499A1 (en) * 2007-02-15 2008-08-21 International Business Machines Corporation Structure for metal cap applications
US7776740B2 (en) * 2008-01-22 2010-08-17 Tokyo Electron Limited Method for integrating selective low-temperature ruthenium deposition into copper metallization of a semiconductor device
US7737528B2 (en) * 2008-06-03 2010-06-15 International Business Machines Corporation Structure and method of forming electrically blown metal fuses for integrated circuits

Also Published As

Publication number Publication date
US8889546B2 (en) 2014-11-18
US20120329271A1 (en) 2012-12-27
SG188903A1 (en) 2013-04-30
EP2342743A4 (en) 2012-05-16
US20100084767A1 (en) 2010-04-08
EP2342743A1 (en) 2011-07-13
CN102171810A (zh) 2011-08-31
KR20110083636A (ko) 2011-07-20
TW201027684A (en) 2010-07-16
US8823176B2 (en) 2014-09-02
WO2010042265A1 (en) 2010-04-15

Similar Documents

Publication Publication Date Title
BRPI0821371A2 (pt) Dispositivos fotovoltaicos e respectivo método de fabrico
DE602007000863D1 (de) Fahrzeugdachaufbau
TWI365528B (en) Semiconductor structure and method for manufacturing the same
DE602006021036D1 (de) Substituierte benzimidazole und herstellungsverfahren dafür
GB0820469D0 (en) Double layer cable-strut roof structure
EP2021576A4 (en) EXTENSION TUBE AND METHOD OF MANUFACTURE
DK2107865T3 (da) Køretøj til udbringning af gylle
EP2342743A4 (en) DISCONTINUOUS / NON-UNIFORM METAL CAP STRUCTURE AND METHOD OF CONNECTING INTEGRATION THEREFOR
DE602008001588D1 (de) Schleifenantenne und Herstellungsverfahren für die Schleifenantenne
EP2187073A4 (en) BEARING STRUCTURE AND MANUFACTURING METHOD THEREFOR
EP2118392A4 (en) SLAB STRUCTURE AND METHOD OF MANUFACTURING THE SAME
FI20085660L (fi) Järjestelmä kattoristikoiden tai sentapaisten rakenteiden valmistamiseksi
EP2055671A4 (en) METAL PHOSPHATE
DE602007014189D1 (de) Ushout-ram
BRPI0816674A2 (pt) Purificação de metais
EP2123376A4 (en) CAP STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
DE502007006990D1 (de) Tragsystem aus stahl für dachkonstruktionen
EP2159434A4 (en) METAL ANTIFRICTION
FI20040503L (fi) Menetelmä kuormaa kantavien elementtien valmistamiseksi
EP1907641A4 (en) BALCONY STRUCTURE AND MANUFACTURING METHOD THEREFOR
TWI365503B (en) Chip structure and forming method thereof
EP2021559A4 (en) ROOF AND ITS MANUFACTURING METHOD
GB2470976B (en) Truss girder and method for constructing the same
TWI366247B (en) Interconnection structure and fabricating method thereof
FI20060590L (fi) Nanohiukkasten valmistus

Legal Events

Date Code Title Description
B06T Formal requirements before examination [chapter 6.20 patent gazette]
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 23/07/2019, OBSERVADAS AS CONDICOES LEGAIS. (CO) 10 (DEZ) ANOS CONTADOS A PARTIR DE 23/07/2019, OBSERVADAS AS CONDICOES LEGAIS