BRPI0916611A2 - circuito de comparador e dispositivo de exibição guarnecido com o mesmo - Google Patents

circuito de comparador e dispositivo de exibição guarnecido com o mesmo

Info

Publication number
BRPI0916611A2
BRPI0916611A2 BRPI0916611A BRPI0916611A BRPI0916611A2 BR PI0916611 A2 BRPI0916611 A2 BR PI0916611A2 BR PI0916611 A BRPI0916611 A BR PI0916611A BR PI0916611 A BRPI0916611 A BR PI0916611A BR PI0916611 A2 BRPI0916611 A2 BR PI0916611A2
Authority
BR
Brazil
Prior art keywords
display device
same
comparator circuit
device fitted
fitted
Prior art date
Application number
BRPI0916611A
Other languages
English (en)
Inventor
Christopher Brown
Yasuyuki Ogawa
Original Assignee
Sharp Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kk filed Critical Sharp Kk
Publication of BRPI0916611A2 publication Critical patent/BRPI0916611A2/pt

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0018—Special modifications or use of the back gate voltage of a FET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6215—Fin field-effect transistors [FinFET] having multiple independently-addressable gate electrodes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
  • Manipulation Of Pulses (AREA)
BRPI0916611A 2008-07-30 2009-03-17 circuito de comparador e dispositivo de exibição guarnecido com o mesmo BRPI0916611A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008196147 2008-07-30
PCT/JP2009/055174 WO2010013508A1 (ja) 2008-07-30 2009-03-17 比較回路およびこれを備えた表示装置

Publications (1)

Publication Number Publication Date
BRPI0916611A2 true BRPI0916611A2 (pt) 2015-11-10

Family

ID=41610218

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0916611A BRPI0916611A2 (pt) 2008-07-30 2009-03-17 circuito de comparador e dispositivo de exibição guarnecido com o mesmo

Country Status (7)

Country Link
US (1) US8289053B2 (pt)
EP (1) EP2306645B1 (pt)
JP (1) JP5047359B2 (pt)
CN (1) CN102077466B (pt)
BR (1) BRPI0916611A2 (pt)
RU (1) RU2449468C1 (pt)
WO (1) WO2010013508A1 (pt)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107195328B (zh) 2009-10-09 2020-11-10 株式会社半导体能源研究所 移位寄存器和显示装置以及其驱动方法
KR101863199B1 (ko) * 2011-02-10 2018-07-02 삼성디스플레이 주식회사 인버터 및 이를 이용한 주사 구동부
DE102011013529B4 (de) * 2011-03-10 2013-11-21 Texas Instruments Deutschland Gmbh Leistungsversorgungs-Auswahleinrichtung und Verfahren zum Minimieren eines Einschaltstroms in einer Leistungsversorgungs-Auswahleinrichtung und Leistungsversorgungs-Auswahlsystem
US9525407B2 (en) * 2013-03-13 2016-12-20 Analog Devices Global Power monitoring circuit, and a power up reset generator
US9632521B2 (en) 2013-03-13 2017-04-25 Analog Devices Global Voltage generator, a method of generating a voltage and a power-up reset circuit
JP6392603B2 (ja) * 2013-09-27 2018-09-19 株式会社半導体エネルギー研究所 半導体装置
CN104092448B (zh) * 2014-06-18 2017-05-31 京东方科技集团股份有限公司 比较器、显示基板和显示装置
US9397622B2 (en) * 2014-10-31 2016-07-19 Stmicroelectronics International N.V. Programmable hysteresis comparator
CN105280141B (zh) * 2015-11-11 2017-11-07 北京大学 一种oled显示像素电路及驱动方法
KR102780541B1 (ko) * 2019-09-24 2025-03-12 삼성디스플레이 주식회사 화소 회로 및 이를 포함하는 표시 장치
US20230421155A1 (en) * 2022-06-24 2023-12-28 Gn Hearing A/S Level shifter circuit with back gate controled transistors
US12395763B2 (en) * 2022-08-05 2025-08-19 Samsung Electronics Co., Ltd. Analog-digital converting circuit including comparator, and image sensor including the analog-digital converting circuit
KR20250057228A (ko) * 2023-10-19 2025-04-29 삼성디스플레이 주식회사 픽셀 회로
CN119479558B (zh) * 2024-10-28 2026-01-30 京东方科技集团股份有限公司 移位寄存器、栅极驱动电路和显示装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU1126943A1 (ru) 1983-03-17 1984-11-30 Государственное Союзное Конструкторско-Технологическое Бюро Специализированных Полупроводниковых Микросхем Компаратор на МДП-транзисторах
SU1688398A1 (ru) 1989-06-21 1991-10-30 Новосибирский электротехнический институт связи им.Н.Д.Псурцева Компаратор напр жений
JPH0470003A (ja) 1990-07-09 1992-03-05 Nec Eng Ltd Ｒｓフリップフロップ回路
JP2870629B2 (ja) 1994-10-13 1999-03-17 日本電気株式会社 論理回路
DE69613983T2 (de) 1996-10-30 2002-04-04 Stmicroelectronics S.R.L., Agrate Brianza Spannungsvergleicher mit mindestens einem Isolierschicht-MOS-Transistor und damit ausgerüstete Analog-Digital-Wandler
JP2001085988A (ja) 1999-09-16 2001-03-30 Matsushita Electric Ind Co Ltd 信号レベル変換回路および信号レベル変換回路を備えたアクティブマトリクス型液晶表示装置
JP3655182B2 (ja) 2000-10-04 2005-06-02 株式会社東芝 半導体集積回路
US6462585B1 (en) * 2001-02-20 2002-10-08 International Business Machines Corporation High performance CPL double-gate latch
JP4257971B2 (ja) * 2003-03-27 2009-04-30 独立行政法人産業技術総合研究所 二重ゲート電界効果トランジスタのゲート信号印加方法
US7579877B2 (en) * 2005-08-15 2009-08-25 Winbond Electronics Corporation Comparator
JP2007157986A (ja) 2005-12-05 2007-06-21 Sharp Corp トランジスタを備えた装置
JP4498398B2 (ja) * 2007-08-13 2010-07-07 株式会社東芝 比較器及びこれを用いたアナログ−デジタル変換器

Also Published As

Publication number Publication date
RU2449468C1 (ru) 2012-04-27
WO2010013508A1 (ja) 2010-02-04
CN102077466A (zh) 2011-05-25
CN102077466B (zh) 2014-01-15
EP2306645A1 (en) 2011-04-06
US20110068829A1 (en) 2011-03-24
EP2306645A4 (en) 2011-08-03
JPWO2010013508A1 (ja) 2012-01-05
US8289053B2 (en) 2012-10-16
EP2306645B1 (en) 2012-08-22
JP5047359B2 (ja) 2012-10-10

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 7A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2383 DE 06-09-2016 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.