CA1150367A - Circuit de division de frequence par un nombre impair pour train d'impulsions - Google Patents

Circuit de division de frequence par un nombre impair pour train d'impulsions

Info

Publication number
CA1150367A
CA1150367A CA000373034A CA373034A CA1150367A CA 1150367 A CA1150367 A CA 1150367A CA 000373034 A CA000373034 A CA 000373034A CA 373034 A CA373034 A CA 373034A CA 1150367 A CA1150367 A CA 1150367A
Authority
CA
Canada
Prior art keywords
pulse train
output
input terminal
shift register
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000373034A
Other languages
English (en)
Inventor
Yasuo Nakazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Application granted granted Critical
Publication of CA1150367A publication Critical patent/CA1150367A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/502Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two
    • H03K23/505Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two with a base which is an odd number

Landscapes

  • Manipulation Of Pulses (AREA)
  • Pulse Circuits (AREA)
CA000373034A 1980-03-17 1981-03-16 Circuit de division de frequence par un nombre impair pour train d'impulsions Expired CA1150367A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3267580A JPS56129431A (en) 1980-03-17 1980-03-17 Frequency dividing circuit for odd number
JP32675/1980 1980-03-17

Publications (1)

Publication Number Publication Date
CA1150367A true CA1150367A (fr) 1983-07-19

Family

ID=12365442

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000373034A Expired CA1150367A (fr) 1980-03-17 1981-03-16 Circuit de division de frequence par un nombre impair pour train d'impulsions

Country Status (2)

Country Link
JP (1) JPS56129431A (fr)
CA (1) CA1150367A (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6242617A (ja) * 1985-08-19 1987-02-24 Nec Corp 奇数分周カウンタ
JPS6381424U (fr) * 1986-11-12 1988-05-28
JPS63185323U (fr) * 1987-05-20 1988-11-29
JPH034618A (ja) * 1989-05-31 1991-01-10 Nec Eng Ltd クロック分周回路
JPH04195999A (ja) * 1990-11-28 1992-07-15 Fujitsu Ltd 順序論理回路
US6995589B2 (en) 2003-06-13 2006-02-07 Via Technologies Inc. Frequency divider for RF transceiver

Also Published As

Publication number Publication date
JPS56129431A (en) 1981-10-09

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Legal Events

Date Code Title Description
MKEX Expiry