CA1161969A - Methode de fabrication de semiconducteurs par recuit au laser - Google Patents

Methode de fabrication de semiconducteurs par recuit au laser

Info

Publication number
CA1161969A
CA1161969A CA000402487A CA402487A CA1161969A CA 1161969 A CA1161969 A CA 1161969A CA 000402487 A CA000402487 A CA 000402487A CA 402487 A CA402487 A CA 402487A CA 1161969 A CA1161969 A CA 1161969A
Authority
CA
Canada
Prior art keywords
polysilicon
layer
antireflective coating
laser
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000402487A
Other languages
English (en)
Inventor
Abdalla A.H. Naem
Iain D. Calder
Hussein M. Naguib
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Priority to CA000402487A priority Critical patent/CA1161969A/fr
Application granted granted Critical
Publication of CA1161969A publication Critical patent/CA1161969A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/66Wet etching of conductive or resistive materials
    • H10P50/663Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667Wet etching of conductive or resistive materials by chemical means only by liquid etching only

Landscapes

  • Recrystallisation Techniques (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CA000402487A 1982-05-07 1982-05-07 Methode de fabrication de semiconducteurs par recuit au laser Expired CA1161969A (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000402487A CA1161969A (fr) 1982-05-07 1982-05-07 Methode de fabrication de semiconducteurs par recuit au laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA000402487A CA1161969A (fr) 1982-05-07 1982-05-07 Methode de fabrication de semiconducteurs par recuit au laser

Publications (1)

Publication Number Publication Date
CA1161969A true CA1161969A (fr) 1984-02-07

Family

ID=4122728

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000402487A Expired CA1161969A (fr) 1982-05-07 1982-05-07 Methode de fabrication de semiconducteurs par recuit au laser

Country Status (1)

Country Link
CA (1) CA1161969A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994027326A1 (fr) * 1993-05-12 1994-11-24 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V., Berlin Dispositif electronique a electrodes microstructurees et son procede de fabrication

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994027326A1 (fr) * 1993-05-12 1994-11-24 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V., Berlin Dispositif electronique a electrodes microstructurees et son procede de fabrication
US5810945A (en) * 1993-05-12 1998-09-22 Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. Method of fabricating an electronic micropatterned electrode device

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