CA1224574A - Systeme de controle de transfert de donnees entre domaines logiques - Google Patents

Systeme de controle de transfert de donnees entre domaines logiques

Info

Publication number
CA1224574A
CA1224574A CA000471916A CA471916A CA1224574A CA 1224574 A CA1224574 A CA 1224574A CA 000471916 A CA000471916 A CA 000471916A CA 471916 A CA471916 A CA 471916A CA 1224574 A CA1224574 A CA 1224574A
Authority
CA
Canada
Prior art keywords
data
area
register
logical
inter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000471916A
Other languages
English (en)
Inventor
Takatoshi Ishii
Ryozo Yamashita
Kazuhiko Nishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ASCII Corp
Original Assignee
ASCII Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ASCII Corp filed Critical ASCII Corp
Application granted granted Critical
Publication of CA1224574A publication Critical patent/CA1224574A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Memory System (AREA)
CA000471916A 1984-01-12 1985-01-11 Systeme de controle de transfert de donnees entre domaines logiques Expired CA1224574A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59002710A JPS60147785A (ja) 1984-01-12 1984-01-12 論理領域間デ−タ移動制御装置
JP2,710/1984 1984-01-12

Publications (1)

Publication Number Publication Date
CA1224574A true CA1224574A (fr) 1987-07-21

Family

ID=11536852

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000471916A Expired CA1224574A (fr) 1984-01-12 1985-01-11 Systeme de controle de transfert de donnees entre domaines logiques

Country Status (3)

Country Link
EP (1) EP0150453A3 (fr)
JP (1) JPS60147785A (fr)
CA (1) CA1224574A (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777485A (en) * 1985-09-13 1988-10-11 Sun Microsystems, Inc. Method and apparatus for DMA window display
GB2180729B (en) * 1985-09-13 1989-10-11 Sun Microsystems Inc Method and apparatus for dma window display
US4806921A (en) * 1985-10-04 1989-02-21 Ateq Corporation Rasterizer for pattern generator
EP0228745A3 (fr) * 1985-12-30 1990-03-28 Koninklijke Philips Electronics N.V. Dispositif de contrôle d'affichage vidéo à balayage à trame comportant une antémémoire de mise à jour, antémémoire de mise à jour pour application dans un tel dispositif de contrôle, et terminal d'affichage comportant un tel dispositif de contrôle
US4884069A (en) * 1987-03-19 1989-11-28 Apple Computer, Inc. Video apparatus employing VRAMs
US5113180A (en) * 1988-04-20 1992-05-12 International Business Machines Corporation Virtual display adapter
AU617006B2 (en) * 1988-09-29 1991-11-14 Canon Kabushiki Kaisha Data processing system and apparatus
KR100219758B1 (ko) * 1992-06-29 1999-09-01 구라우치 노리타카 알루미늄 합금제 오일펌프
JP2729151B2 (ja) * 1994-10-19 1998-03-18 日本電気アイシーマイコンシステム株式会社 記憶制御装置
TW335472B (en) * 1996-06-20 1998-07-01 Cirus Logic Inc Method and apparatus for transferring pixel data stored in a memory circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5596988A (en) * 1979-01-19 1980-07-23 Tokyo Shibaura Electric Co Crt display unit

Also Published As

Publication number Publication date
JPS60147785A (ja) 1985-08-03
EP0150453A3 (fr) 1987-09-16
EP0150453A2 (fr) 1985-08-07

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Legal Events

Date Code Title Description
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