CA1304521C - Methode de reconnaissance automatique pour memoire - Google Patents

Methode de reconnaissance automatique pour memoire

Info

Publication number
CA1304521C
CA1304521C CA000563642A CA563642A CA1304521C CA 1304521 C CA1304521 C CA 1304521C CA 000563642 A CA000563642 A CA 000563642A CA 563642 A CA563642 A CA 563642A CA 1304521 C CA1304521 C CA 1304521C
Authority
CA
Canada
Prior art keywords
memory
state
coupled
bit lines
host processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA000563642A
Other languages
English (en)
Inventor
Rodger Mohme
Jerome Okun
R. Steven Smith
Michael De La Cruz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Apple Inc
Original Assignee
Apple Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Computer Inc filed Critical Apple Computer Inc
Application granted granted Critical
Publication of CA1304521C publication Critical patent/CA1304521C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CA000563642A 1987-04-11 1988-04-08 Methode de reconnaissance automatique pour memoire Expired - Lifetime CA1304521C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US4807487A 1987-04-11 1987-04-11
US048,074 1987-04-11

Publications (1)

Publication Number Publication Date
CA1304521C true CA1304521C (fr) 1992-06-30

Family

ID=21952606

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000563642A Expired - Lifetime CA1304521C (fr) 1987-04-11 1988-04-08 Methode de reconnaissance automatique pour memoire

Country Status (4)

Country Link
CA (1) CA1304521C (fr)
GB (1) GB2204163B (fr)
HK (1) HK26292A (fr)
SG (1) SG4092G (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2226666B (en) * 1988-12-30 1993-07-07 Intel Corp Request/response protocol
US5471637A (en) * 1988-12-30 1995-11-28 Intel Corporation Method and apparatus for conducting bus transactions between two clock independent bus agents of a computer system using a transaction by transaction deterministic request/response protocol and burst transfer
GB2232511B (en) * 1989-05-19 1993-08-25 Research Machines Ltd Self configuring memory system
EP0419869A3 (en) * 1989-09-29 1992-06-03 Kabushiki Kaisha Toshiba Personal computer for accessing two types of extended memories having different memory capacities
JP2801372B2 (ja) * 1990-06-28 1998-09-21 キヤノン株式会社 信号処理システム，装置及び記憶装置
US5850573A (en) * 1990-08-16 1998-12-15 Canon Kabushiki Kaisha Control method for peripheral device in host computer connectable to a plurality of peripheral devices
US5522064A (en) * 1990-10-01 1996-05-28 International Business Machines Corporation Data processing apparatus for dynamically setting timings in a dynamic memory system
KR100335504B1 (ko) * 2000-06-30 2002-05-09 윤종용 제어 및 어드레스 버스를 공유하는 2채널 메모리 시스템및 이에 채용되는 메모리 모듈

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4558416A (en) * 1983-05-27 1985-12-10 Allied Corporation Method for maintaining the integrity of a dual microprocessor multiprocessing computing system
NZ209664A (en) * 1983-09-29 1987-05-29 Tandem Computers Inc Memory board address assignments: automatic reconfiguration
DE3586557D1 (de) * 1984-10-26 1992-10-01 Ibm Datenverarbeitungsvorrichtung mit festem adressraum und variablem speicher.
AU579725B2 (en) * 1985-05-02 1988-12-08 Digital Equipment Corporation Arrangement for expanding memory capacity
GB8725111D0 (en) * 1987-03-13 1987-12-02 Ibm Data processing system

Also Published As

Publication number Publication date
GB2204163A (en) 1988-11-02
HK26292A (en) 1992-04-16
GB8807597D0 (en) 1988-05-05
GB2204163B (en) 1991-10-16
SG4092G (en) 1992-05-22

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