CA1310076C - Circuit logique rapide a retroaction de blocage du courant dans l'etage de sortie - Google Patents

Circuit logique rapide a retroaction de blocage du courant dans l'etage de sortie

Info

Publication number
CA1310076C
CA1310076C CA000590944A CA590944A CA1310076C CA 1310076 C CA1310076 C CA 1310076C CA 000590944 A CA000590944 A CA 000590944A CA 590944 A CA590944 A CA 590944A CA 1310076 C CA1310076 C CA 1310076C
Authority
CA
Canada
Prior art keywords
fet
output
gate electrode
output terminal
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA000590944A
Other languages
English (en)
Inventor
David E. Fulkerson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell Inc
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/179,794 external-priority patent/US4810969A/en
Application filed by Honeywell Inc filed Critical Honeywell Inc
Application granted granted Critical
Publication of CA1310076C publication Critical patent/CA1310076C/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
CA000590944A 1987-06-23 1989-02-14 Circuit logique rapide a retroaction de blocage du courant dans l'etage de sortie Expired - Lifetime CA1310076C (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US6547987A 1987-06-23 1987-06-23
US07/065,479 1987-06-23
US07/179,794 US4810969A (en) 1987-06-23 1988-04-11 High speed logic circuit having feedback to prevent current in the output stage
US07/179,794 1988-04-11

Publications (1)

Publication Number Publication Date
CA1310076C true CA1310076C (fr) 1992-11-10

Family

ID=26745643

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000590944A Expired - Lifetime CA1310076C (fr) 1987-06-23 1989-02-14 Circuit logique rapide a retroaction de blocage du courant dans l'etage de sortie

Country Status (1)

Country Link
CA (1) CA1310076C (fr)

Similar Documents

Publication Publication Date Title
US4810969A (en) High speed logic circuit having feedback to prevent current in the output stage
KR950009087B1 (ko) 반도체 집적회로의 출력회로
KR100302251B1 (ko) 동적임계치mos트랜지스터를사용한버퍼
US6624672B2 (en) Output buffer with constant switching current
US4958089A (en) High output drive FET buffer for providing high initial current to a subsequent stage
US5124579A (en) Cmos output buffer circuit with improved ground bounce
US5013940A (en) Multi stage slew control for an IC output circuit
EP0329285B1 (fr) Tampon de sortie
EP0678983B1 (fr) Circuit intégré pour commander la vitesse de montée de courant d'un tampon de sortie
EP0282702B1 (fr) Circuit logique BIFET
US4614882A (en) Bus transceiver including compensation circuit for variations in electrical characteristics of components
US6593795B2 (en) Level adjustment circuit and data output circuit thereof
US4740717A (en) Switching device with dynamic hysteresis
US5973552A (en) Power savings technique in solid state integrated circuits
GB2184622A (en) Output buffer having limited rate-of-change of output current
JPH07502135A (ja) 負荷に応じてプログラム可能な出力バッファ構造
WO1995008872A1 (fr) Procede et appareil permettant a une porte logique dynamique d'avoir un fonctionnement statique
JPH05267603A (ja) 集積回路
JPH01815A (ja) Ｂｉｆｅｔ論理回路
US6366114B1 (en) Output buffer with control circuitry
US6064223A (en) Low leakage circuit configuration for MOSFET circuits
KR920003440B1 (ko) 중간전위생성회로
EP0139904B1 (fr) Circuit de commande à trois-états destiné à un circuit d'attaque
US20030048670A1 (en) Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same
US5408145A (en) Low power consumption and high speed NOR gate integrated circuit

Legal Events

Date Code Title Description
MKEX Expiry