CA2036855C - Processeur utilisant des instructions independantes du format des donnees - Google Patents

Processeur utilisant des instructions independantes du format des donnees

Info

Publication number
CA2036855C
CA2036855C CA002036855A CA2036855A CA2036855C CA 2036855 C CA2036855 C CA 2036855C CA 002036855 A CA002036855 A CA 002036855A CA 2036855 A CA2036855 A CA 2036855A CA 2036855 C CA2036855 C CA 2036855C
Authority
CA
Canada
Prior art keywords
processor
data format
data
instruction
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002036855A
Other languages
English (en)
Other versions
CA2036855A1 (fr
Inventor
Gary T. Corcoran
Robert Charles Fairfield
Akkas T. Sufi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of CA2036855A1 publication Critical patent/CA2036855A1/fr
Application granted granted Critical
Publication of CA2036855C publication Critical patent/CA2036855C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
CA002036855A 1990-03-13 1991-02-21 Processeur utilisant des instructions independantes du format des donnees Expired - Fee Related CA2036855C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/493,018 US5446865A (en) 1990-03-13 1990-03-13 Processor adapted for sharing memory with more than one type of processor
US493,018 1990-03-13

Publications (2)

Publication Number Publication Date
CA2036855A1 CA2036855A1 (fr) 1991-09-14
CA2036855C true CA2036855C (fr) 1996-08-13

Family

ID=23958558

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002036855A Expired - Fee Related CA2036855C (fr) 1990-03-13 1991-02-21 Processeur utilisant des instructions independantes du format des donnees

Country Status (5)

Country Link
US (1) US5446865A (fr)
EP (1) EP0447101B1 (fr)
JP (1) JP2690406B2 (fr)
CA (1) CA2036855C (fr)
DE (1) DE69126157T2 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5574923A (en) * 1993-05-10 1996-11-12 Intel Corporation Method and apparatus for performing bi-endian byte and short accesses in a single-endian microprocessor
US5664156A (en) * 1994-09-16 1997-09-02 Philips Electronics North America Corporation Microcontroller with a reconfigurable program status word
US5893928A (en) * 1997-01-21 1999-04-13 Ford Motor Company Data movement apparatus and method
WO2001067235A2 (fr) * 2000-03-08 2001-09-13 Sun Microsystems, Inc. Architecture de traitement dotee d'une capacite de permutation des champs
WO2004104790A2 (fr) 2003-05-20 2004-12-02 Kagutech Ltd. Face arriere numerique
US7395410B2 (en) * 2004-07-06 2008-07-01 Matsushita Electric Industrial Co., Ltd. Processor system with an improved instruction decode control unit that controls data transfer between processor and coprocessor
US7849362B2 (en) * 2005-12-09 2010-12-07 International Business Machines Corporation Method and system of coherent design verification of inter-cluster interactions
CN116700795B (zh) * 2023-08-01 2023-12-01 广州中基国威电子科技有限公司 一种位操作控制系统及控制方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631405A (en) * 1969-11-12 1971-12-28 Honeywell Inc Sharing of microprograms between processors
US3930232A (en) * 1973-11-23 1975-12-30 Raytheon Co Format insensitive digital computer
FR2253435A5 (fr) * 1973-11-30 1975-06-27 Honeywell Bull Soc Ind
US4117536A (en) * 1976-12-27 1978-09-26 International Business Machines Corporation Instruction processing control apparatus
US4240139A (en) * 1977-09-22 1980-12-16 Tokyo Shibaura Denki Kabushiki Kaisha Address generating system
US4293907A (en) * 1978-12-29 1981-10-06 Bell Telephone Laboratories, Incorporated Data processing apparatus having op-code extension register
JPS58102381A (ja) * 1981-12-15 1983-06-17 Nec Corp バツフアメモリ
US4500933A (en) * 1982-04-02 1985-02-19 Ampex Corporation Universal interface unit
US4485439A (en) * 1982-07-27 1984-11-27 S.A. Analis Standard hardware-software interface for connecting any instrument which provides a digital output stream with any digital host computer
US4559614A (en) * 1983-07-05 1985-12-17 International Business Machines Corporation Interactive code format transform for communicating data between incompatible information processing systems
US4561051A (en) * 1984-02-10 1985-12-24 Prime Computer, Inc. Memory access method and apparatus in multiple processor systems
JPS60263246A (ja) * 1984-06-11 1985-12-26 Ricoh Co Ltd メモリ・システム
US4722048A (en) * 1985-04-03 1988-01-26 Honeywell Bull Inc. Microcomputer system with independent operating systems
US4899306A (en) * 1985-08-26 1990-02-06 American Telephone And Telegraph Company, At&T Bell Laboratories Test interface circuit which generates different interface control signals for different target computers responding to control signals from host computer
US5027271A (en) * 1987-12-21 1991-06-25 Bull Hn Information Systems Inc. Apparatus and method for alterable resource partitioning enforcement in a data processing system having central processing units using different operating systems
US5101498A (en) * 1987-12-31 1992-03-31 Texas Instruments Incorporated Pin selectable multi-mode processor
US5027272A (en) * 1988-01-28 1991-06-25 Weitek Corporation Method and apparatus for performing double precision vector operations on a coprocessor
US5261077A (en) * 1990-06-29 1993-11-09 Digital Equipment Corporation Configurable data path arrangement for resolving data type incompatibility

Also Published As

Publication number Publication date
CA2036855A1 (fr) 1991-09-14
US5446865A (en) 1995-08-29
EP0447101A2 (fr) 1991-09-18
EP0447101A3 (en) 1993-08-04
EP0447101B1 (fr) 1997-05-21
JP2690406B2 (ja) 1997-12-10
JPH04220737A (ja) 1992-08-11
DE69126157T2 (de) 1997-09-25
DE69126157D1 (de) 1997-06-26

Similar Documents

Publication Publication Date Title
EP0315275B1 (fr) Microcalculateur avec des circuits intégrés flexibles et spécifiques pour l'application
EP0901071B1 (fr) Procédés permettant l'interface entre un processeur et un processeur adjoint
US4648034A (en) Busy signal interface between master and slave processors in a computer system
EP1001335B1 (fr) Unité de traitement de données avec une interface coprocesseur
TWI541658B (zh) 資料處理裝置及半導體積體電路裝置
US3886523A (en) Micro program data processor having parallel instruction flow streams for plural levels of sub instruction sets
JP3745039B2 (ja) 遅延命令を有するマイクロプロセッサ
US4713750A (en) Microprocessor with compact mapped programmable logic array
AU632493B2 (en) Microprocessor having external control store
US4228498A (en) Multibus processor for increasing execution speed using a pipeline effect
US5832258A (en) Digital signal processor and associated method for conditional data operation with no condition code update
EP0034180A1 (fr) Dispositif de generation d'adresses speciales.
JPH03158928A (ja) データ処理装置
US5930520A (en) Pipelining device in a parallel processing apparatus and an instruction supplying method therefor
US5442769A (en) Processor having general registers with subdivisions addressable in instructions by register number and subdivision type
WO1998020422A1 (fr) Microcontroleur huit bits a architecture risc
CA2036855C (fr) Processeur utilisant des instructions independantes du format des donnees
KR19980018065A (ko) 스칼라/벡터 연산이 조합된 단일 명령 복수 데이터 처리
JPS6014338A (ja) 計算機システムにおける分岐機構
US4631672A (en) Arithmetic control apparatus for a pipeline processing system
US5327537A (en) Apparatus for controlling instruction execution in a pipelined processor
US5321842A (en) Three-state driver with feedback-controlled switching
US5278959A (en) Processor usable as a bus master or a bus slave
CA1119307A (fr) Microordinateur ayant des accumulateurs et des jeux d'instructions distincts pour les bits et les mots
US5212779A (en) System for guarantee reexecution after interruption by conditionally used store buffer if microinstruction being executed is a memory write and last microinstruction

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed