JPS641050A - Computer system provided with byte order conversion mechanism - Google Patents

Computer system provided with byte order conversion mechanism

Info

Publication number
JPS641050A
JPS641050A JP3936288A JP3936288A JPS641050A JP S641050 A JPS641050 A JP S641050A JP 3936288 A JP3936288 A JP 3936288A JP 3936288 A JP3936288 A JP 3936288A JP S641050 A JPS641050 A JP S641050A
Authority
JP
Japan
Prior art keywords
memory
word
mpus
inverse
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3936288A
Other languages
Japanese (ja)
Other versions
JPH011050A (en
Inventor
Hisashi Matsumura
Hiroyuki Wada
Atsushi Ugajin
Tokuhiro Niwa
Masayuki Nakamura
Koichi Nakai
Takashi Inagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3936288A priority Critical patent/JPS641050A/en
Publication of JPH011050A publication Critical patent/JPH011050A/en
Publication of JPS641050A publication Critical patent/JPS641050A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/768—Data position reversal, e.g. bit reversal, byte swapping

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To absorb difference in word access at the time of making access to a common memory by different processors, by providing a means which reverses the order of bytes consisting of one word corresponding to a control signal sent to the processor or passes it as it is between the common memory and the processor. CONSTITUTION:An MPU1 having the word process system of the processor MPU-A and an MPU2 having the system of an MPU-B are arranged, and the MPUs 1 and 2 make access to the common memory 19. The state of the MPU1 is represented in signals, the inverse of S0-inverse of S2, which shows a signal being set at '0' when making access to a high-order byte in the word by the inverse of BHE. Between the MPUs 1 and 2 and the memory 19 as a memory device, logic circuits such as inverters 8-10, 21, 22, 25, and 26, and a NAND circuit 11 and AND circuits 12 and 13, etc., are connected. And the signal to be added on selectors 29-32 provided between the MPUs 1 and 2 and the memory 19 is inverted in sequence of each byte corresponding to the control signal or as it is.
JP3936288A 1987-03-18 1988-02-24 Computer system provided with byte order conversion mechanism Pending JPS641050A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3936288A JPS641050A (en) 1987-03-18 1988-02-24 Computer system provided with byte order conversion mechanism

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP62-61011 1987-03-18
JP6101187 1987-03-18
JP3936288A JPS641050A (en) 1987-03-18 1988-02-24 Computer system provided with byte order conversion mechanism

Publications (2)

Publication Number Publication Date
JPH011050A JPH011050A (en) 1989-01-05
JPS641050A true JPS641050A (en) 1989-01-05

Family

ID=26378725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3936288A Pending JPS641050A (en) 1987-03-18 1988-02-24 Computer system provided with byte order conversion mechanism

Country Status (1)

Country Link
JP (1) JPS641050A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02255930A (en) * 1989-01-24 1990-10-16 Mitsubishi Electric Corp Data processing system
JPH03160550A (en) * 1989-11-17 1991-07-10 Hitachi Ltd Endian converting system
JPH0414159A (en) * 1990-05-07 1992-01-20 Fujitsu Ltd Data bus switching circuit
JPH04220737A (en) * 1990-03-13 1992-08-11 American Teleph & Telegr Co <Att> Independent-instruction type processor for data format and data processing system
JPH06103227A (en) * 1992-09-22 1994-04-15 Agency Of Ind Science & Technol Memory accessing device
JPH06214797A (en) * 1993-01-18 1994-08-05 Fujitsu Sooshiaru Sci Raboratori:Kk Data processor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60129868A (en) * 1983-12-19 1985-07-11 Ricoh Co Ltd Memory system
JPS61235969A (en) * 1985-04-11 1986-10-21 Ricoh Co Ltd memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60129868A (en) * 1983-12-19 1985-07-11 Ricoh Co Ltd Memory system
JPS61235969A (en) * 1985-04-11 1986-10-21 Ricoh Co Ltd memory device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02255930A (en) * 1989-01-24 1990-10-16 Mitsubishi Electric Corp Data processing system
JPH03160550A (en) * 1989-11-17 1991-07-10 Hitachi Ltd Endian converting system
JPH04220737A (en) * 1990-03-13 1992-08-11 American Teleph & Telegr Co <Att> Independent-instruction type processor for data format and data processing system
JPH0414159A (en) * 1990-05-07 1992-01-20 Fujitsu Ltd Data bus switching circuit
JPH06103227A (en) * 1992-09-22 1994-04-15 Agency Of Ind Science & Technol Memory accessing device
JPH06214797A (en) * 1993-01-18 1994-08-05 Fujitsu Sooshiaru Sci Raboratori:Kk Data processor

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