CA2189733A1 - Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion - Google Patents

Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion

Info

Publication number
CA2189733A1
CA2189733A1 CA002189733A CA2189733A CA2189733A1 CA 2189733 A1 CA2189733 A1 CA 2189733A1 CA 002189733 A CA002189733 A CA 002189733A CA 2189733 A CA2189733 A CA 2189733A CA 2189733 A1 CA2189733 A1 CA 2189733A1
Authority
CA
Canada
Prior art keywords
die attach
integrated circuit
attach paddle
leadframe
down bond
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002189733A
Other languages
English (en)
Inventor
David Guy Richard Leblanc
Colin Campbell Harris
Michael Anthony Hobden
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi Storage Solutions Ltd
Original Assignee
PMC Sierra Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PMC Sierra Ltd filed Critical PMC Sierra Ltd
Priority to CA002189733A priority Critical patent/CA2189733A1/fr
Publication of CA2189733A1 publication Critical patent/CA2189733A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
CA002189733A 1996-11-06 1996-11-06 Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion Abandoned CA2189733A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA002189733A CA2189733A1 (fr) 1996-11-06 1996-11-06 Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA002189733A CA2189733A1 (fr) 1996-11-06 1996-11-06 Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion

Publications (1)

Publication Number Publication Date
CA2189733A1 true CA2189733A1 (fr) 1998-05-06

Family

ID=4159214

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002189733A Abandoned CA2189733A1 (fr) 1996-11-06 1996-11-06 Reseau de conducteurs de circuit integre a inductance reduite entre les brochesde connexion

Country Status (1)

Country Link
CA (1) CA2189733A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8258611B2 (en) 2007-07-23 2012-09-04 Nxp B.V. Leadframe structure for electronic packages

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8258611B2 (en) 2007-07-23 2012-09-04 Nxp B.V. Leadframe structure for electronic packages

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Legal Events

Date Code Title Description
EEER Examination request
FZDE Discontinued