CA2283776C - Combinaison materiel et logiciel pour obtenir un microprocesseur ameliore - Google Patents

Combinaison materiel et logiciel pour obtenir un microprocesseur ameliore Download PDF

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Publication number
CA2283776C
CA2283776C CA002283776A CA2283776A CA2283776C CA 2283776 C CA2283776 C CA 2283776C CA 002283776 A CA002283776 A CA 002283776A CA 2283776 A CA2283776 A CA 2283776A CA 2283776 C CA2283776 C CA 2283776C
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CA
Canada
Prior art keywords
host
target
instructions
translation
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002283776A
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English (en)
Other versions
CA2283776A1 (fr
Inventor
Robert F. Cmelik
David R. Ditzel
Edmund J. Kelly
Colin B. Hunter
Douglas A. Laird
Malcolm John Wing
Gregorz B. Zyner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intellectual Ventures Holding 81 LLC
Original Assignee
Transmeta Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Transmeta Inc filed Critical Transmeta Inc
Publication of CA2283776A1 publication Critical patent/CA2283776A1/fr
Application granted granted Critical
Publication of CA2283776C publication Critical patent/CA2283776C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/52—Binary to binary
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45554—Instruction set architectures of guest OS and hypervisor or native processor differ, e.g. Bochs or VirtualPC on PowerPC MacOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)

Abstract

L'invention porte sur un microprocesseur d'un ordinateur central conçu pour exécuter des programmes d'application cible et comprenant la combinaison d'un logiciel de morphing et d'un matériel hôte de morphing conçus pour exécuter des instructions d'un ensemble d'instructions hôte, cette combinaison traduisant un ensemble d'instructions cible en un ensemble d'instructions hôte, optimisant l'ensemble d'instructions hôte spéculant sur l'apparition d'un état, déterminant sous contrôle l'état officiel du logiciel de morphing de l'ordinateur cible, mettant à jour l'état de l'ordinateur cible à partir de l'état de l'ordinateur hôte lorsqu'un ensemble d'instructions hôte se déroule conformément à l'hypothèse, détectant la défaillance de l'état pendant l'exécution, mettant à jour l'état à partir de l'état de l'ordinateur hôte lorsqu'un ensemble d'instructions hôtes ne parvient pas à être exécuté conformément à l'hypothèse, et traduisant un nouvel ensemble d'instructions hôte sans hypothèse lorsqu'un ensemble d'instructions hôte ne parvient à se dérouler conformément à l'hypothèse.
CA002283776A 1997-06-25 1997-06-25 Combinaison materiel et logiciel pour obtenir un microprocesseur ameliore Expired - Fee Related CA2283776C (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1997/011616 WO1998059292A1 (fr) 1997-06-25 1997-06-25 Microprocesseur ameliore

Publications (2)

Publication Number Publication Date
CA2283776A1 CA2283776A1 (fr) 1998-12-30
CA2283776C true CA2283776C (fr) 2003-11-11

Family

ID=22261203

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002283776A Expired - Fee Related CA2283776C (fr) 1997-06-25 1997-06-25 Combinaison materiel et logiciel pour obtenir un microprocesseur ameliore

Country Status (5)

Country Link
EP (1) EP0991994A4 (fr)
JP (1) JP3776132B2 (fr)
KR (1) KR100443759B1 (fr)
CA (1) CA2283776C (fr)
WO (1) WO1998059292A1 (fr)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
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DE69924857T2 (de) 1998-10-10 2006-03-02 Transitive Ltd., Hanging Ditch Programm-kode-umwandlung
US6954923B1 (en) 1999-01-28 2005-10-11 Ati International Srl Recording classification of instructions executed by a computer
US7111290B1 (en) 1999-01-28 2006-09-19 Ati International Srl Profiling program execution to identify frequently-executed portions and to assist binary translation
US7013456B1 (en) 1999-01-28 2006-03-14 Ati International Srl Profiling execution of computer programs
US7065633B1 (en) 1999-01-28 2006-06-20 Ati International Srl System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU
US7275246B1 (en) 1999-01-28 2007-09-25 Ati International Srl Executing programs for a first computer architecture on a computer of a second architecture
US6978462B1 (en) 1999-01-28 2005-12-20 Ati International Srl Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
JP5520326B2 (ja) * 1999-01-28 2014-06-11 エーティーアイ・テクノロジーズ・ユーエルシー コンピュータのメモリを参照する方法およびコンピュータ
US7353163B2 (en) 1999-04-27 2008-04-01 Transitive Limited Exception handling method and apparatus for use in program code conversion
WO2000065440A2 (fr) * 1999-04-27 2000-11-02 Transitive Technologies Limited Procede et dispositif de traitement des exceptions utilisables en conversion de code de programme
US7254806B1 (en) 1999-08-30 2007-08-07 Ati International Srl Detecting reordered side-effects
US6751583B1 (en) 1999-10-29 2004-06-15 Vast Systems Technology Corporation Hardware and software co-simulation including simulating a target processor using binary translation
US6934832B1 (en) 2000-01-18 2005-08-23 Ati International Srl Exception mechanism for a computer
US6627564B1 (en) * 2000-08-31 2003-09-30 Kimberly-Clark Worldwide, Inc. Composite elastic in one direction and extensible in another direction
FR2814257B1 (fr) * 2000-09-20 2002-12-06 Palmware Architecture de microprocesseur virtuel multiplate-forme et son systeme d'exploitation complementaire, notamment pour le domaine de l'informatique embarquee et mobile
AU2002245075A1 (en) * 2000-11-13 2002-07-08 Sun Microsystems, Inc. Method and apparatus for increasing performance of an interpreter
EP1313012A1 (fr) * 2001-11-15 2003-05-21 Texas Instruments France Accélération de Java DSP par optimisation de code octet
US7805710B2 (en) * 2003-07-15 2010-09-28 International Business Machines Corporation Shared code caching for program code conversion
US7353499B2 (en) 2003-09-25 2008-04-01 Sun Microsystems, Inc. Multiple instruction dispatch tables for application program obfuscation
US7363620B2 (en) 2003-09-25 2008-04-22 Sun Microsystems, Inc. Non-linear execution of application program instructions for application program obfuscation
US7415618B2 (en) 2003-09-25 2008-08-19 Sun Microsystems, Inc. Permutation of opcode values for application program obfuscation
US8220058B2 (en) 2003-09-25 2012-07-10 Oracle America, Inc. Rendering and encryption engine for application program obfuscation
US7424620B2 (en) 2003-09-25 2008-09-09 Sun Microsystems, Inc. Interleaved data and instruction streams for application program obfuscation
US8020152B2 (en) * 2005-02-24 2011-09-13 Microsoft Corporation Code morphing
US7882336B2 (en) * 2007-02-01 2011-02-01 International Business Machines Corporation Employing a buffer to facilitate instruction execution
KR100968376B1 (ko) * 2009-01-13 2010-07-09 주식회사 코아로직 이종 프로세서 간의 응용 프로그램 처리장치와 처리방법, 및 그 처리장치를 포함하는 ａｐ 통신 시스템
US9525586B2 (en) * 2013-03-15 2016-12-20 Intel Corporation QoS based binary translation and application streaming
US9703562B2 (en) * 2013-03-16 2017-07-11 Intel Corporation Instruction emulation processors, methods, and systems
CN118093017A (zh) * 2022-11-22 2024-05-28 上海兆芯集成电路股份有限公司 高效指令转译方法、以及处理器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5574927A (en) * 1994-03-25 1996-11-12 International Meta Systems, Inc. RISC architecture computer configured for emulation of the instruction set of a target computer
US5751982A (en) * 1995-03-31 1998-05-12 Apple Computer, Inc. Software emulation system with dynamic translation of emulated instructions for increased processing speed
US5625835A (en) * 1995-05-10 1997-04-29 International Business Machines Corporation Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor

Also Published As

Publication number Publication date
WO1998059292A1 (fr) 1998-12-30
KR100443759B1 (ko) 2004-08-09
JP3776132B2 (ja) 2006-05-17
CA2283776A1 (fr) 1998-12-30
EP0991994A4 (fr) 2001-11-28
JP2001519953A (ja) 2001-10-23
KR20010014094A (ko) 2001-02-26
EP0991994A1 (fr) 2000-04-12

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