CA2382927A1 - Gestion par semaphore de memoire partagee - Google Patents

Gestion par semaphore de memoire partagee Download PDF

Info

Publication number
CA2382927A1
CA2382927A1 CA002382927A CA2382927A CA2382927A1 CA 2382927 A1 CA2382927 A1 CA 2382927A1 CA 002382927 A CA002382927 A CA 002382927A CA 2382927 A CA2382927 A CA 2382927A CA 2382927 A1 CA2382927 A1 CA 2382927A1
Authority
CA
Canada
Prior art keywords
shared memory
semaphore
processing nodes
pointer
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002382927A
Other languages
English (en)
Inventor
Karlon K. West
Lynn Parker West
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Times N Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Times N Systems Inc filed Critical Times N Systems Inc
Publication of CA2382927A1 publication Critical patent/CA2382927A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/457—Communication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0837—Cache consistency protocols with software control, e.g. non-cacheable data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/52—Indexing scheme relating to G06F9/52
    • G06F2209/523—Mode

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

L'invention porte sur des procédés, des systèmes et des dispositifs de gestion par sémaphore d'un groupe de mémoires partagées. L'invention porte également sur un procédé consistant à enregistrer au moins un pointeur désignant une région de sémaphore d'une région de mémoire partagée qui est couplée à une pluralité de noeuds de traitement. Ce pointeur désigne au moins l'un des noeuds de la pluralité de noeuds de traitement et i) indique qu'une partie du noeud de la mémoire partagée est consacré à lire par l'un des noeuds de la pluralité de noeuds de traitement, et ii) protéger l'accès à la partie du noeud de la mémoire partagée jusqu'à ce qu'elle ait été lue par le noeud considéré de la pluralité de noeuds de traitement. Ces procédés, systèmes et dispositifs offrent des avantages du fait que la vitesse et la variabilité dimensionnelle des systèmes de processeurs parallèles ont été améliorées.
CA002382927A 1999-08-31 2000-08-31 Gestion par semaphore de memoire partagee Abandoned CA2382927A1 (fr)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US15215199P 1999-08-31 1999-08-31
US60/152,151 1999-08-31
US60/220,794 2000-07-25
US22074800P 2000-07-26 2000-07-26
US22097400P 2000-07-26 2000-07-26
US60/220,748 2000-07-26
PCT/US2000/024217 WO2001016741A2 (fr) 1999-08-31 2000-08-31 Gestion par semaphore de memoire partagee

Publications (1)

Publication Number Publication Date
CA2382927A1 true CA2382927A1 (fr) 2001-03-08

Family

ID=27387201

Family Applications (3)

Application Number Title Priority Date Filing Date
CA002382929A Abandoned CA2382929A1 (fr) 1999-08-31 2000-08-31 Disque a memoire partagee
CA002382728A Abandoned CA2382728A1 (fr) 1999-08-31 2000-08-31 Attente efficace d'evenement
CA002382927A Abandoned CA2382927A1 (fr) 1999-08-31 2000-08-31 Gestion par semaphore de memoire partagee

Family Applications Before (2)

Application Number Title Priority Date Filing Date
CA002382929A Abandoned CA2382929A1 (fr) 1999-08-31 2000-08-31 Disque a memoire partagee
CA002382728A Abandoned CA2382728A1 (fr) 1999-08-31 2000-08-31 Attente efficace d'evenement

Country Status (4)

Country Link
EP (3) EP1214653A2 (fr)
AU (9) AU7113600A (fr)
CA (3) CA2382929A1 (fr)
WO (9) WO2001016760A1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040017301A (ko) * 2001-07-13 2004-02-26 코닌클리케 필립스 일렉트로닉스 엔.브이. 미디어 어플리케이션 실행 방법 및 작업 제어 유닛을 갖는미디어 시스템
US6999998B2 (en) 2001-10-04 2006-02-14 Hewlett-Packard Development Company, L.P. Shared memory coupling of network infrastructure devices
US6920485B2 (en) 2001-10-04 2005-07-19 Hewlett-Packard Development Company, L.P. Packet processing in shared memory multi-computer systems
US7254745B2 (en) 2002-10-03 2007-08-07 International Business Machines Corporation Diagnostic probe management in data processing systems
JP2008046969A (ja) * 2006-08-18 2008-02-28 Fujitsu Ltd 共有メモリのアクセス監視方法及び装置
US7685381B2 (en) 2007-03-01 2010-03-23 International Business Machines Corporation Employing a data structure of readily accessible units of memory to facilitate memory access
US7899663B2 (en) 2007-03-30 2011-03-01 International Business Machines Corporation Providing memory consistency in an emulated processing environment
US9442780B2 (en) * 2011-07-19 2016-09-13 Qualcomm Incorporated Synchronization of shader operation
US9064437B2 (en) 2012-12-07 2015-06-23 Intel Corporation Memory based semaphores
WO2014190486A1 (fr) * 2013-05-28 2014-12-04 华为技术有限公司 Procédé et système pour prendre en charge une isolation de ressources dans une architecture multicœur
JP7042138B2 (ja) * 2018-03-30 2022-03-25 日立Astemo株式会社 処理装置
US12499054B2 (en) 2022-08-22 2025-12-16 Samsung Electronics Co., Ltd. Systems, methods, and apparatus for accessing data in versions of memory pages
WO2024124010A1 (fr) * 2022-12-07 2024-06-13 Hyannis Port Research, Inc. Structure de mise en mémoire cache à niveaux mulitples asymétrique pour stockage et récupération efficaces de données

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3668644A (en) * 1970-02-09 1972-06-06 Burroughs Corp Failsafe memory system
US4484262A (en) * 1979-01-09 1984-11-20 Sullivan Herbert W Shared memory computer method and apparatus
US4403283A (en) * 1980-07-28 1983-09-06 Ncr Corporation Extended memory system and method
US4414624A (en) * 1980-11-19 1983-11-08 The United States Of America As Represented By The Secretary Of The Navy Multiple-microcomputer processing
US4725946A (en) * 1985-06-27 1988-02-16 Honeywell Information Systems Inc. P and V instructions for semaphore architecture in a multiprogramming/multiprocessing environment
JPH063589B2 (ja) * 1987-10-29 1994-01-12 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン アドレス置換装置
US5175839A (en) * 1987-12-24 1992-12-29 Fujitsu Limited Storage control system in a computer system for double-writing
EP0343646B1 (fr) * 1988-05-26 1995-12-13 Hitachi, Ltd. Méthode pour la commande d'exécution de tâche pour un système multiprocesseur avec procédure d'enregistrement et d'attente
US4992935A (en) * 1988-07-12 1991-02-12 International Business Machines Corporation Bit map search by competitive processors
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
EP0457308B1 (fr) * 1990-05-18 1997-01-22 Fujitsu Limited Système de traitement de données ayant un mécanisme de sectionnement de voie d'entrée/de sortie et procédé de commande de système de traitement de données
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5434970A (en) * 1991-02-14 1995-07-18 Cray Research, Inc. System for distributed multiprocessor communication
JPH04271453A (ja) * 1991-02-27 1992-09-28 Toshiba Corp 複合電子計算機
SE9202182D0 (sv) * 1991-07-18 1992-07-16 Tandem Telecomm Syst Mirrored memory multi processor system
US5315707A (en) * 1992-01-10 1994-05-24 Digital Equipment Corporation Multiprocessor buffer system
US5398331A (en) * 1992-07-08 1995-03-14 International Business Machines Corporation Shared storage controller for dual copy shared data
US5434975A (en) * 1992-09-24 1995-07-18 At&T Corp. System for interconnecting a synchronous path having semaphores and an asynchronous path having message queuing for interprocess communications
DE4238593A1 (de) * 1992-11-16 1994-05-19 Ibm Mehrprozessor-Computersystem
JP2963298B2 (ja) * 1993-03-26 1999-10-18 富士通株式会社 二重化共有メモリにおける排他制御命令のリカバリ方法および計算機システム
US5590308A (en) * 1993-09-01 1996-12-31 International Business Machines Corporation Method and apparatus for reducing false invalidations in distributed systems
US5664089A (en) * 1994-04-26 1997-09-02 Unisys Corporation Multiple power domain power loss detection and interface disable
US5636359A (en) * 1994-06-20 1997-06-03 International Business Machines Corporation Performance enhancement system and method for a hierarchical data cache using a RAID parity scheme
US6587889B1 (en) * 1995-10-17 2003-07-01 International Business Machines Corporation Junction manager program object interconnection and method
US5940870A (en) * 1996-05-21 1999-08-17 Industrial Technology Research Institute Address translation for shared-memory multiprocessor clustering
US5784699A (en) * 1996-05-24 1998-07-21 Oracle Corporation Dynamic memory allocation in a computer using a bit map index
JPH10142298A (ja) * 1996-11-15 1998-05-29 Advantest Corp 集積回路デバイス試験装置
US5829029A (en) * 1996-12-18 1998-10-27 Bull Hn Information Systems Inc. Private cache miss and access management in a multiprocessor system with shared memory
US5918248A (en) * 1996-12-30 1999-06-29 Northern Telecom Limited Shared memory control algorithm for mutual exclusion and rollback
US6360303B1 (en) * 1997-09-30 2002-03-19 Compaq Computer Corporation Partitioning memory shared by multiple processors of a distributed processing system
EP0908825B1 (fr) * 1997-10-10 2002-09-04 Bull S.A. Un système de traitement de données avec architecture cc-NUMA (cache coherent, non-uniform memory access) et antémémoire pour access à distance incorporée dans mémoire locale

Also Published As

Publication number Publication date
CA2382728A1 (fr) 2001-03-08
WO2001016743A8 (fr) 2001-10-18
AU7110000A (en) 2001-03-26
WO2001016738A3 (fr) 2001-10-04
WO2001016743A2 (fr) 2001-03-08
WO2001016761A3 (fr) 2001-12-27
WO2001016741A3 (fr) 2001-09-20
WO2001016738A2 (fr) 2001-03-08
AU7113600A (en) 2001-03-26
WO2001016737A2 (fr) 2001-03-08
EP1214651A2 (fr) 2002-06-19
WO2001016742A3 (fr) 2001-09-20
EP1214653A2 (fr) 2002-06-19
AU6949600A (en) 2001-03-26
EP1214652A2 (fr) 2002-06-19
AU7474200A (en) 2001-03-26
WO2001016738A8 (fr) 2001-05-03
WO2001016740A2 (fr) 2001-03-08
CA2382929A1 (fr) 2001-03-08
WO2001016737A3 (fr) 2001-11-08
AU7108500A (en) 2001-03-26
WO2001016743A3 (fr) 2001-08-09
WO2001016761A2 (fr) 2001-03-08
WO2001016750A3 (fr) 2002-01-17
AU6949700A (en) 2001-03-26
WO2001016738A9 (fr) 2002-09-12
WO2001016742A2 (fr) 2001-03-08
WO2001016760A1 (fr) 2001-03-08
WO2001016740A3 (fr) 2001-12-27
WO2001016741A2 (fr) 2001-03-08
WO2001016750A2 (fr) 2001-03-08
AU7108300A (en) 2001-03-26
AU7112100A (en) 2001-03-26
AU7100700A (en) 2001-03-26

Similar Documents

Publication Publication Date Title
KR101291016B1 (ko) 사용자 핸들러 등록 장치, 프로세서, 시스템 및 방법
US6826123B1 (en) Global recovery for time of day synchronization
US7668923B2 (en) Master-slave adapter
JP4160925B2 (ja) 分散型ノード・トポロジにおけるクロス・チップ通信機構を含むマルチプロセッサ・コンピュータ・システム内の処理ユニット間の通信方法およびシステム
US5574945A (en) Multi channel inter-processor coupling facility processing received commands stored in memory absent status error of channels
US20050091383A1 (en) Efficient zero copy transfer of messages between nodes in a data processing system
US20050081080A1 (en) Error recovery for data processing systems transferring message packets through communications adapters
US20010052054A1 (en) Apparatus and method for partitioned memory protection in cache coherent symmetric multiprocessor systems
US20050080920A1 (en) Interpartition control facility for processing commands that effectuate direct memory to memory information transfer
US20050080869A1 (en) Transferring message packets from a first node to a plurality of nodes in broadcast fashion via direct memory to memory transfer
CA2382927A1 (fr) Gestion par semaphore de memoire partagee
US20080288691A1 (en) Method and apparatus of lock transactions processing in single or multi-core processor
KR20200014378A (ko) 직무 관리
Iannucci Two Fundamental Issues in Multiprocessing.
CN101719116B (zh) 基于异常处理的事务存储访问机制的实现方法及所用系统
US5909574A (en) Computing system with exception handler and method of handling exceptions in a computing system
JP3431941B2 (ja) データ処理システムにおける命令の実行順序を決定する方法および装置
US20050078708A1 (en) Formatting packet headers in a communications adapter
US20070130303A1 (en) Apparatus, system, and method for recovering messages from a failed node
US6823498B2 (en) Masterless building block binding to partitions
JPS62156756A (ja) 浮動割込処理方法
Chen Multiprocessing with the Exokernel operating system
CN113076282A (zh) 一种面向处理器片上网络的死锁处理方法
JPH09146903A (ja) 並列計算機におけるデータ転送制御方法
JPH07234850A (ja) マルチプロセッサの装置と方法

Legal Events

Date Code Title Description
FZDE Dead