WO2001016743A2 - Disque a memoire partagee - Google Patents

Disque a memoire partagee Download PDF

Info

Publication number
WO2001016743A2
WO2001016743A2 PCT/US2000/024298 US0024298W WO0116743A2 WO 2001016743 A2 WO2001016743 A2 WO 2001016743A2 US 0024298 W US0024298 W US 0024298W WO 0116743 A2 WO0116743 A2 WO 0116743A2
Authority
WO
WIPO (PCT)
Prior art keywords
memory
shared
memdisk
multiplicity
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2000/024298
Other languages
English (en)
Other versions
WO2001016743A8 (fr
WO2001016743A3 (fr
Inventor
Chris Miller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Times N Systems Inc
Original Assignee
Times N Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Times N Systems Inc filed Critical Times N Systems Inc
Priority to CA002382929A priority Critical patent/CA2382929A1/fr
Priority to AU71121/00A priority patent/AU7112100A/en
Priority to EP00959876A priority patent/EP1214653A2/fr
Publication of WO2001016743A2 publication Critical patent/WO2001016743A2/fr
Publication of WO2001016743A3 publication Critical patent/WO2001016743A3/fr
Publication of WO2001016743A8 publication Critical patent/WO2001016743A8/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/457—Communication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0837—Cache consistency protocols with software control, e.g. non-cacheable data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/52—Indexing scheme relating to G06F9/52
    • G06F2209/523—Mode

Definitions

  • Modern computers, workstations, and PCs which provide for multiple processors and shared memory, therefore, also provide high-speed, transparent cache coherence hardware to assure that if a line in one cache changes and another processor subsequently accesses a value which is in that address range, the new values will be transferred back to memory or at least to the requesting processor.
  • Another embodiment of the invention is based on a system, comprising a multiplicity of processors, each with some private memory and the multiplicity with some shared memory, interconnected and arranged such that memory accesses to a first set of address ranges will be to local, private memory whereas memory accesses to a second set of address ranges will be to shared memory, and arranged such that at least some of said processors are provided with input-output subsystems and that said input-output (I/O) traffic started by one processor for an I/O device attached to another processor will be started by inter-processor signals but continued via use of a portion of shared memory accessed via I/O driver emulation means.
  • I/O input-output
  • Another embodiment of the invention is based on a computer system which provides operating system extensions to perform disk input-output (I/O) functions in a shared-memory environment, where said extensions perform the functions with direct Load and Store operations.
  • Another embodiment of the invention is based on a computer system that provides system-wide registration of shared-memory disk partitions at all of a multiplicity of processing nodes within the system.
  • Another embodiment of the invention is based on a computer system that provides system-wide registration of shared-memory disk access methodologies at all of a multiplicity of processing nodes within the system.
  • Another embodiment of the invention is based on a computer system that provides system-wide status of shared-memory disk operations at all of a multiplicity of processing nodes within the system.
  • WSGR 15245-712; WSGR 15245-713; WSGR 15245-715; WSGR 15245-716; WSGR 15245-717; WSGR 15245-719; and WSGR 15245-720 can be performed in such a way as to require relatively little system overhead, and to be done once for many, many information exchanges. Therefore, a comparison of 10,000 instructions for message-passing to a pair of instructions for tight-clustering, is valid.
  • the SmdDisk allocates shared-memory data areas for each of the transactions and moves the write data into said areas, according to the access methodology, then sends write commands to the appropriate SmdBlock nodes.
  • the SmdBlock nodes perform the data store writes, moving the data from said areas into their data store, then return status to the originating node.
  • the originating node collects all SmdBlock transaction statuses, the operation is complete.
  • the invention is useful in conjunction with data input and transformation (such as are used for the purpose of speech recognition), or in conjunction with transforming the appearance of a display (such as are used for the purpose of video games), or the like.
  • data input and transformation such as are used for the purpose of speech recognition
  • transforming the appearance of a display such as are used for the purpose of video games

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

L'invention concerne des procédés, systèmes et dispositifs destinés à un disque à mémoire partagée ('MEMDISK'). Un procédé de l'invention consiste à mettre de côté une région particulière d'une mémoire partagée en tant que mémoire partagée et à permettre la commande de chacun des différents systèmes de fonctionnement composant des noeuds de traitement couplés à ladite mémoire partagée, de manière qu'aucun des noeuds de traitement ne puisse tenter d'utiliser des pages situées dans la région particulière à des fins qui ne soient pas de mémoire partagée. Ces procédés, systèmes et dispositifs sont avantageux en ce qu'ils augmentent la vitesse et la capacité dimensionnelle de systèmes à processeurs parallèles.
PCT/US2000/024298 1999-08-31 2000-08-31 Disque a memoire partagee Ceased WO2001016743A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CA002382929A CA2382929A1 (fr) 1999-08-31 2000-08-31 Disque a memoire partagee
AU71121/00A AU7112100A (en) 1999-08-31 2000-08-31 Shared memory disk
EP00959876A EP1214653A2 (fr) 1999-08-31 2000-08-31 Disque a memoire partagee

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US15215199P 1999-08-31 1999-08-31
US60/152,151 1999-08-31
US22074800P 2000-07-26 2000-07-26
US22097400P 2000-07-26 2000-07-26
US60/220,974 2000-07-26
US60/220,748 2000-07-26

Publications (3)

Publication Number Publication Date
WO2001016743A2 true WO2001016743A2 (fr) 2001-03-08
WO2001016743A3 WO2001016743A3 (fr) 2001-08-09
WO2001016743A8 WO2001016743A8 (fr) 2001-10-18

Family

ID=27387201

Family Applications (9)

Application Number Title Priority Date Filing Date
PCT/US2000/024039 Ceased WO2001016760A1 (fr) 1999-08-31 2000-08-31 Groupe a memoire partagee commutable
PCT/US2000/024217 Ceased WO2001016741A2 (fr) 1999-08-31 2000-08-31 Gestion par semaphore de memoire partagee
PCT/US2000/024210 Ceased WO2001016740A2 (fr) 1999-08-31 2000-08-31 Attente efficace d'evenement
PCT/US2000/024248 Ceased WO2001016742A2 (fr) 1999-08-31 2000-08-31 Memoire partagee en reseau
PCT/US2000/024147 Ceased WO2001016737A2 (fr) 1999-08-31 2000-08-31 Systeme multiposte a memoire partagee et antememoire coherente
PCT/US2000/024329 Ceased WO2001016750A2 (fr) 1999-08-31 2000-08-31 Groupe de memoire partagee a grande disponibilite
PCT/US2000/024150 Ceased WO2001016738A2 (fr) 1999-08-31 2000-08-31 Commande efficace de propriete de page
PCT/US2000/024298 Ceased WO2001016743A2 (fr) 1999-08-31 2000-08-31 Disque a memoire partagee
PCT/US2000/024216 Ceased WO2001016761A2 (fr) 1999-08-31 2000-08-31 Allocation de page efficace

Family Applications Before (7)

Application Number Title Priority Date Filing Date
PCT/US2000/024039 Ceased WO2001016760A1 (fr) 1999-08-31 2000-08-31 Groupe a memoire partagee commutable
PCT/US2000/024217 Ceased WO2001016741A2 (fr) 1999-08-31 2000-08-31 Gestion par semaphore de memoire partagee
PCT/US2000/024210 Ceased WO2001016740A2 (fr) 1999-08-31 2000-08-31 Attente efficace d'evenement
PCT/US2000/024248 Ceased WO2001016742A2 (fr) 1999-08-31 2000-08-31 Memoire partagee en reseau
PCT/US2000/024147 Ceased WO2001016737A2 (fr) 1999-08-31 2000-08-31 Systeme multiposte a memoire partagee et antememoire coherente
PCT/US2000/024329 Ceased WO2001016750A2 (fr) 1999-08-31 2000-08-31 Groupe de memoire partagee a grande disponibilite
PCT/US2000/024150 Ceased WO2001016738A2 (fr) 1999-08-31 2000-08-31 Commande efficace de propriete de page

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2000/024216 Ceased WO2001016761A2 (fr) 1999-08-31 2000-08-31 Allocation de page efficace

Country Status (4)

Country Link
EP (3) EP1214653A2 (fr)
AU (9) AU7113600A (fr)
CA (3) CA2382929A1 (fr)
WO (9) WO2001016760A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6920485B2 (en) 2001-10-04 2005-07-19 Hewlett-Packard Development Company, L.P. Packet processing in shared memory multi-computer systems
US6999998B2 (en) 2001-10-04 2006-02-14 Hewlett-Packard Development Company, L.P. Shared memory coupling of network infrastructure devices
EP1895413A3 (fr) * 2006-08-18 2009-09-30 Fujitsu Limited Procédé de surveillance d'accès et dispositif pour mémoire partagée

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KR20040017301A (ko) * 2001-07-13 2004-02-26 코닌클리케 필립스 일렉트로닉스 엔.브이. 미디어 어플리케이션 실행 방법 및 작업 제어 유닛을 갖는미디어 시스템
US7254745B2 (en) 2002-10-03 2007-08-07 International Business Machines Corporation Diagnostic probe management in data processing systems
US7685381B2 (en) 2007-03-01 2010-03-23 International Business Machines Corporation Employing a data structure of readily accessible units of memory to facilitate memory access
US7899663B2 (en) 2007-03-30 2011-03-01 International Business Machines Corporation Providing memory consistency in an emulated processing environment
US9442780B2 (en) * 2011-07-19 2016-09-13 Qualcomm Incorporated Synchronization of shader operation
US9064437B2 (en) 2012-12-07 2015-06-23 Intel Corporation Memory based semaphores
WO2014190486A1 (fr) * 2013-05-28 2014-12-04 华为技术有限公司 Procédé et système pour prendre en charge une isolation de ressources dans une architecture multicœur
JP7042138B2 (ja) * 2018-03-30 2022-03-25 日立Astemo株式会社 処理装置
US12499054B2 (en) 2022-08-22 2025-12-16 Samsung Electronics Co., Ltd. Systems, methods, and apparatus for accessing data in versions of memory pages
WO2024124010A1 (fr) * 2022-12-07 2024-06-13 Hyannis Port Research, Inc. Structure de mise en mémoire cache à niveaux mulitples asymétrique pour stockage et récupération efficaces de données

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6920485B2 (en) 2001-10-04 2005-07-19 Hewlett-Packard Development Company, L.P. Packet processing in shared memory multi-computer systems
US6999998B2 (en) 2001-10-04 2006-02-14 Hewlett-Packard Development Company, L.P. Shared memory coupling of network infrastructure devices
EP1895413A3 (fr) * 2006-08-18 2009-09-30 Fujitsu Limited Procédé de surveillance d'accès et dispositif pour mémoire partagée

Also Published As

Publication number Publication date
CA2382728A1 (fr) 2001-03-08
WO2001016743A8 (fr) 2001-10-18
AU7110000A (en) 2001-03-26
WO2001016738A3 (fr) 2001-10-04
WO2001016761A3 (fr) 2001-12-27
WO2001016741A3 (fr) 2001-09-20
WO2001016738A2 (fr) 2001-03-08
AU7113600A (en) 2001-03-26
WO2001016737A2 (fr) 2001-03-08
EP1214651A2 (fr) 2002-06-19
WO2001016742A3 (fr) 2001-09-20
EP1214653A2 (fr) 2002-06-19
CA2382927A1 (fr) 2001-03-08
AU6949600A (en) 2001-03-26
EP1214652A2 (fr) 2002-06-19
AU7474200A (en) 2001-03-26
WO2001016738A8 (fr) 2001-05-03
WO2001016740A2 (fr) 2001-03-08
CA2382929A1 (fr) 2001-03-08
WO2001016737A3 (fr) 2001-11-08
AU7108500A (en) 2001-03-26
WO2001016743A3 (fr) 2001-08-09
WO2001016761A2 (fr) 2001-03-08
WO2001016750A3 (fr) 2002-01-17
AU6949700A (en) 2001-03-26
WO2001016738A9 (fr) 2002-09-12
WO2001016742A2 (fr) 2001-03-08
WO2001016760A1 (fr) 2001-03-08
WO2001016740A3 (fr) 2001-12-27
WO2001016741A2 (fr) 2001-03-08
WO2001016750A2 (fr) 2001-03-08
AU7108300A (en) 2001-03-26
AU7112100A (en) 2001-03-26
AU7100700A (en) 2001-03-26

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