CA2977948C - Emetteur et procede de permutation de parite de celui-ci - Google Patents

Emetteur et procede de permutation de parite de celui-ci Download PDF

Info

Publication number
CA2977948C
CA2977948C CA2977948A CA2977948A CA2977948C CA 2977948 C CA2977948 C CA 2977948C CA 2977948 A CA2977948 A CA 2977948A CA 2977948 A CA2977948 A CA 2977948A CA 2977948 C CA2977948 C CA 2977948C
Authority
CA
Canada
Prior art keywords
bits
ldpc
parity
group
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CA2977948A
Other languages
English (en)
Other versions
CA2977948A1 (fr
Inventor
Hong-Sil Jeong
Kyung-Joong Kim
Se-Ho Myung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to CA3214526A priority Critical patent/CA3214526A1/fr
Priority claimed from PCT/KR2016/002094 external-priority patent/WO2016140516A2/fr
Publication of CA2977948A1 publication Critical patent/CA2977948A1/fr
Application granted granted Critical
Publication of CA2977948C publication Critical patent/CA2977948C/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Error Detection And Correction (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

La présente invention se rapporte à un émetteur. L'émetteur comprend : un codeur de contrôle de parité à faible densité (LDPC) configuré pour coder des bits d'entrée pour générer des bits de parité ; un permutateur de parité configuré pour assurer la permutation de parité par entrelacement des bits de parité et entrelacement par groupes d'une pluralité de groupes de bits comprenant les bits de parité entrelacés ; et un poinçonneur configuré pour poinçonner certain des bits de parité des groupes de bits entrelacés par groupes, le permutateur de parité entrelaçant par groupes les groupes de bits de sorte que certains des groupes de bits soient respectivement positionnés à des endroits prédéterminés, et que le reste des groupes de bits soit positionné sans ordre dans le groupe de bits entrelacés par groupes.
CA2977948A 2015-03-02 2016-03-02 Emetteur et procede de permutation de parite de celui-ci Active CA2977948C (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA3214526A CA3214526A1 (fr) 2015-03-02 2016-03-02 Emetteur et procede de permutation de parite de celui-ci

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562127022P 2015-03-02 2015-03-02
US62/127,022 2015-03-02
KR1020150137182A KR102426419B1 (ko) 2015-03-02 2015-09-27 송신 장치 및 그의 패리티 퍼뮤테이션 방법
KR10-2015-0137182 2015-09-27
PCT/KR2016/002094 WO2016140516A2 (fr) 2015-03-02 2016-03-02 Émetteur et procédé de permutation de parité de celui-ci

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CA3214526A Division CA3214526A1 (fr) 2015-03-02 2016-03-02 Emetteur et procede de permutation de parite de celui-ci

Publications (2)

Publication Number Publication Date
CA2977948A1 CA2977948A1 (fr) 2016-09-09
CA2977948C true CA2977948C (fr) 2023-11-07

Family

ID=56950308

Family Applications (1)

Application Number Title Priority Date Filing Date
CA2977948A Active CA2977948C (fr) 2015-03-02 2016-03-02 Emetteur et procede de permutation de parite de celui-ci

Country Status (4)

Country Link
KR (1) KR102426419B1 (fr)
CN (1) CN107408950A (fr)
CA (1) CA2977948C (fr)
MX (1) MX367265B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10644835B1 (en) * 2018-10-12 2020-05-05 Samsung Electronics Co., Ltd. System and method for interleaving distributed CRC in polar codes for early termination
CN112367088B (zh) * 2020-10-27 2023-03-21 上海宇航系统工程研究所 一种基于索引矩阵的编码方法及装置
CN113595563B (zh) * 2021-08-02 2024-03-29 上海金卓科技有限公司 一种ldpc译码的方法、装置、设备及存储介质

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110055410A (ko) * 2009-11-18 2011-05-25 삼성전자주식회사 통신 시스템에서 데이터 송수신 방법 및 장치
CN102394660B (zh) * 2011-08-24 2017-06-13 中兴通讯股份有限公司 分组交织的准循环扩展并行编码ldpc码的编码方法和编码器
KR102104937B1 (ko) * 2013-06-14 2020-04-27 삼성전자주식회사 Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법
KR20150005853A (ko) * 2013-07-05 2015-01-15 삼성전자주식회사 송신 장치 및 그의 신호 처리 방법
KR20150005426A (ko) * 2013-07-05 2015-01-14 삼성전자주식회사 송신 장치 및 그의 신호 처리 방법

Also Published As

Publication number Publication date
MX367265B (es) 2019-08-12
CA2977948A1 (fr) 2016-09-09
MX2017011146A (es) 2017-11-28
KR20160106471A (ko) 2016-09-12
CN107408950A (zh) 2017-11-28
KR102426419B1 (ko) 2022-07-29

Similar Documents

Publication Publication Date Title
US10567000B2 (en) Transmitter and parity permutation method thereof
CA2976628C (fr) Emetteur et procede de permutation de parite associe
US10142055B2 (en) Transmitter and method for generating additional parity thereof
CA3128609C (fr) Emetteur, et procede de generation de parite supplementaire correspondant
US20220131557A1 (en) Transmitter and parity permutation method thereof
CA2975992C (fr) Emetteur et procede pour generer une parite additionnelle pour celui-ci
US20160261289A1 (en) Transmitter and parity permutation method thereof
CA2977214C (fr) Emetteur et son procede de raccourcissement
CA2977325C (fr) Emetteur et son procede de raccourcissement
CA3206325A1 (fr) Emetteur et son procede de raccourcissement
CA2977043C (fr) Emetteur et procede pour generer une parite additionnelle pour celui-ci
CA2978209C (fr) Emetteur et procede de generation de parite supplementaire de celui-ci
CA2978212A1 (fr) Appareil de transmission et methode de transmission connexe
CA2975991C (fr) Emetteur et procede de repetition associe
CA2977948C (fr) Emetteur et procede de permutation de parite de celui-ci
CA3203980A1 (fr) Appareil de transmission de signal d'emission de television et methode de transmission
CA2978535C (fr) Emetteur et procede de permutation de parite associe
CA2978211C (fr) Appareil de transmission de signal d'emission de television et methode de transmission
CA2978173C (fr) Emetteur et son procede de raccourcissement

Legal Events

Date Code Title Description
EEER Examination request

Effective date: 20210224

MPN Maintenance fee for patent paid

Free format text: FEE DESCRIPTION TEXT: MF (PATENT, 9TH ANNIV.) - STANDARD

Year of fee payment: 9

U00 Fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U00-U101 (AS PROVIDED BY THE NATIONAL OFFICE); EVENT TEXT: MAINTENANCE REQUEST RECEIVED

Effective date: 20241217

U11 Full renewal or maintenance fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U11-U102 (AS PROVIDED BY THE NATIONAL OFFICE); EVENT TEXT: MAINTENANCE FEE PAYMENT DETERMINED COMPLIANT

Effective date: 20241217

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U11-U102 (AS PROVIDED BY THE NATIONAL OFFICE); EVENT TEXT: MAINTENANCE FEE PAYMENT PAID IN FULL

Effective date: 20241217

MPN Maintenance fee for patent paid

Free format text: FEE DESCRIPTION TEXT: MF (PATENT, 10TH ANNIV.) - STANDARD

Year of fee payment: 10

U00 Fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U00-U101 (AS PROVIDED BY THE NATIONAL OFFICE); EVENT TEXT: MAINTENANCE REQUEST RECEIVED

Effective date: 20251208

U11 Full renewal or maintenance fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U11-U102 (AS PROVIDED BY THE NATIONAL OFFICE); EVENT TEXT: MAINTENANCE FEE PAYMENT PAID IN FULL

Effective date: 20251208