CH452062A - Verfahren zur Herstellung von integrierten Schaltungen - Google Patents

Verfahren zur Herstellung von integrierten Schaltungen

Info

Publication number
CH452062A
CH452062A CH1829766A CH1829766A CH452062A CH 452062 A CH452062 A CH 452062A CH 1829766 A CH1829766 A CH 1829766A CH 1829766 A CH1829766 A CH 1829766A CH 452062 A CH452062 A CH 452062A
Authority
CH
Switzerland
Prior art keywords
manufacture
integrated circuits
circuits
integrated
Prior art date
Application number
CH1829766A
Other languages
English (en)
Inventor
B Cecil Olin
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of CH452062A publication Critical patent/CH452062A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/905—Electron beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/026—Deposition thru hole in mask
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/071—Heating, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
CH1829766A 1966-01-03 1966-12-22 Verfahren zur Herstellung von integrierten Schaltungen CH452062A (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US51809966A 1966-01-03 1966-01-03
US75535668A 1968-08-26 1968-08-26

Publications (1)

Publication Number Publication Date
CH452062A true CH452062A (de) 1968-05-31

Family

ID=27059345

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1829766A CH452062A (de) 1966-01-03 1966-12-22 Verfahren zur Herstellung von integrierten Schaltungen

Country Status (7)

Country Link
US (2) US3453723A (de)
CH (1) CH452062A (de)
DE (1) DE1564962C3 (de)
FR (1) FR1506152A (de)
GB (1) GB1165016A (de)
NL (1) NL6616548A (de)
SE (1) SE325337B (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3549432A (en) * 1968-07-15 1970-12-22 Texas Instruments Inc Multilayer microelectronic circuitry techniques
US3789276A (en) * 1968-07-15 1974-01-29 Texas Instruments Inc Multilayer microelectronic circuitry techniques
US3860783A (en) * 1970-10-19 1975-01-14 Bell Telephone Labor Inc Ion etching through a pattern mask
IT1068535B (it) * 1975-11-03 1985-03-21 Ibm Apparecchio e processo elettrolito grafico
JPS5257783A (en) * 1975-11-06 1977-05-12 Toshiba Corp Semiconductor wafer
US4103073A (en) * 1976-01-09 1978-07-25 Dios, Inc. Microsubstrates and method for making micropattern devices
US4680087A (en) * 1986-01-17 1987-07-14 Allied Corporation Etching of dielectric layers with electrons in the presence of sulfur hexafluoride
US6528934B1 (en) 2000-05-30 2003-03-04 Chunghwa Picture Tubes Ltd. Beam forming region for electron gun
US7338259B2 (en) * 2004-03-02 2008-03-04 United Technologies Corporation High modulus metallic component for high vibratory operation

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE896827C (de) * 1951-09-08 1953-11-16 Licentia Gmbh Verfahren zur formgebenden Bearbeitung von kristallenen Halbleiterkoerpern
US3340601A (en) * 1963-07-17 1967-09-12 United Aircraft Corp Alloy diffused transistor
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements
US3312879A (en) * 1964-07-29 1967-04-04 North American Aviation Inc Semiconductor structure including opposite conductivity segments

Also Published As

Publication number Publication date
SE325337B (de) 1970-06-29
NL6616548A (de) 1967-07-04
GB1165016A (en) 1969-09-24
DE1564962C3 (de) 1974-04-18
DE1564962B2 (de) 1973-09-27
DE1564962A1 (de) 1970-10-01
FR1506152A (fr) 1967-12-15
US3575733A (en) 1971-04-20
US3453723A (en) 1969-07-08

Similar Documents

Publication Publication Date Title
AT306201B (de) Verfahren zur Herstellung von Waschmitteln
CH508281A (de) Verfahren zur Herstellung von integrierten Schaltungen
CH506890A (de) Verfahren zur Herstellung integrierter Schaltungen
CH492381A (de) Verfahren zur Herstellung von gedruckten Schaltungen
CH484523A (de) Verfahren zur Herstellung von monolithischen Schaltungen
CH466779A (de) Verfahren zur Herstellung von Bauelementen
CH488411A (de) Verfahren zur Herstellung von geformten Tabletten
CH443318A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH455054A (de) Verfahren zur Herstellung von Planartransistoren
AT286929B (de) Verfahren zur Herstellung von feinverteiltem Siliciumdioxyd
CH504784A (de) Vorrichtung zur Herstellung von integrierten Schaltungen
CH438339A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH472381A (de) Verfahren zur Herstellung von Monohalogeno- azeto-azetamiden
CH458371A (de) Verfahren zur Herstellung von Benzodiazepinderivaten
AT269375B (de) Verfahren zur Herstellung von Hydroxocobalamin
CH473129A (de) Verfahren zur Herstellung von Sulfanilamido-Chinazolinen
AT277957B (de) Verfahren zur Herstellung von Alkenonen
CH440300A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH455809A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH449031A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH461515A (de) Verfahren zur Herstellung von Benzodiazepin-Derivaten
CH492688A (de) Verfahren zur Herstellung von halogenierten Steroiden
CH482659A (de) Verfahren zur Herstellung von 17-Äthyliden-Steroiden
CH487861A (de) Verfahren zur Herstellung von N-trifluormethylierten Sulfenamiden
AT269873B (de) Verfahren zur Herstellung von 2-Nitroimidazolen