CH474863A - Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen - Google Patents

Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen

Info

Publication number
CH474863A
CH474863A CH919068A CH919068A CH474863A CH 474863 A CH474863 A CH 474863A CH 919068 A CH919068 A CH 919068A CH 919068 A CH919068 A CH 919068A CH 474863 A CH474863 A CH 474863A
Authority
CH
Switzerland
Prior art keywords
production
integrated circuits
intermediate product
product
circuits
Prior art date
Application number
CH919068A
Other languages
English (en)
Inventor
Taubenest Richard
Original Assignee
Centre Electron Horloger
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre Electron Horloger filed Critical Centre Electron Horloger
Priority to CH919068A priority Critical patent/CH474863A/de
Priority to GB28567/69A priority patent/GB1276679A/en
Priority to FR6920430A priority patent/FR2011292A1/fr
Priority to NL6909403A priority patent/NL6909403A/xx
Priority to DE19691931511 priority patent/DE1931511B2/de
Publication of CH474863A publication Critical patent/CH474863A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/416—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials of highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H10P14/3441—Conductivity type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
CH919068A 1968-06-20 1968-06-20 Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen CH474863A (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CH919068A CH474863A (de) 1968-06-20 1968-06-20 Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen
GB28567/69A GB1276679A (en) 1968-06-20 1969-06-05 Method for making an intermediate product for integrated circuits by the deposition of silicon
FR6920430A FR2011292A1 (de) 1968-06-20 1969-06-18
NL6909403A NL6909403A (de) 1968-06-20 1969-06-19
DE19691931511 DE1931511B2 (de) 1968-06-20 1969-06-20 Verfahren zum herstellen integrierter schaltungen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH919068A CH474863A (de) 1968-06-20 1968-06-20 Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen

Publications (1)

Publication Number Publication Date
CH474863A true CH474863A (de) 1969-06-30

Family

ID=4349316

Family Applications (1)

Application Number Title Priority Date Filing Date
CH919068A CH474863A (de) 1968-06-20 1968-06-20 Verfahren zur Herstellung eines Zwischenproduktes für integrierte Schaltungen

Country Status (5)

Country Link
CH (1) CH474863A (de)
DE (1) DE1931511B2 (de)
FR (1) FR2011292A1 (de)
GB (1) GB1276679A (de)
NL (1) NL6909403A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8103649A (nl) * 1981-08-03 1983-03-01 Philips Nv Halfgeleiderinrichting en werkwijze voor het vervaardigen van de halfgeleiderinrichting.

Also Published As

Publication number Publication date
FR2011292A1 (de) 1970-02-27
DE1931511B2 (de) 1971-08-19
DE1931511A1 (de) 1970-01-08
GB1276679A (en) 1972-06-07
NL6909403A (de) 1969-12-23

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Legal Events

Date Code Title Description
PL Patent ceased