CH492302A - Halbleiterbauelement - Google Patents

Halbleiterbauelement

Info

Publication number
CH492302A
CH492302A CH496569A CH496569A CH492302A CH 492302 A CH492302 A CH 492302A CH 496569 A CH496569 A CH 496569A CH 496569 A CH496569 A CH 496569A CH 492302 A CH492302 A CH 492302A
Authority
CH
Switzerland
Prior art keywords
semiconductor component
semiconductor
component
Prior art date
Application number
CH496569A
Other languages
English (en)
Inventor
Springer Crafts Harold
Original Assignee
Fairchild Camera Instr Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera Instr Co filed Critical Fairchild Camera Instr Co
Publication of CH492302A publication Critical patent/CH492302A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00—Highly-doped buried regions of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00—Highly-doped buried regions of integrated devices
    • H10W15/01—Manufacture or treatment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
CH496569A 1968-04-01 1969-04-01 Halbleiterbauelement CH492302A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US71775768A 1968-04-01 1968-04-01

Publications (1)

Publication Number Publication Date
CH492302A true CH492302A (de) 1970-06-15

Family

ID=24883345

Family Applications (1)

Application Number Title Priority Date Filing Date
CH496569A CH492302A (de) 1968-04-01 1969-04-01 Halbleiterbauelement

Country Status (7)

Country Link
US (1) US3488564A (de)
BE (1) BE730105A (de)
CH (1) CH492302A (de)
DE (1) DE1912177A1 (de)
FR (1) FR2005238A1 (de)
GB (1) GB1213104A (de)
NL (1) NL6904941A (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL159817B (nl) * 1966-10-05 1979-03-15 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NL7010208A (de) * 1966-10-05 1972-01-12 Philips Nv
BE754677A (fr) * 1969-08-11 1971-01-18 Rca Corp Circuits integres fonctionnant sur courant
US3654530A (en) * 1970-06-22 1972-04-04 Ibm Integrated clamping circuit
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
JPS542064B1 (de) * 1971-07-02 1979-02-01
FR2252638B1 (de) * 1973-11-23 1978-08-04 Commissariat Energie Atomique
US3936789A (en) * 1974-06-03 1976-02-03 Texas Instruments Incorporated Spreading resistance thermistor
JPS5131186A (de) * 1974-09-11 1976-03-17 Hitachi Ltd
FR2358748A1 (fr) * 1976-07-15 1978-02-10 Radiotechnique Compelec Procede d'autoalignement des elements d'un dispositif semi-conducteur et dispositif realise suivant ce procede
US4256514A (en) * 1978-11-03 1981-03-17 International Business Machines Corporation Method for forming a narrow dimensioned region on a body
JPS6097659A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体集積回路
US4774559A (en) * 1984-12-03 1988-09-27 International Business Machines Corporation Integrated circuit chip structure wiring and circuitry for driving highly capacitive on chip wiring nets
US4982262A (en) * 1985-01-15 1991-01-01 At&T Bell Laboratories Inverted groove isolation technique for merging dielectrically isolated semiconductor devices
US4689651A (en) * 1985-07-29 1987-08-25 Motorola, Inc. Low voltage clamp
US5023194A (en) * 1988-02-11 1991-06-11 Exar Corporation Method of making a multicollector vertical pnp transistor
US5316964A (en) * 1991-05-31 1994-05-31 Linear Technology Corporation Method of forming integrated circuits with diffused resistors in isolation regions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL123416C (de) * 1960-05-02
US3363152A (en) * 1964-01-24 1968-01-09 Westinghouse Electric Corp Semiconductor devices with low leakage current across junction
US3325705A (en) * 1964-03-26 1967-06-13 Motorola Inc Unijunction transistor

Also Published As

Publication number Publication date
US3488564A (en) 1970-01-06
GB1213104A (en) 1970-11-18
BE730105A (de) 1969-09-01
DE1912177A1 (de) 1969-10-23
NL6904941A (de) 1969-10-03
FR2005238A1 (de) 1969-12-12

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Legal Events

Date Code Title Description
PL Patent ceased