CN101404259A - 配线板、半导体设备以及制造配线板和半导体设备的方法 - Google Patents

配线板、半导体设备以及制造配线板和半导体设备的方法 Download PDF

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Publication number
CN101404259A
CN101404259A CNA2008101695036A CN200810169503A CN101404259A CN 101404259 A CN101404259 A CN 101404259A CN A2008101695036 A CNA2008101695036 A CN A2008101695036A CN 200810169503 A CN200810169503 A CN 200810169503A CN 101404259 A CN101404259 A CN 101404259A
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China
Prior art keywords
wiring board
semiconductor device
support
layer
manufacturing
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Pending
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CNA2008101695036A
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English (en)
Chinese (zh)
Inventor
金子健太郎
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Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication of CN101404259A publication Critical patent/CN101404259A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/127—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed characterised by arrangements for sealing or adhesion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1152—Replicating the surface structure of a sacrificial layer, e.g. for roughening
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/331—Shapes of die-attach connectors
    • H10W72/334—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
    • Y10T29/4916—Simultaneous circuit manufacturing

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)
CNA2008101695036A 2007-10-05 2008-10-06 配线板、半导体设备以及制造配线板和半导体设备的方法 Pending CN101404259A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007262753 2007-10-05
JP2007262753 2007-10-05

Publications (1)

Publication Number Publication Date
CN101404259A true CN101404259A (zh) 2009-04-08

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CNA2008101695036A Pending CN101404259A (zh) 2007-10-05 2008-10-06 配线板、半导体设备以及制造配线板和半导体设备的方法

Country Status (5)

Country Link
US (2) US8502398B2 (2)
JP (3) JP5398217B2 (2)
KR (2) KR101551898B1 (2)
CN (1) CN101404259A (2)
TW (1) TWI447874B (2)

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CN103077935A (zh) * 2011-10-25 2013-05-01 先进科技新加坡有限公司 用于铜线键合的预镀引线框
CN103249263A (zh) * 2012-02-07 2013-08-14 景硕科技股份有限公司 线路积层板的线路结构的制作方法
CN103379726A (zh) * 2012-04-17 2013-10-30 景硕科技股份有限公司 线路积层板的复层线路结构
CN103733739A (zh) * 2012-05-16 2014-04-16 日本特殊陶业株式会社 布线基板
CN104206034A (zh) * 2012-05-16 2014-12-10 日本特殊陶业株式会社 布线基板
CN104793026A (zh) * 2014-01-20 2015-07-22 旺矽科技股份有限公司 应用于探针测试装置的支撑结构及其制作方法
CN105575936A (zh) * 2014-10-30 2016-05-11 英飞凌科技股份有限公司 电路载体和制造方法及制造和运行电路装置的方法
CN108271313A (zh) * 2016-12-30 2018-07-10 奥特斯(中国)有限公司 用于部件承载件的具有纳米和/或微米结构的片材
CN111837210A (zh) * 2018-03-09 2020-10-27 日东电工株式会社 布线基板及其制造方法
CN112445035A (zh) * 2020-11-30 2021-03-05 深圳同兴达科技股份有限公司 导电贴以及液晶显示模组

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Publication number Priority date Publication date Assignee Title
US8240036B2 (en) 2008-04-30 2012-08-14 Panasonic Corporation Method of producing a circuit board
JP5138459B2 (ja) * 2008-05-15 2013-02-06 新光電気工業株式会社 配線基板の製造方法
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US8929092B2 (en) * 2009-10-30 2015-01-06 Panasonic Corporation Circuit board, and semiconductor device having component mounted on circuit board
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JP5680401B2 (ja) * 2010-12-22 2015-03-04 新光電気工業株式会社 配線基板及び半導体パッケージ
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US8927875B2 (en) * 2011-10-28 2015-01-06 Ibiden Co., Ltd. Wiring board and method for manufacturing wiring board
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US9041207B2 (en) 2013-06-28 2015-05-26 Intel Corporation Method to increase I/O density and reduce layer counts in BBUL packages
JP6266907B2 (ja) * 2013-07-03 2018-01-24 新光電気工業株式会社 配線基板及び配線基板の製造方法
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TW201539596A (zh) * 2014-04-09 2015-10-16 同欣電子工業股份有限公司 中介體及其製造方法
US10285277B1 (en) * 2015-12-31 2019-05-07 Lockheed Martin Corporation Method of manufacturing circuits using thick metals and machined bulk dielectrics
JP2016105512A (ja) * 2016-03-01 2016-06-09 京セラサーキットソリューションズ株式会社 配線基板の製造方法
JP2017157739A (ja) 2016-03-03 2017-09-07 イビデン株式会社 電子部品付き配線板の製造方法
JP2017191688A (ja) * 2016-04-12 2017-10-19 デクセリアルズ株式会社 電気特性の検査方法
JP6594264B2 (ja) * 2016-06-07 2019-10-23 新光電気工業株式会社 配線基板及び半導体装置、並びにそれらの製造方法
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JP6935539B2 (ja) * 2016-11-30 2021-09-15 新光電気工業株式会社 配線基板の製造方法
JP7202869B2 (ja) 2018-12-10 2023-01-12 ヌヴォトンテクノロジージャパン株式会社 半導体装置及び半導体装置の製造方法
JP7338991B2 (ja) * 2019-03-04 2023-09-05 リンクステック株式会社 支持体付き配線基板、支持体付き電子部品パッケージ及びこれらの製造方法
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JP7508879B2 (ja) * 2020-06-16 2024-07-02 Ｔｏｐｐａｎホールディングス株式会社 支持体付き配線基板、配線基板、及び半導体装置
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KR20230097817A (ko) * 2021-12-24 2023-07-03 삼성전기주식회사 인쇄회로기판, 캐리어 부착 인쇄회로기판 및 인쇄회로기판 패키지의 제조방법
US20240105575A1 (en) * 2022-09-26 2024-03-28 Intel Corporation Electrolytic surface finish architecture

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3635219B2 (ja) 1999-03-11 2005-04-06 新光電気工業株式会社 半導体装置用多層基板及びその製造方法
JP4691763B2 (ja) 2000-08-25 2011-06-01 イビデン株式会社 プリント配線板の製造方法
EP1915041A1 (en) * 2001-09-28 2008-04-23 Ibiden Co., Ltd. Printed wiring board and printed wiring board manufacturing method
JP2003297973A (ja) 2002-03-28 2003-10-17 Hitachi Chem Co Ltd 半導体パッケージ用基板、その製造方法、半導体パッケージおよびその製造方法
JP3888943B2 (ja) 2002-04-12 2007-03-07 イビデン株式会社 多層プリント配線板及び多層プリント配線板の製造方法
JP2004319660A (ja) 2003-04-15 2004-11-11 Toray Ind Inc 回路基板用部材および回路基板の製造方法
JP4547164B2 (ja) 2004-02-27 2010-09-22 日本特殊陶業株式会社 配線基板の製造方法
JP5046481B2 (ja) * 2004-09-27 2012-10-10 日立電線株式会社 半導体装置及びその製造方法
JP2006186321A (ja) 2004-12-01 2006-07-13 Shinko Electric Ind Co Ltd 回路基板の製造方法及び電子部品実装構造体の製造方法
JP4538373B2 (ja) 2005-05-23 2010-09-08 日本特殊陶業株式会社 コアレス配線基板の製造方法、及びそのコアレス配線基板を有する電子装置の製造方法
JP4146864B2 (ja) 2005-05-31 2008-09-10 新光電気工業株式会社 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法
EP1887845A4 (en) * 2005-06-30 2010-08-11 Ibiden Co Ltd CIRCUIT BOARD
JP2008258520A (ja) * 2007-04-09 2008-10-23 Shinko Electric Ind Co Ltd 配線基板の製造方法及び配線基板

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103077935A (zh) * 2011-10-25 2013-05-01 先进科技新加坡有限公司 用于铜线键合的预镀引线框
CN103249263A (zh) * 2012-02-07 2013-08-14 景硕科技股份有限公司 线路积层板的线路结构的制作方法
CN103379726A (zh) * 2012-04-17 2013-10-30 景硕科技股份有限公司 线路积层板的复层线路结构
CN103733739A (zh) * 2012-05-16 2014-04-16 日本特殊陶业株式会社 布线基板
CN104206034A (zh) * 2012-05-16 2014-12-10 日本特殊陶业株式会社 布线基板
CN103733739B (zh) * 2012-05-16 2017-06-09 日本特殊陶业株式会社 布线基板
CN104206034B (zh) * 2012-05-16 2018-02-06 日本特殊陶业株式会社 布线基板
CN104793026B (zh) * 2014-01-20 2018-09-28 旺矽科技股份有限公司 应用于探针测试装置的支撑结构及其制作方法
CN104793026A (zh) * 2014-01-20 2015-07-22 旺矽科技股份有限公司 应用于探针测试装置的支撑结构及其制作方法
CN105575936A (zh) * 2014-10-30 2016-05-11 英飞凌科技股份有限公司 电路载体和制造方法及制造和运行电路装置的方法
CN105575936B (zh) * 2014-10-30 2018-04-20 英飞凌科技股份有限公司 制造电路载体方法及制造和运行半导体装置的方法
CN108271313A (zh) * 2016-12-30 2018-07-10 奥特斯(中国)有限公司 用于部件承载件的具有纳米和/或微米结构的片材
CN111837210A (zh) * 2018-03-09 2020-10-27 日东电工株式会社 布线基板及其制造方法
CN111837210B (zh) * 2018-03-09 2022-08-12 日东电工株式会社 布线基板及其制造方法
CN112445035A (zh) * 2020-11-30 2021-03-05 深圳同兴达科技股份有限公司 导电贴以及液晶显示模组

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