CN113473144A

CN113473144A - YUV4:4:4 image transmission method

Info

Publication number: CN113473144A
Application number: CN202110799433.8A
Authority: CN
Inventors: 刘正
Original assignee: Wuxi Slang Electronic Technology Co ltd
Current assignee: Wuxi Slang Electronic Technology Co ltd
Priority date: 2021-07-15
Filing date: 2021-07-15
Publication date: 2021-10-01
Anticipated expiration: 2041-07-15
Also published as: CN113473144B

Abstract

The invention relates to the technical field of multimedia, in particular to a YUV4:4:4 image transmission method, which comprises the steps of processing YUV4:4:4 image data by an FPGA (field programmable gate array) coding system, obtaining coded data and a first code of YUV4:2:0 through network transmission, then decoding by an FPGA decoding system, and finally reversely reducing the coded data into a YUV4:4:4 image. The coding and decoding system of the FPGA provided by the invention does not need the support of DDR and other peripheral equipment, and can be realized only by using the FPGA at the middle and low ends, so that on one hand, the better image quality and the better video playing experience can be provided under the condition of ensuring the least distortion; on the other hand, the image quality of YUV4:4:4 can be guaranteed by using the FPGA for coding and decoding, the color restoration requirement of desktop application is guaranteed, and the method is suitable for scenes such as desktop application with high image quality requirement and the like.

Description

YUV4:4:4 image transmission method

Technical Field

The invention relates to the technical field of multimedia, in particular to a YUV4:4:4 image transmission method.

Background

The development of algorithms such as H.264/265 with large compression ratio is promoted by the changing video requirements.

In the field of video transmission/display, the compression scheme of H.264/H.265 is largely used for compression, and meanwhile, a large number of ASIC chips provide a compression module of hardware. However, the prior art is limited to the compression algorithm of H.264/H.265, the image can only use 4:2:2 color compression, and most ASIC chips use 4:2:0 compression for cost and efficiency considerations.

In most application occasions, especially occasions requiring detail restoration of single-pixel images such as conferences and large-screen display, an acquisition processing system with a color space of 4:4:4 must be used. However, a color of 4:2:0 does not meet the requirements of desktop applications in terms of reduction.

Disclosure of Invention

In order to solve the technical problem that the color of 4:2:0 cannot meet the requirement of desktop application in the reduction degree, the technical scheme provided by the invention is as follows:

the invention provides a YUV4:4:4 image transmission method, which comprises the following steps:

step S1: acquiring first YUV4:4:4 image data;

step S2: the FPGA programming system receives first YUV4:4:4 image data and processes the image data to obtain a first YUV4:2:0 image and a first code;

step S3: transmitting the first code obtained in step S2 through a network; encoding the first YUV4:2:0 image obtained in the step S2, and sending the image through a network;

step S4: the FPGA decoding system receives the first code obtained in the step S3, and decodes and restores the first code; decoding the encoded first YUV4:2:0 image in the step S3 to obtain a second YUV4:2:0 image;

step S5: inputting the second YUV4:2:0 image into an FPGA decoding system, and combining the image with the decoded first code;

step S6: a fourth YUV4:4:4 image is generated.

Further, the programming step of the FPGA programming system in step S2 includes:

step S11: downsampling the first YUV4:4:4 image data to generate a first YUV4:2:0 image;

step S12: the first YUV4:2:0 image is up-sampled to generate a second YUV4:4:4 image;

step S13: calculating UV residual data of the first YUV4:4:4 image data and the second YUV4:4:4 image;

step S14: and lossless coding is carried out on the UV residual data in the step S13 to obtain a first code.

Step S15: sending a first code through a network to obtain a first code stream;

step S16: and the first YUV4:2:0 image is coded through a coding ASIC supporting YUV4:2:0, and a second code stream is obtained through network sending.

Further, the decoding step of the FPGA decoding system in step S4 includes:

step S21: receiving the first code, performing lossless decoding, and reducing the first code into UV residual error data;

step S22: the ASIC supporting YUV4:2:0 decoding decodes the encoded first YUV4:2:0 image to generate a second YUV4:2:0 image;

step S23: upsampling the second YUV4:2:0 image to generate a third YUV4:4:4 image;

step S24: merging the third YUV4:4:4 image with the restored UV residual data;

step S25: a fourth YUV4:4:4 image is generated.

Furthermore, the FPGA programming system and the FPGA decoding system are both realized through FPGA chips.

Further, step S2 implements network transmission through the network switch.

Further, the decoding or encoding of the ASIC is realized by an ASIC chip.

Further, the FPGA chip includes any one of a7 and a K7 chip of Xilinx, a clone10 chip of Intel, an ariia chip, and a lattic chip.

The invention has the advantages or beneficial effects that:

the YUV4:4:4 image transmission method provided by the invention processes YUV4:4:4 image data by using an FPGA coding system, obtains encoded data and a first code of YUV4:2:0 by network transmission, then decodes the encoded data and the first code by using an FPGA decoding system, and finally reversely restores the encoded data into a YUV4:4:4 image. The coding and decoding system of the FPGA provided by the invention does not need the support of DDR and other peripheral equipment, and can be realized only by using the FPGA at the middle and low ends, so that on one hand, the better image quality and the better video playing experience can be provided under the condition of ensuring the least distortion of the image; on the other hand, the image quality of YUV4:4:4 can be guaranteed by using the FPGA for coding and decoding, the color restoration requirement of desktop application is guaranteed, and the method is suitable for scenes such as desktop application with high image quality requirement and the like.

Drawings

The invention and its features, aspects and advantages will become more apparent from reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings. Like reference symbols in the various drawings indicate like elements. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.

Fig. 1 is a flowchart of a method for YUV4:4:4 image transmission according to embodiment 1 of the present invention.

Detailed Description

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.

As used herein, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," and the like are used in the positional or orientational relationship illustrated in the figures to facilitate the description of the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be construed as limiting the invention.

The appearances of the terms first, second, and third, if any, are used for descriptive purposes only and are not intended to be limiting or imply relative importance.

Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are intended to be inclusive and mean, for example, that they may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

The technical solutions in the embodiments of the present invention are described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the invention without making creative efforts, belong to the protection scope of the invention.

Example 1

In order to solve the above technical problem, the present invention provides a YUV4:4:4 image transmission method, as shown in fig. 1, including:

step S1: acquiring data of a first YUV4:4:4 image 1;

step S2: the FPGA programming system 3 receives the data of the first YUV4:4:4 image 1 and processes the data to obtain a first YUV4:2:0 image 2 and a first code;

step S3: transmitting the first code obtained in step S2 through a network; encoding the first YUV4:2:0 image 2 obtained in the step S2, and sending the encoded image through a network;

step S4: the FPGA decoding system 4 receives the first code obtained in step S3, and performs decoding and restoration; decoding the encoded first YUV4:2:0 image 2 in the step S3 to obtain a second YUV4:2:0 image 21;

step S5: inputting the second YUV4:2:0 image 21 into the FPGA decoding system 4, and merging the image with the decoded first code;

step S6: a fourth YUV4:4:4 image 13 is generated.

According to the YUV4:4:4 image transmission method, data of a first YUV4:4:4 image 1 are processed through an FPGA (field programmable gate array) coding system, coded data and a first code of a first YUV4:2:0 image 2 are obtained through network transmission, then decoding is carried out through an FPGA decoding system 4, and finally the image is reversely reduced into a fourth YUV4:4:4 image 13. The coding and decoding system of the FPGA provided by the invention does not need the support of DDR and other peripheral equipment, and can be realized only by using the FPGA at the middle and low ends, so that on the one hand, the better image quality can be provided and the better video playing experience can be provided under the condition of ensuring the least distortion of the image; in the second aspect, the FPGA is used for encoding and decoding, the image quality of YUV4:4:4 can be guaranteed, the color restoration requirement of desktop application is guaranteed, and the method is suitable for scenes such as desktop application with high image quality requirement and the like; in the third aspect, on the basis of reducing the cost, the color reduction degree is effectively improved, and the method is not only suitable for 1080p images, but also suitable for 4k images or other resolution images, so that the presented image colors can meet the requirements of the public.

Preferably, in the method for YUV4:4:4 image transmission provided by the present invention, as shown in fig. 1, the programming step of the FPGA programming system 3 in step S2 includes:

step S11: downsampling data of the first YUV4:4:4 image 1 to generate a first YUV4:2:0 image 2;

step S12: the first YUV4:2:0 image 2 is up-sampled to generate a second YUV4:4:4 image 11;

step S13: calculating UV residual data of the first YUV4:4:4 image 1 data and the second YUV4:4:4 image 11;

step S14: the UV residual data in step S13 is subjected to lossless coding or slightly lossy coding to obtain a first code.

Step S15: sending the first code through a network to obtain a first code stream;

step S16: and the first YUV4:2:0 image 2 is coded through a coding ASIC supporting YUV4:2:0, and a second code stream is obtained through network sending.

The method is characterized in that an FPGA coding chip is arranged, and an input first YUV4:4:4 image 1 is down-sampled into a first YUV4:2:0 image 2 and then up-sampled into a second YUV4:4:4 image 11. UV data is lost after the image changes from 4:4:4 to 4:2:0, and even if upsampled back to a 4:4:4 image, there is a residual difference (residual) from the original image. The FPGA copying computes this UV residual, lossless coding the UV residual, or lightweight lossy coding into the first coding, while the ASIC coding encodes the first YUV4:2:0 image 2. According to the setting, on one hand, the original image data is encoded and compressed through the FPGA and then is output by being divided into two parts, UV residual error data is reserved, the technical scheme that the original data is lost after the image is compressed is changed, and the fault tolerance rate is improved; on the other hand, the first YUV4:2:0 image 2 and the first code are sent through a network to obtain different code streams (which refer to the data flow of the video file used in unit time), so that a discrimination basis can be provided for subsequent decoding work, and the transmission is convenient.

Preferably, in the method for YUV4:4:4 image transmission provided by the present invention, as shown in fig. 1, the decoding step of the FPGA decoding system 4 in step S4 includes:

step S22: the ASIC supporting YUV4:2:0 decoding decodes the encoded first YUV4:2:0 image 2, generating a second YUV4:2:0 image 21;

step S23: upsampling the second YUV4:2:0 image 21 to generate a third YUV4:4:4 image 12;

step S24: merging the third YUV4:4:4 image 12 with the restored UV residual data;

step S25: a fourth YUV4:4:4 image 13 is generated.

During decoding, the ASIC supporting 4:2:0 coding decodes the second code stream to become a second YUV4:2:0 image, the second YUV4:2:0 image is input to the FPGA, the FPGA restores the received first code stream to UV residual data, the UV residual data is combined with the second YUV4:2:0 image 21 input to the FPGA decoding system 4, and finally the UV residual data is reversely restored to a fourth YUV4:4:4 image 14. By arranging the FPGA decoding chip, data can be more conveniently extracted for data reading, and the operation efficiency can be improved, so that the decoding efficiency of the YUV4:4:4 image can be improved. In addition, the FPGA is used for coding and decoding the image, so that the visual lossless image quality restoration can be effectively realized.

Preferably, the FPGA programming system 3 and the FPGA decoding system 4 are implemented by FPGA chips, which include, but are not limited to, any one of a7 and a K7 chips of Xilinx, a clone10 and an aria chip of Intel, and a Lattice chip. The FPGA chip used by the invention can realize the coding and decoding functions only by adopting middle and low-end products in the market.

Preferably, step S2 implements network transmission through a network switch.

Preferably, the decoding or encoding of the ASIC is implemented by an ASIC chip. Wherein, the coding ASIC comprises but is not limited to an ASIC chip which provides 4:2:0 coding and decoding, such as Haisi, Ruizi micro, AMLogic, Anba, Union poem, and the like; also comprises a SOXI and other encoding and decoding ASIC chips supporting 4:2: 2. The agro-farming ASIC chip only needs to support standard H.264/H.265 coding and decoding of 4:2:0, the chips can realize YUV4:4:4 image transmission, the performance is stable, the transmission reliability of YUV4:4:4 images is further improved, and the production cost can be effectively reduced.

The above description is only for the preferred embodiment of the present invention and is not intended to limit the scope of the present invention, and all equivalent structural changes made by using the contents of the present specification and the drawings, or any other related technical fields, are included in the scope of the present invention.

Claims

1. A YUV4:4:4 image transmission method is characterized by comprising the following steps:

step S1: acquiring data of a first YUV4:4:4 image;

step S2: the FPGA programming system receives data of a first YUV4:4:4 image and processes the data to obtain a first YUV4:2:0 image and a first code;

step S6: a fourth YUV4:4:4 image is generated.

2. The method for YUV4:4:4 image transmission according to claim 1, wherein the programming step of the FPGA programming system in the step S2 comprises:

step S11: down-sampling data of the first YUV4:4:4 image to generate a first YUV4:2:0 image;

step S13: calculating data of a first YUV4:4:4 image and UV residual data of a second YUV4:4:4 image;

3. The method of YUV4:4:4 image transmission according to claim 1, wherein the decoding step of the FPGA decoding system in the step S4 comprises:

step S24: merging the third YUV4:4:4 image with the restored UV residual data;

step S25: a fourth YUV4:4:4 image is generated.

4. The YUV4:4:4 image transmission method according to any one of claims 1-3, wherein the FPGA programming system and the FPGA decoding system are both realized by FPGA chips.

5. The method of YUV4:4:4 image transmission according to claim 1, wherein the step S2 is implemented by a network switch.

6. The YUV4:4:4 image transmission method according to any claim 2-3, wherein the decoding or encoding of the ASIC is realized by an ASIC chip.

7. The YUV4:4:4 image transmission method according to claim 4, wherein the FPGA chip comprises any one of Xilinx A7 and K7 chips, Intel Cyclone10 chips, Arria chips and Lattice chips.