CN114709233A - Method for integrating germanium p-i-n photodiode into image sensor structure - Google Patents

Abstract

The present invention provides a method of integrating germanium p‑i‑n photodiodes into an image sensor structure, which relates to the field of semiconductor technology, by implanting hydrogen ions (H ⁺ ) into a germanium donor wafer to a selected depth to Determine the thickness of the germanium transfer layer; separate the germanium transfer layer from the germanium donor wafer by beta bonding the surfaces of the germanium donor wafer and the silicon target wafer to obtain a germanium-silicon hybrid wafer; grind the surface of the germanium-silicon hybrid wafer On the surface of the germanium transfer layer, doping element ions boron ions (B ⁺ ) are implanted into the germanium transfer layer on the top of the germanium-silicon mixed wafer, so that the part of the germanium transfer layer close to the surface is implanted with boron to form a doped germanium layer; in germanium photoelectric A pixel-to-pixel isolation structure is formed in the diode layer to define a photodiode region. The invention realizes a high-speed, small pixel size, CMOS-compatible short-wave infrared image sensor (having a focal plane array) with a low-cost and relatively simple manufacturing process, and is suitable for industrial mass production.

Description

A method for integrating germanium p-i-n photodiodes into image sensor structures

technical field

The invention belongs to the technical field of semiconductors, and relates to a method for integrating a germanium p-i-n photodiode into an image sensor structure, in particular to manufacturing a vertical p-i-n photodiode of a CMOS image sensor.

Background technique

At present, SWIR CMOS Image Sensor has been widely used in small unmanned aerial vehicle systems, motor vehicle systems, intelligent agricultural systems, monitoring systems and other fields. As is well known in the art, using silicon material as a photodiode has low quantum efficiency for infrared absorption, especially for the wavelength band above 1 μm, there is almost no absorption. Compared to silicon, germanium-based short-wave infrared CMOS image sensors can capture images from visible light (0.4μm - 0.75μm) and further wavelengths (up to 1.6μm wavelengths) with performance comparable to indium gallium arsenide (InGaAs). Although indium gallium arsenide-based CMOS image sensors can provide high-quality focal plane arrays (FPAs) with high quantum efficiency and relatively low dark current, their current manufacturing process is complex, expensive, and low-yield, making it difficult to large-scale commercial application. In contrast to indium gallium arsenide, germanium is chemically compatible with silicon and is compatible with silicon CMOS manufacturing processes. Therefore, the fabrication process of germanium-based photodiodes for SWIR CMOS image sensors is more flexible, cost-effective, and scalable, and opens up consumer/mass market applications.

When fabricating germanium-based CMOS image sensors, the prior art generally employs direct epitaxial growth of germanium on a silicon target wafer, but due to the 4.2% lattice mismatch between germanium and silicon, the epitaxial growth will generate misfit dislocations and Threading dislocation (thread dislocation), so there are more defects and lower quality, which affects the detection signal-to-noise ratio and detection sensitivity. Although this problem can currently be ameliorated by some technical means, it will increase the complexity of the device structure and/or process, such as selective fabrication growth using narrow apertures. In addition, since the direct epitaxial growth of germanium on the silicon target wafer is used to grow germanium on the silicon wafer at a low temperature, the quality of the germanium layer is directly reduced.

Based on the application needs of the industrial market and the consumer/mass market, there is an urgent need for a method that is simpler in process, lower in cost, and can efficiently and stably integrate a vertical germanium p-i-n photodiode into an image sensing integrated device structure.

SUMMARY OF THE INVENTION

Based on the problems existing in the prior art, the present invention provides a method for integrating germanium p-i-n photodiodes into an image sensor structure, in particular to the fabrication of vertical p-i-n photodiodes for CMOS image sensors, the vertical p-i-n photodiodes are preferably short-wavelength Vertical p-i-n photodiodes for infrared CMOS image sensors.

According to the technical solution of the present invention, the present invention provides a method for integrating a germanium p-i-n photodiode into an image sensor structure, which includes the following steps:

Step S1, providing a germanium donor wafer;

Step S2, implanting hydrogen ions (H ⁺ ) into the germanium donor wafer to a selected depth to determine the thickness of the germanium transfer layer, where the germanium transfer layer is the germanium thin film to be transferred;

Step S3, providing a silicon target wafer;

Step S4, beta bonding the surfaces of the germanium donor wafer and the silicon target wafer;

In step S5, the germanium transfer layer and the germanium donor wafer are separated to obtain a germanium-silicon hybrid wafer; that is, thermal technology or mechanical technology is used to bond the germanium transfer layer and the germanium donor crystal on the silicon target wafer. The circle is separated to obtain a hybrid wafer composed of a germanium transfer layer and a silicon target wafer;

Step S6, completing the final bonding of the germanium-silicon hybrid wafer;

Step S7, grinding the surface of the germanium transfer layer of the germanium-silicon hybrid wafer;

Step S8, implanting doped element ions boron ions (B ⁺ ) into the germanium transfer layer on the top of the germanium-silicon mixed wafer, so that the part of the germanium transfer layer close to the surface is implanted with boron to form a doped germanium layer, which is close to the silicon target wafer. The rest is the undoped germanium layer;

Step S9, forming a pixel-to-pixel isolation structure in the germanium photodiode layer to define a photodiode region;

Step S10, flipping the silicon-germanium hybrid wafer;

In step S11, a carrier coated with a temporary adhesive is provided.

Wherein, the following steps are further included after step S11:

Step S12, temporarily bonding/adhering the side of the germanium-silicon hybrid wafer with the flowable dielectric material to the carrier through a temporary adhesive;

Step S13, removing most of the silicon target wafer by grinding until the bottom 13 of the pixel isolation;

Step S14, depositing a dielectric passivation layer on the outer surface of the remaining silicon layer;

Step S15, separately forming metal connections for the remaining silicon layer and the doped germanium layer;

Step S16, forming alignment marks on the outer surface of the dielectric passivation layer.

Wherein, the following steps are further included after step S16:

Step S17, providing silicon control and readout circuit wafers;

Step S18, abutting the outer-facing surface of the interconnect layer of the silicon control and readout circuit wafer with the outer-facing surface of the dielectric passivation layer of the germanium photodiode layer temporarily bonded to the carrier, through alignment marks on the two Ensure that the interconnect layer and the dielectric passivation layer are aligned so that the metal connection of the germanium photodiode layer is connected to the circuit of the interconnect layer;

Step S19, annealing is performed to complete the bonding;

Step S20, carry out laser debonding/debonding, and remove the carrier;

Step S21, removing the surface dielectric layer by chemical mechanical polishing;

Step S22, depositing an anti-reflection layer on the surface formed by the doped germanium layer and the dielectric layer between the trenches;

Step S23, forming a lens layer on top of the anti-reflection layer.

Preferably, in step S1, the germanium donor wafer is cleaned and dried, and then the surface of the germanium donor wafer is ground by a chemical mechanical polishing process.

More preferably, providing the germanium donor wafer in step S1 further includes, depositing a layer of plasma-enhanced chemical vapor deposition silicon dioxide film on the germanium donor wafer, and the silicon dioxide film thickness is between 10nm and 90nm, so that the The surface of the germanium donor wafer is protected during the subsequent hydrogen ion implantation in step S2.

Further, the step S1 providing the germanium donor wafer further includes: depositing a layer of plasma enhanced chemical vapor deposition silicon dioxide film on the germanium donor wafer, the silicon dioxide film thickness is between 10nm and 90nm, so as to be used in subsequent steps The surface of the germanium donor wafer is protected during the hydrogen ion implantation of S2, and the silicon dioxide film can be removed after the hydrogen ion implantation.

Furthermore, the hydrogen ion implantation in step S2 adopts beamline ion implantation or plasma immersion ion implantation.

Preferably, an amorphous germanium layer is deposited on top of the formed germanium transfer layer region.

Preferably, the selective ablation energy placement method adopts energy pulse technology means, and the energy pulse is provided by providing local energy pulses.

More preferably, hydrogen ions (H ⁺ ) are implanted into the germanium donor wafer, the implanted hydrogen ions capture electrons to form hydrogen gas, and the hydrogen gas forms a microbubble layer in the bubble layer, parallel to the cleavage plane, to heat the germanium-silicon hybrid wafer and peeled along the cleavage plane.

In addition, the separated germanium donor wafer can be reused after grinding the surface and cleaning the surface; that is, a germanium donor wafer is repeatedly used as the raw material in step S2 to generate the germanium transfer layer until the The thickness is too thin to continue to use.

In addition, in the final bonding of the germanium-silicon hybrid wafer in step S6, the final bonding step adopts an annealing bonding step, which lasts for several hours in a process environment of less than or equal to 400 degrees Celsius.

Compared with the prior art, the beneficial technical effects of the present invention are as follows:

1. The present invention realizes the manufacturing process of the short-wave infrared image sensor with high speed and small pixel size with a relatively simpler manufacturing process.

2. The technical solution of the present invention realizes a low-cost, CMOS-compatible short-wave infrared image sensor (with a focal plane array) that can be produced in batches with high production yield.

3. The image sensor manufactured by the production process of the present invention has lower dark current and higher sensitivity from visible light to short-wave infrared wavelengths.

4. The technical solution of the present invention utilizes an organic combination of ion implantation, cleaning, bonding, annealing, peeling, chemical mechanical polishing, etc., so that the production process is relatively simple, the technology is mature, and it is suitable for industrialized large-scale production.

5. The method of integrating germanium p-i-n photodiode into the image sensor structure of the present invention adopts the germanium-silicon layer transfer technology to obtain a high-quality single-crystal germanium layer of the photodiode layer, which is similar to the direct epitaxial growth of the germanium layer on the silicon target wafer. than, with higher quality and fewer defects.

6. The image sensor manufactured by the method of integrating the germanium p-i-n photodiode into the image sensor structure of the present invention is a backside illumination (BSI) sensor and adopts a stacked CMOS structure, that is, the silicon control and readout circuit is located on the back side of the pixel layer, This structure boosts or increases the number of incident photons captured at the pixel layer, reducing noise and improving overall performance.

7. The manufacturing process design of the method for integrating the germanium p-i-n photodiode into the image sensor structure of the present invention realizes the integration of the vertical photodiode, and the metal contacts of the vertical p-i-n photodiode are only in contact with the p-type region and the n-type region from the back. , does not block the illumination of incident photons, thus ensuring the number of incident photons captured.

8. In the method of integrating germanium p-i-n photodiodes into the image sensor structure of the present invention, the germanium donor wafer can be reused to generate more germanium transfer layers, the resource utilization rate is higher, and the manufacturing cost is lower.

Description of drawings

1 to 17 are schematic diagrams illustrating the manufacturing flow of a method for integrating a germanium p-i-n photodiode into an image sensor structure according to the present invention.

The names of the parts indicated by the reference numbers in the figures are as follows:

1. germanium donor wafer; 2. germanium transfer layer; 3. silicon target wafer; 4. germanium-silicon hybrid wafer; 5. doped germanium layer; 6. undoped germanium layer; 7. germanium photodiode layer 8. Isolation trenches; 9. Dielectric layer between trenches; 10. Surface dielectric layer; 11. Carrier; 12. Temporary adhesive; 13. Bottom of pixel isolation; 14. Remaining silicon layer; 15. Metal connection 16, dielectric passivation layer; 17, silicon control and readout circuit wafer; 18, interconnect layer; 19, anti-reflection layer; 20, filter layer; 21, lens layer.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. Additionally, the scope of the present invention should not be limited only to the specific structures or components or specific parameters described below.

In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inside", " The orientation or positional relationship indicated by "outside" is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or component must have a specific orientation, so as to The specific orientation configuration and operation are therefore not to be construed as limitations of the present invention.

The present invention provides a method for integrating germanium pin photodiodes into image sensor structures by implanting hydrogen ions (H ⁺ ) into a germanium donor wafer to a selected depth to determine the thickness of the germanium transfer layer; via beta bonds Combine the surfaces of the germanium donor wafer and the silicon target wafer, and separate the germanium transfer layer from the germanium donor wafer to obtain a germanium-silicon mixed wafer; grind the surface of the germanium transfer layer of the germanium-silicon mixed wafer to remove doping elements Ion boron ions (B ⁺ ) are implanted into the germanium transfer layer on the top of the germanium-silicon hybrid wafer, so that the part of the germanium transfer layer close to the surface is implanted with boron to form a doped germanium layer; in the germanium photodiode layer, a pixel-to-pixel connection is formed. isolation structures to define photodiode regions. The invention realizes a high-speed, small pixel size, CMOS-compatible short-wave infrared image sensor (having a focal plane array) with a low-cost and relatively simple manufacturing process, and is suitable for industrial mass production.

Referring to FIG. 17 , the image sensor based on germanium p-i-n photodiode manufactured by the method of the present invention includes silicon control and readout circuit wafer 17 , dielectric passivation layer 16 , germanium photodiode layer 7 , resistance Reflective layer 19 and lens layer 21 . The germanium photodiode layer 7 is a stacked structure, and includes the remaining silicon layer 14, the undoped germanium layer 6 and the doped germanium layer 5 in order from bottom to top, wherein the undoped germanium layer 6 is an intrinsic layer; the remaining silicon layer 14 is n type region and the doped germanium layer 5 are p-type regions; in another embodiment, the remaining silicon layer 14 is a p-type region and the doped germanium layer 5 is an n-type region. The germanium photodiode layer 7 further includes an inter-trench dielectric layer 9 disposed through the stacked structure. The inter-trench dielectric layer 9 divides the germanium photodiode layer 7 into a plurality of independent pixel regions. In each pixel area, the dielectric passivation layer 16 and the germanium photodiode layer 7 are provided with two metal connections 15 from bottom to top, the first metal connection is connected to the remaining silicon layer 14, and the second metal connection is connected to the dopant layer 14. Impurity germanium layer 5 . The upper part of the silicon control and readout circuit wafer 17 is an interconnect layer 18 with circuits connected to metal connections 15 .

Preferably, there is a filter layer 20 between the anti-reflection layer 19 and the lens layer 21, and the filter layer can selectively transmit incident light in a specific wavelength range while absorbing the remaining light.

The method for integrating a germanium p-i-n photodiode into an image sensor structure of the present invention can be divided into two types according to the upper and lower order of the p-type region and the n-type region in the germanium p-i-n photodiode. It can be understood that the two basic The process principle is the same. Taking the method A of integrating germanium p-i-n photodiodes into the image sensor structure (“Method A” for short) as an example for detailed description, please refer to FIGS. 1 to 17 .

Method A, boron-doped germanium (p-type region) is on the top, the doped germanium layer 5 is a p-type region, the doping element ions implanted into germanium are boron ions (B ⁺ ), and the remaining silicon layer 14 is an n-type region . Method A includes the following steps:

In step S1, a germanium donor wafer 1 is provided. FIG. 1 is a schematic diagram of steps S1 to S2. In a preferred embodiment, the germanium donor wafer 1 is cleaned and dried, and then the surface of the germanium donor wafer 1 is ground. The polishing liquid grinds the surface of the germanium donor wafer; the pH value of the polishing liquid is preferably 7-11, and more preferably the pH value is 9. During the grinding process, according to the grinding progress and the flatness of the germanium donor wafer 1 plane, the grinding progress is controlled by adjusting the flow rate of the grinding liquid and applying a pH adjusting liquid. The pH adjusting liquid is preferably deionized water. The applicable chemical mechanical polishing equipment for the germanium donor wafer includes a polishing turntable, a polishing pad, a polishing liquid nozzle and a pH adjusting liquid nozzle, wherein the grinding rotary table is used to fix the germanium donor wafer to be ground and provide the germanium to be ground. The donor wafer provides rotational power; the grinding pad is used to mechanically remove the surface layer of the germanium donor wafer to be ground during relative motion with the germanium donor wafer to be ground; the grinding fluid nozzle is arranged above the grinding pad , used to inject the grinding liquid with a certain pH value onto the grinding pad; the pH adjustment liquid nozzle and the grinding liquid nozzle are set close to each other, used to inject the pH adjusting liquid onto the grinding pad, and have a certain pH value on the grinding pad. The grinding liquid is mixed to form the grinding liquid of the second pH value; the pH adjusting liquid nozzle is also provided with a flow controller for adjusting the flow rate of the pH adjusting liquid to adjust the second pH value to target pH. Flow controllers are provided on both the pH adjusting liquid nozzle and the grinding liquid nozzle, which are respectively used to adjust the flow rate of the pH adjusting liquid and the grinding liquid, so as to adjust the second pH value to the target pH value. The chemical mechanical polishing equipment further includes a pH value detector for detecting the pH value of the polishing liquid on the polishing pad.

The step S1 to provide the germanium donor wafer 1 further includes that a layer of plasma enhanced chemical vapor deposition (PECVD) silicon dioxide (SiO ₂ ) film may be deposited on the germanium donor wafer 1, and the silicon dioxide (SiO ₂ ) film thickness Between 10 nm and 90 nm (nanometers) to protect the surface of the germanium donor wafer 1 during the hydrogen ion implantation in the subsequent step (step S2 ), and the silicon dioxide film can be removed after the hydrogen ion implantation. The masking film can also choose silicon nitride, Al ₂ O ₃ or photoresist.

In step S2, hydrogen ions (H ⁺ ) are implanted into the germanium donor wafer 1 to a selected depth to determine the thickness of the germanium transfer layer 2 (ie, the germanium thin film to be transferred). as shown in picture 2.

In some specific embodiments, beamline ion implantation or plasma immersion ion implantation can be used for hydrogen ion implantation, and the implantation conditions are, for example: dose range: 1×10 ¹⁵ atoms/cm ² ~ 1×10 ¹⁸ atoms/cm ² (preferably > 10 ¹⁶ atoms/cm ² ); energy range: 1keV ~ 1MeV (typically about 50keV); temperature range: room temperature (eg 25 degrees Celsius) to 600 degrees Celsius (preferably <400 degrees Celsius to minimize the escape of injected particles by diffusion) ; Selected depth accuracy: ±0.03 microns to ±0.05 microns.

Alternatively, a layer of amorphous germanium (a-Ge) may be deposited (eg by physical vapor deposition (PVD)) on top of the region of germanium transfer layer 2 formed. FIG. 2 is a schematic diagram of the state after step S2.

Step S3, providing a silicon target wafer 3 (n-type); preferably, grinding the surface of the silicon target wafer, and the grinding process or equipment adopts the chemical mechanical grinding process or equipment in step S1, or the grinding process or The equipment adopts a chemical mechanical grinding process or equipment similar to that in step S1. FIG. 3 is a schematic diagram of steps S3 to S4.

If an amorphous germanium layer is deposited in step S2, further preferably, an amorphous germanium layer may also be deposited on the surface of the silicon target wafer 3 (for example, by physical vapor deposition), so that in subsequent steps During S5 and step S6, the combined amorphous germanium layer will transform into crystalline germanium (c-Ge), thereby promoting bonding between the germanium donor wafer 1 and the silicon target wafer 3 .

Step S4 , beta bonding the surfaces of the germanium donor wafer 1 and the silicon target wafer 3 . Among them, a cleaning step is required before beta bonding to remove oxides on the surface. On the surface of the germanium wafer, ultrasonic cleaning is carried out with acetone, methanol/ethanol and deionized water; in a preferred embodiment, deionized water and H ₂ O ₂ are used for further cleaning according to a dilution of (15~30):1 ratio , preferably using a 20:1 ratio of dilution; then use deionized water and HF according to (30~70):1 dilution, preferably according to 50:1 dilution; finally use according to (15~30):1 ratio The diluted H ₂ O ₂ diluent is cleaned again, preferably at a 20:1 dilution. In a preferred embodiment, on the surface of the silicon wafer, RCA-I solution and RCA-II solution are used to clean in sequence, and then H ₂ O2-H ₂ SO ₄ cleaning solution is used for cleaning; after cleaning, a desiccator is used for cleaning Remove residual liquid or particles from the wafer surface. In another embodiment, a method of dipping the wafer in hydrofluoric acid may be used instead of the above cleaning process.

Beta bonding process is also known as self-bonding process, self-bonding process, etc. (self-bonding process), and its methods include method 1 or method 2, for example:

Method 1, low temperature bonding process, including a low temperature thermal step, pressing the cleaned and/or activated surfaces together under moderate pressure, preferably 0.5MPa ~ 2.0MPa, to ensure that the implanted particles (hydrogen ions or microbubbles) ) will not initiate breakage, or diffuse or outgas. This weak bonding is caused by electrostatic interactions (van der Waals forces).

Method 2, plasma cleaning and activation, using plasma from Ar, N ₂ , NH ₃ , Ne, H ₂ O, O ₂ to strike the silicon target wafer 3 , the plasma activates the wafer surface (dangling bonds are generated on the wafer surface) Then, the surface of the activated silicon target wafer 3 is attached to the surface of the germanium donor wafer 1, and pressure is applied to the wafer to make it self-bond at the layer-to-layer interface.

Step S5, the germanium transfer layer 2 (bonded and adhered to the silicon target wafer 3) is separated from the germanium donor wafer 1 (ie, peeled off, using thermal, mechanical or other suitable techniques for peeling off) to obtain germanium silicon Hybrid wafer 4 (ie, a hybrid wafer composed of germanium transfer layer 2 and silicon target wafer 3). FIG. 4 is a schematic diagram of step S5.

Among them, the exfoliation method such as the selective cleave energy placement step (selective cleave energy placement step), the selective exfoliation energy placement method specifically adopts the energy pulse technology means, and the energy pulse is provided by providing a local (small range) energy pulse, such as using a heat source (eg lasers, heat lamps), cold sources and mechanical sources to achieve e.g. torsional lift-off; specifically heating (e.g. with a heat source around 350 degrees Celsius) or cooling or differentially heating or differentially cooling the substrate (germanium donor wafer 1 or silicon target side of wafer 4). In another embodiment, the stripping method, such as an ion implantation blister-separation step, specifically includes implanting hydrogen ions (H ⁺ ) into the germanium donor wafer 1 , and the implanted hydrogen ions capture electrons to form hydrogen gas , the hydrogen gas forms a micro-bubble layer in the bubble layer, parallel to the cleavage plane (cracked surface of the crystal), heats the germanium-silicon hybrid wafer 4 and peels off along the cleavage plane; the cleaning step and the self-bonding process can refer to The process in the aforementioned beta bonding.

Optionally, the separated germanium donor wafer 1 can be reused after grinding (chemical mechanical polishing (CMP)) and cleaning the surface; that is, one germanium donor wafer 1 is used repeatedly as a step. The raw material of S2 is used to generate the germanium transfer layer 2 until its thickness is too thin to continue to be used.

In step S6, the final bonding of the germanium-silicon mixed wafer 4 is completed.

The final bonding step adopts the following bonding steps, for example: the bonding step method 1, the annealing bonding step, lasts for several hours in a process environment of less than or equal to 400 degrees Celsius, preferably, lasts for 3 hours in a process environment of 300 degrees Celsius . Bonding Step Method Two, a voltage applied bonding step, applying a voltage to establish current flow through the mixed wafers, limiting crystal defects introduced in the wafers, the current heating and causing bonding between the wafers, preferably using localized heating at the interface ( increase the series resistance) for bonding.

In step S7 , the surface of the germanium transfer layer 2 of the germanium-silicon mixed wafer 4 is ground. Among them, grinding, such as chemical mechanical grinding, specifically, the slurry contains a mild abrasive and an oxidant (mixed in deionized water), and the abrasive is, for example, borosilicate glass, titanium dioxide, titanium nitride, aluminum oxide, trioxide Aluminum, ferric nitrate, cerium oxide, silica (colloidal silica or fumed (micron) silica), silicon nitride, silicon carbide, graphite, diamond, oxidizing agents such as H ₂ O ₂ , KIO ₃ , iron nitrate .

Optionally, after grinding, a plasma-enhanced chemical vapor deposition silicon dioxide film may be deposited on the germanium transfer layer 2 on top of the germanium-silicon hybrid wafer 4 to protect the surface of the germanium transfer layer 2 during subsequent boron ion implantation , and the silicon dioxide film can be removed after boron ion implantation.

In step S8 , boron ions (B ⁺ ) are implanted into the germanium transfer layer 2 on the top of the germanium-silicon mixed wafer 4 , so that the part of the germanium transfer layer 2 close to the surface is implanted with boron to form the doped germanium layer 5 (p-type). region), and the rest (the part close to the silicon target wafer 3) is the undoped germanium layer 6 (the boron ions cannot reach, so there is no boron, and it is an intrinsic region). An anneal is then performed to activate the dopants. FIG. 5 is a schematic diagram of step S8. Among them, dopants are also called dopants, implants, etc., and are implanted boron atoms.

FIG. 6 and FIG. 7 are schematic diagrams of step S9, FIG. 6 is a schematic diagram of a state after step S9.1 is completed, and FIG. 7 is a schematic diagram of a state after step S9.3 is completed. It should be noted that FIGS. 7 to 17 are all enlarged views of a single pixel area, such as the part shown in A in FIG. 6 .

Step S9 , forming pixel-to-pixel isolation structures in the germanium photodiode layer 7 to define a photodiode region (ie, a photodiode array, ie, a pixel region). Wherein, as shown in FIG. 6 , the germanium photodiode layer 7 refers to the doped germanium layer 5 , the undoped germanium layer 6 and a part of the silicon target wafer 3 , which are connected in sequence, that is, the germanium p-i-n formed in the subsequent steps. The corresponding part of the photodiode layer.

Step S9 further includes:

Step S9.1, forming an isolation pattern and forming isolation trenches 8 by etching to define (divide) each pixel area; for example, if the shape of the pixels to be formed is square, the isolation pattern is similar to a square grid; using The grid is patterned by photolithography and then etched to create isolation trenches 8;

Step S9.2, filling the isolation trench 8 with a flowable dielectric material (eg, polyimide) to form an inter-trench dielectric layer 9;

In step S9.3, the flowable dielectric material is excessively filled so that it fills the isolation trench 8 and then overflows to cover the pixel area to form the surface dielectric layer 10 .

FIG. 8 is a schematic diagram of steps S10 to S11.

In step S10, the silicon-germanium hybrid wafer 4 is turned over.

In step S11, a carrier 11 coated with a temporary adhesive 12 is provided. The temporary adhesive 12 (temporary bonding adhesive) can adopt the existing technology, and realize the bonding through bonding or adhesion.

FIG. 9 is a schematic diagram of the state after step S12 is completed.

In step S12 , the silicon-germanium hybrid wafer 4 (the side with the flowable dielectric material) is temporarily bonded/bonded to the carrier 11 by the temporary adhesive 12 .

FIG. 10 is a schematic diagram showing the state after step S13 is completed.

In step S13, most of the silicon target wafer 3 (n-type) is removed by grinding (eg, chemical mechanical polishing or etching (eg, wet etching) or other suitable techniques) until the bottom 13 of the pixel isolation. Therefore, a residual silicon layer 14 (n-type region) is formed (reserved) on top of the undoped germanium layer 6 , and the remaining silicon layer 14 , the undoped germanium layer 6 and the doped germanium layer 5 connected in sequence together constitute germanium p-i-n photodiode layer (ie germanium photodiode layer 7). The bottom 13 of the pixel isolation refers to the layer corresponding to the end of the inter-trench dielectric layer 9 away from the surface dielectric layer 10 , that is, the surface corresponding to the grinding surface of the remaining silicon layer 14 reserved according to needs/process requirements level.

FIG. 11 is a schematic diagram showing the state after step S14 is completed.

Step S14 , depositing a dielectric passivation layer 16 on the outer surface of the remaining silicon layer 14 .

FIG. 12 is a schematic diagram showing the state after step S15 is completed.

In step S15 , metal connections 15 are separately formed on the remaining silicon layer 14 (n-type region) and the doped germanium layer 5 (p-type region).

Step S15 further includes:

Step S15.1, forming metal connection patterns and etching via holes to the remaining silicon layer 14 (n-type region) and the doped germanium layer 5 (p-type region). Barrier metal (BM) and copper (Cu) seeds are formed on the sidewalls of the vias by physical vapor deposition (PVD), and the vias are filled by electrochemical deposition of copper to form metal connections 15 .

In step S15.2, the surface is ground (eg, chemical mechanical grinding) to remove excess copper, exposing the copper pad and the dielectric field, so that the metal connection 15 is flush with the dielectric passivation layer 16. Among them, the dielectric passivation layer 16 may be thinned after the chemical mechanical polishing.

Step S16, forming alignment marks on the outer surface of the dielectric passivation layer 16 (by any suitable technique).

FIG. 13 is a schematic diagram of steps S17 to S18.

In step S17, silicon control and readout circuit wafer 17 is provided.

Among them, silicon control and readout circuit wafer 17 has control, readout and/or other suitable circuits for the p-i-n photodiode array layer (ie, germanium photodiode layer 7), and the surface near the outside is interconnected with circuits layer 18, and the outer surface of the interconnect layer 18 is the surface formed after chemical mechanical polishing of copper and barrier metals, ie the surface is exposed with circuit metal contacts (copper pads).

And, step S17 further comprises:

Step S17.1, forming alignment marks on the outer surface of the interconnect layer 18 (by any suitable technique). This alignment mark matches the alignment mark formed on the surface of the dielectric passivation layer 16 in step S16, so as to achieve the effect of assisting alignment in subsequent assembly.

In step S18, the outer-facing surface of the interconnect layer 18 of the silicon control and readout circuit wafer 17 is brought into contact with the outer-facing surface of the dielectric passivation layer 16 of the germanium photodiode layer 7 (temporarily bonded to the carrier 11), The metal connection 15 of the germanium photodiode layer 7 is connected to the circuit of the interconnect layer 18 by ensuring the alignment of the two by the alignment marks on the two. And bonding between the two, such as hybrid bonding (copper-copper bonding and oxide-oxide bonding). The copper-copper bonding process is that during the growth of copper grains, the copper pads on the upper side and the copper pads on the lower side are connected by mutual diffusion of copper (the two copper parts of the metal connection 15 and the circuit of the interconnect layer 18 that are connected to each other) interface).

The above-mentioned alignment marks, also called alignment marks, are in the prior art. For the device to work, the metal connections 15 of the germanium photodiode layer 7 and the circuits of the interconnect layer 18 of the silicon control and readout circuit wafer 17 must be aligned with each other (circuit connected). This requires at least one set of alignment marks, which are high-precision features that are used as a reference when combining positioning. The setting of the alignment mark can be realized according to the prior art, so it is not repeated here.

FIG. 14 is a schematic diagram showing the state after step S18 is completed.

In step S19, annealing is performed to complete the bonding. The oxide-oxide bonding process is, upon annealing, connecting the upper and lower dielectric fields (connecting the interconnect layer 18 and the dielectric passivation layer 16 ) through a dehydration condensation reaction.

In step S20 , laser debonding/debonding is performed to remove the carrier 11 .

FIG. 15 is a schematic diagram showing the state after step S20 is completed.

In step S21, the surface dielectric layer 10 is removed by grinding (for example, by chemical mechanical grinding or other suitable techniques). That is, the flowable dielectric material on the surface part of the pixel region is removed (the inter-trench dielectric layer 9 still exists), so that the doped germanium layer 5 is exposed on the surface.

FIG. 16 is a schematic diagram showing the state after step S21 is completed.

In step S22 , an anti-reflection layer 19 is deposited on the surface (the surface formed by the doped germanium layer 5 and the inter-trench dielectric layer 9 ).

In step S23 , a lens layer 21 is formed on top of the anti-reflection layer 19 .

Preferably, a filter layer 20 is further formed between the top of the anti-reflection layer 19 and the lens layer 21 .

FIG. 17 is a schematic diagram showing the state after steps S22 and S23 are completed in the preferred embodiment, that is, a schematic structural diagram of the final product.

Method B, phosphorus doped germanium (n-type region) is on the top, the doped germanium layer 5 is an n-type region, the doping element ions implanted into germanium are phosphorus ions (P ⁺ ), and the remaining silicon layer 14 is a p-type region .

The only difference from method A is that the silicon target wafer 3 provided in step S3 is p-type, so the remaining silicon layer 14 is a p-type region; the doping element ions implanted in step S8 are phosphorus ions (P ⁺ ), and the resulting The doped germanium layer 5 is an n-type region, and other processes and operations are the same as those of the method A.

As is known in the art, doping a group IV element (such as germanium) with a group III element (such as boron) forms a p-type semiconductor; doping a group IV element (such as germanium) with a group V element (for example, phosphorus), an n-type semiconductor is formed. Accordingly, it is apparent that these analogous variant methods are obtained by the method A of the present invention detailed above.

To sum up, the present invention realizes a high-speed, small pixel size, CMOS-compatible short-wave infrared image sensor (with a focal plane array) with a low-cost and relatively simpler manufacturing process, which is suitable for industrial mass production. Meanwhile, the image sensor manufactured by the method of the present invention has lower dark current and higher sensitivity from visible light to short-wave infrared wavelengths. In addition, in the method of the present invention, the germanium donor wafer can be reused to generate more germanium transfer layers, the resource utilization rate is higher, and the manufacturing cost is lower.

The above description is only a preferred embodiment of the present invention, but the protection scope of the present invention is not limited to this. Substitutions should be covered within the protection scope of the present invention. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the appended claims.

Claims (12)

1. A method of integrating a germanium p-i-n photodiode into an image sensor structure, comprising the steps of:

step S1, providing a germanium donor wafer;

step S2, hydrogen ion (H)⁺) Implanting a germanium donor wafer to a selected depth to determine the thickness of a germanium transfer layer, the germanium transfer layer being a germanium film to be transferred;

step S3, providing a silicon target wafer;

step S4, bonding the surfaces of the germanium donor wafer and the silicon target wafer by beta;

step S5, separating the germanium transfer layer from the germanium donor wafer to obtain a germanium-silicon mixed wafer; separating the germanium transfer layer bonded and adhered on the silicon target wafer from the germanium donor wafer by using a thermal technology or a mechanical technology to obtain a mixed wafer formed by the germanium transfer layer and the silicon target wafer;

step S6, finishing the final bonding of the germanium-silicon mixed wafer;

step S7, grinding the surface of the germanium transfer layer of the germanium-silicon mixed wafer;

step S8, doping element ion boron ion (B)⁺) Implanting a germanium transfer layer at the top of the germanium-silicon mixed crystal dome part, implanting boron into the part of the germanium transfer layer close to the surface to form a doped germanium layer, wherein the other part close to the silicon target wafer is an undoped germanium layer;

step S9, forming a pixel-to-pixel isolation structure in the germanium photodiode layer to define a photodiode region;

step S10, turning over the germanium-silicon mixed wafer;

in step S11, a carrier coated with a temporary adhesive is provided.

2. The method of integrating a germanium p-i-n photodiode into an image sensor structure of claim 1, further comprising the step after step S11 of:

step S12, temporarily bonding/adhering the side of the germanium-silicon mixed wafer with the flowable medium material to a carrier through a temporary adhesive;

step S13, removing most of the silicon target wafer by grinding until the bottom 13 of the pixel isolation;

step S14, depositing a dielectric passivation layer on the surface of the residual silicon layer facing to the outer side;

step S15, forming metal connections separately for the residual silicon layer and the doped germanium layer;

in step S16, an alignment mark is formed on the surface of the dielectric passivation layer facing the outside.

3. The method of integrating a germanium p-i-n photodiode into an image sensor structure of claim 2, further comprising the step after step S16 of:

step S17, providing a silicon control and readout circuit wafer;

step S18, butting the outward surface of the interconnection layer of the silicon control and readout circuit wafer with the outward surface of the dielectric passivation layer of the germanium photodiode layer temporarily bonded to the carrier, and ensuring the alignment of the interconnection layer and the dielectric passivation layer through alignment marks on the interconnection layer and the dielectric passivation layer so as to connect the metal connection of the germanium photodiode layer with the circuit of the interconnection layer;

step S19, annealing to complete bonding;

step S20, carrying out laser bond/debonding and removing the carrier;

step S21, removing the surface dielectric layer by chemical mechanical polishing;

step S22, depositing an anti-reflection layer on the surface formed by the doped germanium layer and the inter-trench dielectric layer;

in step S23, a lens layer is formed on top of the anti-reflection layer.

4. The method of claim 1, wherein in step S1, the germanium donor wafer is cleaned and dried, and then the surface of the germanium donor wafer is polished by a chemical mechanical polishing process.

5. The method of claim 4, wherein the step S1 of providing the germanium donor wafer further comprises depositing a plasma enhanced chemical vapor deposition silicon dioxide film on the germanium donor wafer, the silicon dioxide film having a thickness of between 10nm and 90nm, to protect the surface of the germanium donor wafer during the subsequent step S2 of hydrogen ion implantation.

6. The method of claim 4, wherein the step of providing a germanium donor wafer of step S1 further comprises: depositing a layer of plasma enhanced chemical vapor deposition silicon dioxide film on the germanium donor wafer, wherein the thickness of the silicon dioxide film is between 10nm and 90nm, so as to protect the surface of the germanium donor wafer during the subsequent hydrogen ion implantation of step S2, and the silicon dioxide film can be removed after the hydrogen ion implantation.

7. The method of claim 1 wherein the hydrogen ion implantation in step S2 is performed by beam-line ion implantation or plasma immersion ion implantation.

8. A method of integrating a germanium p-i-n photodiode into an image sensor structure according to any one of claims 1 or 7, characterized in that an amorphous germanium layer is deposited on top of the formed germanium transfer layer region.

9. The method of claim 4 wherein the selective lift-off energy placement method uses energy pulse technology by providing localized energy pulses.

10. The method of claim 9 wherein hydrogen ions (H) are incorporated into the image sensor structure⁺) And implanting a germanium donor wafer, capturing electrons by the implanted hydrogen ions to form hydrogen, forming a micro bubble layer in the bubble layer by the hydrogen, parallel to the cleavage plane, heating the germanium-silicon mixed wafer, and stripping along the cleavage plane.

11. The method of claim 10, wherein the separated ge donor wafer is reusable by grinding and cleaning the surface; that is, a germanium donor wafer is repeatedly used as the raw material in step S2 to generate a germanium transfer layer until the thickness is too thin to be used.

12. The method of integrating a germanium p-i-n photodiode into an image sensor structure as claimed in any one of claims 4 or 7, wherein step S6 is performed in a final bonding of a germanium-silicon hybrid wafer, wherein the final bonding step employs an annealing bonding step, which lasts for several hours under a process environment of less than or equal to 400 degrees celsius.

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