CN1382995A - Digital measuring method of frequency and phase - Google Patents
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Abstract
本发明涉及一种频率和相位的数字测量方法,属电路参数测量技术领域。本发明方法对交流输入信号进行采样,借助两组预处理获得相位相差90°的两个信号,然后基于这两个信号大小计算出被锁相位数据,并进一步基于锁相结构实现频率和相位的测量。这样,能够充分利用信号波形本身包含的相位信息,并按照采样速度更新被锁相位数据,提高了相位鉴别的分析精度,同时也能够提高锁相跟踪的速度,减少测量时间。此外,本发明方法的相位鉴别环节是通过对被锁相位和锁相相位取差的方式获得的。所以当锁相基本稳定时,锁相相位能够以零均值偏差逼近被锁相位,这就从根本上克服了单纯依据过零点计算相位,严重受到噪声干扰的不足,使得相位测量精度大大提高。
The invention relates to a digital measurement method for frequency and phase, belonging to the technical field of circuit parameter measurement. The method of the present invention samples the AC input signal, obtains two signals with a phase difference of 90° by means of two sets of preprocessing, and then calculates the phase-locked data based on the magnitude of the two signals, and further realizes the frequency and phase based on the phase-locked structure. Measurement. In this way, the phase information contained in the signal waveform itself can be fully utilized, and the phase-locked data can be updated according to the sampling speed, which improves the analysis accuracy of phase discrimination, improves the speed of phase-locked tracking, and reduces the measurement time. In addition, the phase identification link of the method of the present invention is obtained by taking the difference between the locked phase and the locked phase. Therefore, when the phase-locking is basically stable, the phase-locking phase can approach the locked phase with zero mean deviation, which fundamentally overcomes the problem that the phase is only calculated based on the zero-crossing point and is seriously disturbed by noise, and the phase measurement accuracy is greatly improved.
Description
技术领域technical field
本发明涉及一种频率和相位的数字测量方法,该方法基于锁相原理测量某一频率的交流输入信号的频率和相位数据,属电路参数测量技术领域。The invention relates to a digital measurement method of frequency and phase. The method measures the frequency and phase data of an AC input signal of a certain frequency based on a phase-locking principle, and belongs to the technical field of circuit parameter measurement.
背景技术Background technique
在通讯、家电、仪器仪表及自动控制等领域中,常常需要测量某一交流信号的频率及其在某一时刻的相位。一种传统的测量频率和相位的方法是基于锁相环设计的。参考国际标准号码为0070050503的《锁相环:原理,设计和应用》一书中介绍的对交流信号的数字锁相技术,可以得到如图1所示的测量信号频率和相位的方法。输入的交流信号u先通过基于过零比较原理的整形处理,得到数字脉冲形式的方波信号u′;信号u′经过数字鉴相和环路滤波处理得到分频数N;分频数N控制以分频方式实现的可控振荡信号发生部分产生出计数脉冲信号;这个计数脉冲再经过M倍分频,得到锁相信号;锁相信号反馈回数字鉴相部分,这样就构成了锁相系统的反馈环路。当锁相稳定时,被锁信号的频率f与环路滤波得到的分频数N成反比。设这个反比系数为G,于是根据公式f=G/N即可得到所测交流信号的频率f。另一方面,如果对振荡信号发生部分产生的计数脉冲信号进行计数,而且依据信号u′的上升沿或者下降沿,对这个计数过程进行清零则可以获得一个计数值,对这个计数值进行转换和相位补偿就可以得到交流信号的相位数据。In the fields of communications, home appliances, instrumentation, and automatic control, it is often necessary to measure the frequency of an AC signal and its phase at a certain moment. A traditional method of measuring frequency and phase is based on a phase-locked loop design. Referring to the digital phase-locking technology for AC signals introduced in the book "Phase-Locked Loop: Principles, Design and Application" with the international standard number 0070050503, the method for measuring signal frequency and phase as shown in Figure 1 can be obtained. The input AC signal u first undergoes shaping processing based on the zero-crossing comparison principle to obtain a square wave signal u' in the form of a digital pulse; the signal u' is processed by digital phase detection and loop filtering to obtain the frequency division number N; the frequency division number N control The controllable oscillation signal generation part realized by frequency division generates a counting pulse signal; the counting pulse is then divided by M times to obtain a phase-locking signal; the phase-locking signal is fed back to the digital phase-detection part, thus forming a phase-locking system feedback loop. When the phase lock is stable, the frequency f of the locked signal is inversely proportional to the frequency division number N obtained by loop filtering. Let this inverse coefficient be G, then the frequency f of the AC signal to be measured can be obtained according to the formula f=G/N. On the other hand, if the counting pulse signal generated by the oscillating signal generation part is counted, and the counting process is cleared according to the rising edge or falling edge of the signal u', a counting value can be obtained, and the counting value is converted And phase compensation can get the phase data of the AC signal.
上述的基于锁相环实现的频率和相位的测量方法存在一些不足。首先,信号经过整形后再锁相的方法只能够依据交流信号的过零点进行频率和相位测量,而没有利用交流信号本身的幅值变化所包含的相位角度信息,所以锁相环达到稳定的时间往往是数倍的被锁信号周期,频率和相位的测量速度比较慢。第二,求取相位数据前的脉冲计数需要信号u′的上升沿或者下降沿来清零,也就是相位的测量要依赖对输入交流信号u的过零点的检测,但由于噪声对过零点的偏移影响,过零点检测的精度将严重影响到相位数据的测量精度。第三,锁相稳定后振荡信号发生部分产生的计数脉冲频率是被锁信号频率的M倍,而一个周期内相位数据的变化次数也依赖于M的大小,M越大,相位变化的跨度越小,相位测量也越精细。但是M太大,也将使锁相系统的稳定性变差。第四,输入振荡信号发生部分的可控分频数据N的有效位数将影响所测频率数据f的测量精度,而要增大N,势必要增大振荡信号发生部分所需的固定频率信号源的频率,或者需要采用复杂的具有小数控制位的分频技术。最后,上述频率和相位的测量方法难于在微处理器中实现,不利于设计和推广应用。There are some deficiencies in the above-mentioned frequency and phase measurement method based on the phase-locked loop. First of all, the method of phase-locking the signal after shaping can only measure the frequency and phase according to the zero-crossing point of the AC signal, but does not use the phase angle information contained in the amplitude change of the AC signal itself, so the time for the phase-locked loop to stabilize It is often several times the period of the locked signal, and the measurement speed of frequency and phase is relatively slow. Second, the pulse count before obtaining the phase data needs to be cleared by the rising or falling edge of the signal u′, that is, the measurement of the phase depends on the detection of the zero-crossing point of the input AC signal u, but due to the noise on the zero-crossing point Offset, the accuracy of zero-crossing detection will seriously affect the measurement accuracy of phase data. Third, the frequency of counting pulses generated by the oscillation signal generation part after the phase-locking is stable is M times the frequency of the locked signal, and the number of phase data changes in one cycle also depends on the size of M. The larger M is, the shorter the span of phase changes will be. The smaller the value, the finer the phase measurement. However, if M is too large, the stability of the phase-locked system will also be deteriorated. Fourth, the effective number of digits of the controllable frequency division data N of the input oscillating signal generating part will affect the measurement accuracy of the measured frequency data f, and to increase N, it is necessary to increase the fixed frequency signal required by the oscillating signal generating part source frequency, or complex frequency division techniques with fractional control bits are required. Finally, the above frequency and phase measurement methods are difficult to implement in a microprocessor, which is not conducive to design and popularization.
发明内容 Contents of the invention
本发明的目的在于提出一种频率和相位的数字测量方法,该方法也将基于锁相原理设计,但是希望能够克服上述传统的测量频率和相位的锁相方法的不足,使测量系统能够充分利用交流信号波形变化本身所包含的信息,快速锁定被测信号,并且不再单纯依赖信号过零点来计算相位,从本质上提高相位测量精度。此外,该方法将基于数字信号处理方法设计,从而在测量精度和测量速度上获得改善并易于控制。最后,该方法将有利于方便地采用基于微处理芯片的软件实现。The purpose of the present invention is to propose a digital measurement method of frequency and phase, which will also be designed based on the principle of phase locking, but it is hoped that it can overcome the shortcomings of the above-mentioned traditional phase locking method for measuring frequency and phase, so that the measurement system can fully utilize The information contained in the change of the AC signal waveform itself can quickly lock the measured signal, and no longer rely solely on the zero-crossing point of the signal to calculate the phase, which essentially improves the phase measurement accuracy. In addition, the method will be designed based on a digital signal processing method, resulting in improvements in measurement accuracy and measurement speed and ease of control. Finally, the method will facilitate easy adoption of microprocessor-based software implementations.
本发明提出的频率和相位的数字测量方法,包括以下步骤:The digital measuring method of the frequency and the phase that the present invention proposes comprises the following steps:
1、对需要测量频率和相位的交流输入信号u(t)同时进行第一组采样预处理和第二组采样预处理,分别得到离散信号u1(n)和u2(n)。如果输入的被测交流信号u(t)的频率上限为fmax、频率下限为fmin,前述的两组采样预处理过程应该选择相同的采样频率,如果采样频率设为Fs,则Fs应大于3fmax;此外,这两组采样预处理过程还应该满足如下条件:1. Simultaneously perform the first set of sampling preprocessing and the second set of sampling preprocessing on the AC input signal u(t) whose frequency and phase need to be measured, to obtain discrete signals u 1 (n) and u 2 (n) respectively. If the upper frequency limit of the input AC signal u(t) to be tested is f max and the lower frequency limit is f min , the aforementioned two sampling preprocessing processes should select the same sampling frequency. If the sampling frequency is set to F s , then F s should be greater than 3f max ; in addition, the two sets of sampling preprocessing processes should also meet the following conditions:
假设输入的被测交流信号为u(t)=Umsin(2πft+θ),其中f是该交流信号的频率,且满足fmin<f<fmax,θ是该交流信号的初相位,则u(t)经过第一组采样预处理后,所得信号u1(n)应该具有如下形式:
2、将上述第1步得到的离散数字信号u1(n)和u2(n)组合成原点为O的笛卡儿坐标系中的点A的坐标(u2(n),u1(n)),则由此获得的矢量 与横轴正方向的夹角将用以作为被锁相位数据α0(n)。2. Combining the discrete digital signals u 1 (n) and u 2 (n) obtained in the first step above into the coordinates of point A in the Cartesian coordinate system with the origin O (u 2 (n), u 1 ( n)), then the resulting vector The included angle with the positive direction of the horizontal axis will be used as the locked phase data α 0 (n).
3、将上述第2步得到的被锁相位数据α0(n)与从输出频率f(n)反馈回来的、且经过积分和下述第7步相位跳变调整处理后的锁相相位数据α′(n)取差,得到相位误差Δα(n)。3. Combine the phase-locked data α 0 (n) obtained in the second step above with the phase-locked phase data fed back from the output frequency f(n) and processed by integration and following step 7 phase jump adjustment α'(n) takes the difference to get the phase error Δα(n).
4、将上述第3步求出的相位误差Δα(n)经过环路滤波处理,从而获得被测信号的频率f(n);上述环路滤波处理过程中,其复频域传递函数HLP(s)的形式为:同时使测量过程的传递函数 稳定,并且使具有低通滤波性能,H′(s)的通带截止频率fLF小于被锁信号频率的下限fmin。4. Process the phase error Δα(n) obtained in the third step above through loop filtering to obtain the frequency f(n) of the signal under test; during the above loop filtering process, its complex frequency domain transfer function H LP (s) is of the form: While making the transfer function of the measurement process stable and make It has low-pass filtering performance, and the cut-off frequency f LF of H'(s) is smaller than the lower limit f min of the locked signal frequency.
5、将上述第4步得到的被测信号的频率f(n)与下述第7步得到的锁相相位数据α′(n)按照如下公式进行积分累加:
6、对上述第2步得到的被锁相位数据α0(n)进行象限跳变检测,获得跳变检测数据J(n)。这个跳变检测的判断阈值常数设为JTH,数据JTH应该满足的约束,于是跳变检测数据J(n)与被锁相位α0(n)的关系可以按照如下公式表示: 6. Perform quadrant jump detection on the phase-locked data α 0 (n) obtained in the second step above to obtain jump detection data J(n). The judgment threshold constant of this jump detection is set to J TH , and the data J TH should satisfy constraints, so the relationship between the jump detection data J(n) and the locked phase α 0 (n) can be expressed according to the following formula:
7、对上述第5步得到的中间相位数据α1(n)和上述第6步得到的跳变检测数据J(n)相加,即α′(n)=α1(n)+J(n),得到用以输入到上述第3步处理从而构成锁相环路的锁相相位数据α′(n)。7. Add the intermediate phase data α 1 (n) obtained in the above-mentioned
8、对上述第6步得到的中间相位数据α1(n)进行相位补偿和数据调整处理,即α(n)=α1(n)-θ1(f(n))+K·2π,其中,函数θ1(f)是上述第1步中第一组采样预处理对输入信号产生的相移函数,K是一个调整系数,其取值为使α(n)满足0≤α(n)<2π的整数,最后得到的数据α(n)就是所需测量的信号相位。8. Perform phase compensation and data adjustment processing on the intermediate phase data α 1 (n) obtained in the sixth step above, that is, α(n)=α 1 (n)-θ 1 (f(n))+K·2π, Among them, the function θ 1 (f) is the phase shift function generated by the first group of sampling preprocessing on the input signal in the first step above, K is an adjustment coefficient, and its value is such that α(n) satisfies 0≤α(n )<2π, the final data α(n) is the signal phase to be measured.
本发明提出的频率和相位的数字测量方法,从基本结构上仍然利用了锁相环的工作原理,通过反馈环路的相位跟踪特性,在上述发明步骤中的第4步测量出信号的频率,在上述发明步骤的最后第8步中测量出信号的当前相位。但是本发明方法对输入信号不再采用过零整形的预处理方法,而是直接对交流信号进行采样,借助两组预处理获得相位相差90°的两个信号u1(n)和u2(n),然后基于这两个信号大小计算出被锁相位数据α0(n)。这样,能够充分利用信号波形本身包含的相位信息,并且能够按照采样速度更新被锁相位数据,从而提高了相位鉴别的分析精度,同时也能够提高锁相跟踪的速度,减少测量时间。此外,本发明方法的相位鉴别环节是通过对被锁相位α0(n)和锁相相位α′(n)取差的方式获得的。所以当锁相基本稳定时,锁相相位能够以零均值偏差逼近被锁相位,这就从根本上克服了单纯依据过零点计算相位,严重受到噪声干扰的不足,使得相位测量精度大大提高。最后还应该指出的是,本发明方法除了第1步中对信号采样的处理步骤外,其它的处理环节都可以采用软件方式设计实现。通过调整设计参数和数据精度控制整个测量过程的速度、精度和稳定性是比较容易的,而且能够方便地基于各种微处理芯片实现这个测量过程。The digital measurement method of frequency and phase that the present invention proposes still utilizes the working principle of phase-locked loop from basic structure, by the phase tracking characteristic of feedback loop, the 4th step in the above-mentioned inventive step measures the frequency of signal, The current phase of the signal is measured in the last eighth step of the inventive steps described above. However, the method of the present invention no longer adopts the zero-crossing shaping preprocessing method for the input signal, but directly samples the AC signal, and obtains two signals u 1 (n) and u 2 ( n), and then calculate the phase-locked data α 0 (n) based on the two signal magnitudes. In this way, the phase information contained in the signal waveform can be fully utilized, and the phase-locked data can be updated according to the sampling speed, thereby improving the analysis accuracy of phase identification, and at the same time improving the speed of phase-locking tracking and reducing measurement time. In addition, the phase identification link of the method of the present invention is obtained by taking the difference between the locked phase α 0 (n) and the locked phase α'(n). Therefore, when the phase-locking is basically stable, the phase-locking phase can approach the locked phase with zero mean deviation, which fundamentally overcomes the problem that the phase is only calculated based on the zero-crossing point and is seriously disturbed by noise, and the phase measurement accuracy is greatly improved. Finally, it should be pointed out that, except for the signal sampling processing step in the first step, other processing links can be designed and realized by software. It is relatively easy to control the speed, precision and stability of the entire measurement process by adjusting design parameters and data accuracy, and this measurement process can be conveniently realized based on various micro-processing chips.
附图说明Description of drawings
图1是已有的基于锁相环测量信号频率和相位的方法的原理框图。Fig. 1 is a functional block diagram of an existing method for measuring signal frequency and phase based on a phase-locked loop.
图2是本发明频率和相位的数字测量方法的原理框图。Fig. 2 is a functional block diagram of the digital measurement method of frequency and phase of the present invention.
图3是本发明第一个实施例中输入信号分别经过第一组采样预处理和第二组采样预处理后得到的波形曲线。Fig. 3 is a waveform curve obtained after the input signal is respectively subjected to the first group of sampling preprocessing and the second group of sampling preprocessing in the first embodiment of the present invention.
图4是本发明第一个实施例中环路滤波处理的实现框图。Fig. 4 is a block diagram of realization of loop filtering processing in the first embodiment of the present invention.
图5是本发明第一个实施例中传递函数H′(s)的幅频特性曲线。Fig. 5 is an amplitude-frequency characteristic curve of the transfer function H'(s) in the first embodiment of the present invention.
图6是本发明第一个实施例测量过程的锁相跟踪频率曲线。Fig. 6 is a phase-locked tracking frequency curve of the measurement process in the first embodiment of the present invention.
图7是本发明第一个实施例在0~0.4秒区间的相位跟踪曲线。Fig. 7 is a phase tracking curve in the interval of 0-0.4 seconds in the first embodiment of the present invention.
图8是本发明第一个实施例在1~1.4秒区间的相位跟踪曲线。Fig. 8 is a phase tracking curve in the interval of 1-1.4 seconds in the first embodiment of the present invention.
具体实施方法Specific implementation method
本发明频率和相位的数字测量方法的第一个实施例用于对50Hz左右的交流电压信号进行频率和相位的测量,其实现的原理框图如图2所示。具体的处理步骤如下:The first embodiment of the digital frequency and phase measurement method of the present invention is used to measure the frequency and phase of an AC voltage signal around 50 Hz, and its realization principle block diagram is shown in FIG. 2 . The specific processing steps are as follows:
1、对需要测量频率和相位的、频率在45~65Hz范围内的交流信号u(t),首先以采样频率Fs=1000Hz对信号u(t)进行模数变换,并进一步对离散数据进行第一组移相滤波F1处理,得到信号u1(n),从而完成第一组采样预处理;以同样的采样频率Fs=1000Hz对信号u(t)进行模数变换,并进一步对离散数据进行第二组移相滤波F2处理,得到信号u2(n),从而完成第二组采样预处理。1. For the AC signal u(t) whose frequency and phase need to be measured and whose frequency is in the range of 45-65Hz, first perform analog-to-digital conversion on the signal u(t) at the sampling frequency F s =1000Hz, and further perform discrete data conversion The first group of phase-shifting filter F1 processing to obtain the signal u 1 (n), thus completing the first group of sampling preprocessing; with the same sampling frequency F s = 1000Hz, the analog-to-digital conversion is performed on the signal u(t), and the discrete The data is processed by the second group of phase-shift filtering F2 to obtain the signal u 2 (n), thereby completing the second group of sampling preprocessing.
上述第一组移相滤波F1是无限冲激响应IIR类型的低通数字滤波,其频域传输特性HF1(ejω)具有如下形式:
B1=[-0.081603248,-0.6662151,2.0287446,-1.3020016]B1=[-0.081603248, -0.6662151, 2.0287446, -1.3020016]
A1=[1.3020016,-2.0287446,0.6662151,0.081603248]A1=[1.3020016, -2.0287446, 0.6662151, 0.081603248]
依据数字滤波设计理论可知,数字滤波F1是因果的,即是可实现的。而且进一步分析可知这个滤波处理是稳定的。According to the theory of digital filter design, digital filter F1 is causal, that is, achievable. And further analysis shows that this filtering process is stable.
上述第二组移相滤波F2也是无限冲激响应IIR类型的低通数字滤波,其频域传输特性HF2(ejω)具有如下形式:
B2=[-0.37078953,1.2327431,-0.94007795]B2 = [-0.37078953, 1.2327431, -0.94007795]
A2=[0.94007795,-1.2327431,0.37078953]A2 = [0.94007795, -1.2327431, 0.37078953]
依据数字滤波设计理论可知,数字滤波F2也是因果的,即是可实现的。而且进一步分析可知这个滤波处理是稳定的。According to the digital filter design theory, the digital filter F2 is also causal, that is, it can be realized. And further analysis shows that this filtering process is stable.
这两组数字滤波在45~65Hz范围内幅值增益都是1,而其相移特性相差90°。如果有一个幅值为1、频率为50Hz的正弦交流信号u(t)=sin(2π×50×t)(伏),对u(t)按照采样率Fs=1000Hz进行模数变换后的信号为u(n),经过前述第一组采样预处理后得到输出信号u1(n),同时经过前述第二组采样预处理后得到输出信号u2(n),则在第100至150个采样点范围内的u(n)、u1(n)和u2(n)的实际波形曲线如图3所示,其中u(n)、u1(n)和u2(n)的曲线分别对应图3中的u、u1和u2。从图中可以看出,在相位关系上u2(n)信号正好超前u1(n)信号90°。The amplitude gain of these two groups of digital filters is 1 within the range of 45-65Hz, and their phase-shift characteristics differ by 90°. If there is a sinusoidal AC signal u(t)=sin(2π×50×t) (volts) with an amplitude of 1 and a frequency of 50Hz, the analog-to-digital conversion of u(t) according to the sampling rate F s =1000Hz The signal is u(n), the output signal u 1 (n) is obtained after the first group of sampling preprocessing, and the output signal u 2 (n) is obtained after the second group of sampling preprocessing, then the 100th to 150th The actual waveform curves of u(n), u 1 (n) and u 2 (n) within the range of sampling points are shown in Figure 3, where u(n), u 1 (n) and u 2 (n) The curves correspond to u, u1 and u2 in Figure 3, respectively. It can be seen from the figure that the u 2 (n) signal is just 90° ahead of the u 1 (n) signal in terms of phase relationship.
2、将上述第1步得到的离散数字信号u1(n)和u2(n)组合为原点为O的笛卡儿坐标系中的点A的坐标(u2(n),u1(n)),则由此获得的矢量 与横轴正方向的夹角将用以作为被锁相位数据α0(n)。实施例中取-π≤α0(n)<π,则这个处理过程也可以按照如下公式进行计算: 2. Combining the discrete digital signals u 1 (n) and u 2 (n) obtained in the first step above into the coordinates of point A in the Cartesian coordinate system with the origin O (u 2 (n), u 1 ( n)), then the resulting vector The included angle with the positive direction of the horizontal axis will be used as the locked phase data α 0 (n). In the embodiment, if -π≤α 0 (n)<π, this process can also be calculated according to the following formula:
3、将上述第2步得到的被锁相位数据α0(n)与从输出频率f(n)反馈回来的且经过积分和下述第7步的相位跳变调整处理后得到的锁相相位数据α′(n)取差,得到相位误差Δα(n),计算公式为:3. Combine the phase-locked data α 0 (n) obtained in the second step above with the phase-locked phase that is fed back from the output frequency f(n) and obtained after integration and phase jump adjustment in the seventh step below Take the difference of the data α′(n) to get the phase error Δα(n), the calculation formula is:
Δα(n)=α0(n)-α′(n)Δα(n)=α 0 (n)-α′(n)
4、将上述第3步求出的Δα(n)经过环路滤波处理,得到被锁信号的频率f(n)。可以参照图4的原理结构来实现这个环路滤波处理。具体过程为:相位误差Δα(n)经过积分环节后得到y1(n);同时,相位误差Δα(n)也经过比例延迟环节得到y2(n);对y1(n)和y2(n)进行求和得到y(n),即y(n)=y1(n)+y2(n);y(n)再经过一阶惯性环节得到需要测量的信号频率f(n)。4. The frequency f(n) of the locked signal is obtained by processing Δα(n) obtained in the third step above through loop filtering. This loop filtering process can be implemented with reference to the principle structure in FIG. 4 . The specific process is: the phase error Δα(n) gets y 1 (n) after the integral link; at the same time, the phase error Δα(n) also gets y 2 (n) through the proportional delay link; for y 1 (n) and y 2 (n) sum to get y(n), that is, y(n)=y 1 (n)+y 2 (n); y(n) gets the signal frequency f(n) to be measured through the first-order inertia link .
其中,积分环节的计算公式为:Among them, the calculation formula of the integral link is:
y1(n)=y1(n-1)+0.0362666·Δα(n)由此,积分环节的复频域传递函数形式可以近似表达为:
y2(n)=0.804868·y2(n-1)+0.708540·Δα(n)比例延迟环节的复频域传递函数近似为:
f(n)=0.932642f(n-1)+0.067358y(n)惯性环节的复频域传递函数形式近似为:
于是,整个环路滤波处理部分的复频域传递函数HLP(s)的形式为:
由此,计算出的锁相系统的传输特性为:
5、将上述第4步得到的被测信号的频率f(n)与下述第7步得到的锁相相位数据α′(n)按照如下公式进行积分累加:5. The frequency f(n) of the measured signal obtained in the
α1(n)=α′(n-1)+0.002π·f(n)得到中间相位数据α1(n)。α 1 (n)=α′(n-1)+0.002π·f(n) to obtain intermediate phase data α 1 (n).
6、对上述第2步得到的被锁相位数据α0(n)进行象限跳变检测,获得跳变检测数据J(n)。设定跳变检测的判断阈值常数为JTH=4,由于fmax=65Hz,所以数据JTH满足跳变检测数据J(n)的计算公式是: 6. Perform quadrant jump detection on the phase-locked data α 0 (n) obtained in the second step above to obtain jump detection data J(n). Set the judgment threshold constant of jump detection as J TH =4, since f max =65Hz, so the data J TH satisfies The calculation formula of jump detection data J(n) is:
7、对上述第5步得到的中间相位数据α1(n)和上述第6步得到的跳变检测数据J(n)相加,即α′(n)=α1(n)+J(n),得到用以输入到上述第3步从而构成锁相环路的锁相相位数据α′(n)。7. Add the intermediate phase data α 1 (n) obtained in the above-mentioned
8、对上述第6步得到的中间相位数据α1(n)进行相位补偿和数据调整处理。上述第1步中,第一组采样预处理对输入信号产生的相移函数可以用如下近似公式计算(单位:弧度)8. Perform phase compensation and data adjustment processing on the intermediate phase data α 1 (n) obtained in the sixth step above. In the first step above, the phase shift function generated by the first group of sampling preprocessing on the input signal can be calculated by the following approximate formula (unit: radian)
θ1(f)=0.822384-0.0574974·f+0.000256414·f2 θ 1 (f)=0.822384-0.0574974·f+0.000256414·f 2
(45≤f≤65)于是,输出的被测相位(单位:弧度)为:(45≤f≤65) So, the output measured phase (unit: radian) is:
α(n)=α1(n)-θ1(f(n))+K·2π其中,K是一个调整系数,其取值为使α(n)满足0 ≤α(n)<2π的整数。α(n)=α 1 (n)-θ 1 (f(n))+K·2π Among them, K is an adjustment coefficient whose value makes α(n) satisfy 0 ≤ α(n)<2π integer.
采用本发明第一个实施例对一输入信号进行频率和相位的测量。输入信号在0~1秒内是一个频率为50Hz、基波幅值为1伏的正弦交流信号u(t),经过一秒后,该输入信号的频率跳变到55Hz,其基波幅值仍然为1伏。此外,从0~2秒内该信号始终包含有2~20次的谐波和噪声,二次谐波的幅值达到0.2伏。本发明实施例在0~2秒内对输入信号的频率跟踪曲线如图6所示,经过0.4秒时间频率基本锁定。锁定后,输出的频率数据f(n)仍然有一定波动,这是由于谐波和噪声所引起的。但是,由波动的幅度可见:本测量系统对谐波和噪声已经具有较强的抑制作用。此外,图7给出了实施例在0~0.4秒的时间段内的相位跟踪曲线;图8给出了实施例在1~1.4秒的时间段内的相位跟踪曲线。The first embodiment of the present invention is used to measure the frequency and phase of an input signal. The input signal is a sinusoidal AC signal u(t) with a frequency of 50 Hz and a fundamental wave amplitude of 1 volt within 0 to 1 second. After one second, the frequency of the input signal jumps to 55 Hz, and its fundamental wave amplitude Still at 1 volt. In addition, from 0 to 2 seconds, the signal always contains 2 to 20 harmonics and noise, and the amplitude of the second harmonic reaches 0.2 volts. The frequency tracking curve of the embodiment of the present invention for the input signal within 0-2 seconds is shown in FIG. 6 , and the frequency is basically locked after 0.4 seconds. After locking, the output frequency data f(n) still fluctuates to a certain extent, which is caused by harmonics and noise. However, it can be seen from the amplitude of the fluctuation that the measurement system already has a strong suppression effect on harmonics and noise. In addition, FIG. 7 shows the phase tracking curve of the embodiment within the time period of 0-0.4 seconds; FIG. 8 shows the phase tracking curve of the embodiment within the time period of 1-1.4 seconds.
本发明频率和相位的数字测量方法的第二个实施例是针对三相电网的,用来测量A相电压信号的频率和相位。The second embodiment of the frequency and phase digital measurement method of the present invention is aimed at a three-phase power grid, and is used to measure the frequency and phase of the A-phase voltage signal.
假设三相电网的A相电压为:Suppose the A-phase voltage of the three-phase power grid is:
uA(t)=Umsin(2πft+)其中为A相电压的初相位。则B相、C相的电压分别为:u A (t) = U m sin (2πft + ) where is the initial phase of the A-phase voltage. Then the voltages of phase B and phase C are respectively:
uB(t)=Umsin(2πft-120°+)u B (t)=U m sin(2πft-120°+)
uC(t)=Umsin(2πft+120°+)CB线电压为:u C (t)=U m sin (2πft+120°+) CB line voltage is:
uCB(t)=uC(t)-uB(t)可见,CB线电压信号uCB(t)超前A相电压信号uA(t)相位90°。u CB (t)=u C (t)-u B (t) It can be seen that the CB line voltage signal u CB (t) is ahead of the phase A voltage signal u A (t) by 90°.
在本发明第二个实施例的第1步处理中,首先对输入的A相电压uA(t)以频率Fs=1000Hz进行采样,并直接得到第一组采样预处理输出:第二组采样预处理则利用了电网本身对三相电压的相移特性。具体步骤是:首先对C相、B相之间的线电压按照频率Fs=1000Hz进行采样,得到信号uCB(n),然后按照如下公式进行计算:随后的第2~7步与第一个实施例完全相同,不再赘述。第二个实施例的第8步中,所取的移相函数为θ1(f)=0,然后按照公式α(n)=α1(n)-θ1(f(n))+K·2π计算出所测的A相电压信号的相位。通过测量出A相电压的频率和相位,也就可以进一步得到电网频率和B、C相的相位。In the first step of processing in the second embodiment of the present invention, the input phase A voltage u A (t) is first sampled at a frequency F s =1000 Hz, and the first group of sampling preprocessing outputs are directly obtained: The second group of sampling preprocessing utilizes the phase shift characteristics of the grid itself to the three-phase voltage. The specific steps are: first, the line voltage between phase C and phase B is sampled according to the frequency F s =1000Hz to obtain the signal u CB (n), and then calculated according to the following formula: Subsequent steps 2-7 are exactly the same as those in the first embodiment, and will not be repeated here. In the 8th step of the second embodiment, the phase shift function taken is θ 1 (f)=0, then according to formula α (n)=α 1 (n)-θ 1 (f (n))+K 2π calculates the phase of the measured A-phase voltage signal. By measuring the frequency and phase of the A-phase voltage, the grid frequency and the phases of the B and C phases can be further obtained.
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