CN1505151A - 自修复半导体及其方法 - Google Patents
自修复半导体及其方法 Download PDFInfo
- Publication number
- CN1505151A CN1505151A CNA031348041A CN03134804A CN1505151A CN 1505151 A CN1505151 A CN 1505151A CN A031348041 A CNA031348041 A CN A031348041A CN 03134804 A CN03134804 A CN 03134804A CN 1505151 A CN1505151 A CN 1505151A
- Authority
- CN
- China
- Prior art keywords
- units
- functional
- subfunctional
- self
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/232—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising connection or disconnection of parts of a device in response to a measurement
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2023—Failover techniques
- G06F11/2028—Failover techniques eliminating a faulty processor or activating a spare
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2051—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant in regular structures
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
- G11C29/848—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by adjacent switching
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US43019902P | 2002-12-02 | 2002-12-02 | |
| US60/430,199 | 2002-12-02 | ||
| US10/358,709 US7185225B2 (en) | 2002-12-02 | 2003-02-05 | Self-reparable semiconductor and method thereof |
| US10/358,709 | 2003-02-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1505151A true CN1505151A (zh) | 2004-06-16 |
| CN1310326C CN1310326C (zh) | 2007-04-11 |
Family
ID=32474176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB031348041A Expired - Lifetime CN1310326C (zh) | 2002-12-02 | 2003-09-24 | 自修复半导体及其方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US7185225B2 (zh) |
| EP (1) | EP1434134B1 (zh) |
| JP (1) | JP2004214619A (zh) |
| CN (1) | CN1310326C (zh) |
| TW (1) | TWI281547B (zh) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7418574B2 (en) | 2002-10-31 | 2008-08-26 | Lockheed Martin Corporation | Configuring a portion of a pipeline accelerator to generate pipeline date without a program instruction |
| US20060001669A1 (en) | 2002-12-02 | 2006-01-05 | Sehat Sutardja | Self-reparable semiconductor and method thereof |
| US7340644B2 (en) * | 2002-12-02 | 2008-03-04 | Marvell World Trade Ltd. | Self-reparable semiconductor and method thereof |
| US7889752B2 (en) * | 2003-06-05 | 2011-02-15 | Marvell International Ltd. | Dual ported network physical layer |
| US7271641B1 (en) * | 2003-06-05 | 2007-09-18 | Marvell International Ltd. | Self-repairable semiconductor with analog switching circuit |
| US8775997B2 (en) | 2003-09-15 | 2014-07-08 | Nvidia Corporation | System and method for testing and configuring semiconductor functional circuits |
| US8732644B1 (en) | 2003-09-15 | 2014-05-20 | Nvidia Corporation | Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits |
| US8788996B2 (en) | 2003-09-15 | 2014-07-22 | Nvidia Corporation | System and method for configuring semiconductor functional circuits |
| US7266721B2 (en) * | 2003-09-25 | 2007-09-04 | International Business Machines Corporation | Runtime repairable processor |
| US8711161B1 (en) | 2003-12-18 | 2014-04-29 | Nvidia Corporation | Functional component compensation reconfiguration system and method |
| US8723231B1 (en) | 2004-09-15 | 2014-05-13 | Nvidia Corporation | Semiconductor die micro electro-mechanical switch management system and method |
| US8711156B1 (en) * | 2004-09-30 | 2014-04-29 | Nvidia Corporation | Method and system for remapping processing elements in a pipeline of a graphics processing unit |
| WO2006039710A2 (en) * | 2004-10-01 | 2006-04-13 | Lockheed Martin Corporation | Computer-based tool and method for designing an electronic circuit and related system and library for same |
| US9135017B2 (en) * | 2007-01-16 | 2015-09-15 | Ati Technologies Ulc | Configurable shader ALU units |
| US8724483B2 (en) | 2007-10-22 | 2014-05-13 | Nvidia Corporation | Loopback configuration for bi-directional interfaces |
| US20090144678A1 (en) * | 2007-11-30 | 2009-06-04 | International Business Machines Corporation | Method and on-chip control apparatus for enhancing process reliability and process variability through 3d integration |
| US8679861B2 (en) | 2007-11-29 | 2014-03-25 | International Business Machines Corporation | Semiconductor chip repair by stacking of a base semiconductor chip and a repair semiconductor chip |
| US8600276B2 (en) * | 2010-01-27 | 2013-12-03 | Ricoh Company, Limited | Heat conduction unit, fixing device, and image forming apparatus |
| US9331869B2 (en) | 2010-03-04 | 2016-05-03 | Nvidia Corporation | Input/output request packet handling techniques by a device specific kernel mode driver |
| US9304848B2 (en) * | 2013-01-15 | 2016-04-05 | International Business Machines Corporation | Dynamic accessing of execution elements through modification of issue rules |
| WO2015141153A1 (ja) * | 2014-03-17 | 2015-09-24 | 日本電気株式会社 | プログラマブル論理集積回路 |
| US20160378628A1 (en) * | 2015-06-26 | 2016-12-29 | Intel Corporation | Hardware processors and methods to perform self-monitoring diagnostics to predict and detect failure |
Family Cites Families (39)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US4566102A (en) * | 1983-04-18 | 1986-01-21 | International Business Machines Corporation | Parallel-shift error reconfiguration |
| US4882687A (en) * | 1986-03-31 | 1989-11-21 | Schlumberger Technology Corporation | Pixel processor |
| US4933895A (en) * | 1987-07-10 | 1990-06-12 | Hughes Aircraft Company | Cellular array having data dependent processing capabilities |
| JPH0289299A (ja) | 1988-09-27 | 1990-03-29 | Nec Corp | 半導体記憶装置 |
| US5617365A (en) | 1988-10-07 | 1997-04-01 | Hitachi, Ltd. | Semiconductor device having redundancy circuit |
| US5203005A (en) | 1989-05-02 | 1993-04-13 | Horst Robert W | Cell structure for linear array wafer scale integration architecture with capability to open boundary i/o bus without neighbor acknowledgement |
| US5072379A (en) * | 1989-05-26 | 1991-12-10 | The United States Of America As Represented By The Adminstrator Of The National Aeronautics And Space Administration | Network of dedicated processors for finding lowest-cost map path |
| US5142469A (en) * | 1990-03-29 | 1992-08-25 | Ge Fanuc Automation North America, Inc. | Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller |
| US5274593A (en) * | 1990-09-28 | 1993-12-28 | Intergraph Corporation | High speed redundant rows and columns for semiconductor memories |
| US5204836A (en) | 1990-10-30 | 1993-04-20 | Sun Microsystems, Inc. | Method and apparatus for implementing redundancy in parallel memory structures |
| CA2068048A1 (en) | 1991-05-06 | 1992-11-07 | Douglas D. Cheung | Fault tolerant processing section with dynamically reconfigurable voting |
| US6047122A (en) * | 1992-05-07 | 2000-04-04 | Tm Patents, L.P. | System for method for performing a context switch operation in a massively parallel computer system |
| CA2129882A1 (en) * | 1993-08-12 | 1995-02-13 | Soheil Shams | Dynamically reconfigurable interprocessor communication network for simd multiprocessors and apparatus implementing same |
| JPH0823874B2 (ja) * | 1993-11-18 | 1996-03-06 | 株式会社ジーデイーエス | シストリックアレイプロセサー |
| EP1046994A3 (en) * | 1994-03-22 | 2000-12-06 | Hyperchip Inc. | Efficient direct cell replacement fault tolerant architecture supporting completely integrated systems with means for direct communication with system operator |
| US5574718A (en) * | 1994-07-01 | 1996-11-12 | Dsc Communications Corporation | Signal protection and monitoring system |
| JP3365581B2 (ja) * | 1994-07-29 | 2003-01-14 | 富士通株式会社 | 自己修復機能付き情報処理装置 |
| US5530798A (en) * | 1994-11-01 | 1996-06-25 | United Microelectronics Corp. | Apparatus and method for cascading graphic processors |
| US6240535B1 (en) * | 1995-12-22 | 2001-05-29 | Micron Technology, Inc. | Device and method for testing integrated circuit dice in an integrated circuit module |
| US5737766A (en) * | 1996-02-14 | 1998-04-07 | Hewlett Packard Company | Programmable gate array configuration memory which allows sharing with user memory |
| US6526461B1 (en) * | 1996-07-18 | 2003-02-25 | Altera Corporation | Interconnect chip for programmable logic devices |
| US6138256A (en) * | 1998-03-27 | 2000-10-24 | Micron Technology, Inc. | Intelligent binning for electrically repairable semiconductor chips |
| US6021512A (en) * | 1996-11-27 | 2000-02-01 | International Business Machines Corporation | Data processing system having memory sub-array redundancy and method therefor |
| DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
| US6256758B1 (en) | 1999-03-03 | 2001-07-03 | Agere Systems Guardian Corp. | Fault tolerant operation of field programmable gate arrays |
| KR100370232B1 (ko) | 1999-04-28 | 2003-01-29 | 삼성전자 주식회사 | 결함 셀을 리던던시 셀로의 대체를 반복 수행할 수 있는 리던던시 회로 |
| US6816143B1 (en) | 1999-11-23 | 2004-11-09 | Koninklijke Philips Electronics N.V. | Self diagnostic and repair in matrix display panel |
| US6618819B1 (en) * | 1999-12-23 | 2003-09-09 | Nortel Networks Limited | Sparing system and method to accommodate equipment failures in critical systems |
| US6775529B1 (en) | 2000-07-31 | 2004-08-10 | Marvell International Ltd. | Active resistive summer for a transformer hybrid |
| US6530049B1 (en) | 2000-07-06 | 2003-03-04 | Lattice Semiconductor Corporation | On-line fault tolerant operation via incremental reconfiguration of field programmable gate arrays |
| JP3636986B2 (ja) * | 2000-12-06 | 2005-04-06 | 松下電器産業株式会社 | 半導体集積回路 |
| US6785841B2 (en) * | 2000-12-14 | 2004-08-31 | International Business Machines Corporation | Processor with redundant logic |
| CN1319237C (zh) * | 2001-02-24 | 2007-05-30 | 国际商业机器公司 | 超级计算机中通过动态重新划分的容错 |
| US20050078115A1 (en) * | 2001-11-30 | 2005-04-14 | Buchmeier Anton Georg | Method for determination of a separation from processor units to at least one reference position in a processor arrangement and processor arrangement |
| US7017074B2 (en) * | 2002-03-12 | 2006-03-21 | Sun Microsystems, Inc. | System architecture providing redundant components to improve die yields and system reliability |
| US7336283B2 (en) * | 2002-10-24 | 2008-02-26 | Hewlett-Packard Development Company, L.P. | Efficient hardware A-buffer using three-dimensional allocation of fragment memory |
| US20040123181A1 (en) * | 2002-12-20 | 2004-06-24 | Moon Nathan I. | Self-repair of memory arrays using preallocated redundancy (PAR) architecture |
| JP2004272527A (ja) * | 2003-03-07 | 2004-09-30 | Hitachi Ltd | ディスクアレイ装置および障害回復制御方法 |
| US7117389B2 (en) * | 2003-09-18 | 2006-10-03 | International Business Machines Corporation | Multiple processor core device having shareable functional units for self-repairing capability |
-
2003
- 2003-02-05 US US10/358,709 patent/US7185225B2/en not_active Expired - Lifetime
- 2003-07-23 TW TW92120125A patent/TWI281547B/zh not_active IP Right Cessation
- 2003-09-24 CN CNB031348041A patent/CN1310326C/zh not_active Expired - Lifetime
- 2003-11-10 JP JP2003380433A patent/JP2004214619A/ja active Pending
- 2003-11-24 EP EP03026882.5A patent/EP1434134B1/en not_active Expired - Lifetime
-
2006
- 2006-11-08 US US11/594,312 patent/US7313723B2/en not_active Expired - Lifetime
- 2006-11-08 US US11/594,390 patent/US7373547B2/en not_active Expired - Lifetime
- 2006-11-08 US US11/594,537 patent/US7657784B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US20070055845A1 (en) | 2007-03-08 |
| US20070055906A1 (en) | 2007-03-08 |
| US7185225B2 (en) | 2007-02-27 |
| US7373547B2 (en) | 2008-05-13 |
| JP2004214619A (ja) | 2004-07-29 |
| EP1434134A3 (en) | 2005-07-20 |
| EP1434134B1 (en) | 2015-09-23 |
| TWI281547B (en) | 2007-05-21 |
| US7313723B2 (en) | 2007-12-25 |
| US7657784B2 (en) | 2010-02-02 |
| CN1310326C (zh) | 2007-04-11 |
| US20040153752A1 (en) | 2004-08-05 |
| EP1434134A2 (en) | 2004-06-30 |
| TW200409928A (en) | 2004-06-16 |
| US20070055907A1 (en) | 2007-03-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP02 | Change in the address of a patent holder |
Address after: Babado J San Michaele Patentee after: Marvell International Ltd. Address before: Barbados, Bermuda, Hamilton Patentee before: Marvell International Ltd. |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20210112 Address after: Hamilton, Bermuda Patentee after: Marvell International Ltd. Address before: Babado J San Michaele Patentee before: Marvell International Ltd. Effective date of registration: 20210112 Address after: Grand Cayman Islands Patentee after: Kavim International Inc. Address before: Hamilton, Bermuda Patentee before: Marvell International Ltd. Effective date of registration: 20210112 Address after: Shin ha Po Patentee after: Marvell Asia Pte. Ltd. Address before: Grand Cayman Islands Patentee before: Kavim International Inc. |
|
| TR01 | Transfer of patent right | ||
| CX01 | Expiry of patent term |
Granted publication date: 20070411 |
|
| CX01 | Expiry of patent term |
