DD299990A5 - Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung - Google Patents
Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung Download PDFInfo
- Publication number
- DD299990A5 DD299990A5 DD338097A DD33809790A DD299990A5 DD 299990 A5 DD299990 A5 DD 299990A5 DD 338097 A DD338097 A DD 338097A DD 33809790 A DD33809790 A DD 33809790A DD 299990 A5 DD299990 A5 DD 299990A5
- Authority
- DD
- German Democratic Republic
- Prior art keywords
- layer
- conductive
- insulating layer
- bottom plate
- contact window
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/42—Vias, e.g. via plugs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DD338097A DD299990A5 (de) | 1990-02-23 | 1990-02-23 | Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung |
| EP91102082A EP0443439B1 (fr) | 1990-02-23 | 1991-02-14 | Dispositif de mémoire comprenant un transistor et son procédé de fabrication |
| DE59106693T DE59106693D1 (de) | 1990-02-23 | 1991-02-14 | Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung. |
| DE59109236T DE59109236D1 (de) | 1990-02-23 | 1991-02-14 | DRAM-Zellenstruktur mit Kondensator über Bitleitung und Verfahren zu deren Herstellung |
| AT91102082T ATE129363T1 (de) | 1990-02-23 | 1991-02-14 | Ein-transistor-speicherzellenanordnung und verfahren zu deren herstellung. |
| EP94101691A EP0600850B1 (fr) | 1990-02-23 | 1991-02-14 | Structure de cellule DRAM avec condensateur sur la ligne de bit et procédé de sa manufacture |
| DE4105501A DE4105501A1 (de) | 1990-02-23 | 1991-02-19 | Ein-transistor-speicherzellenanordnung und verfahren zu deren herstellung |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DD338097A DD299990A5 (de) | 1990-02-23 | 1990-02-23 | Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DD299990A5 true DD299990A5 (de) | 1992-05-14 |
Family
ID=5616632
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DD338097A DD299990A5 (de) | 1990-02-23 | 1990-02-23 | Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung |
Country Status (4)
| Country | Link |
|---|---|
| EP (2) | EP0600850B1 (fr) |
| AT (1) | ATE129363T1 (fr) |
| DD (1) | DD299990A5 (fr) |
| DE (3) | DE59109236D1 (fr) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR930009594B1 (ko) * | 1991-01-30 | 1993-10-07 | 삼성전자 주식회사 | 고집적 반도체 메모리장치 및 그 제조방법 |
| GB2279176B (en) * | 1991-05-23 | 1995-06-07 | Samsung Electronics Co Ltd | DRAM cell capacitor |
| KR940006587B1 (ko) * | 1991-05-23 | 1994-07-22 | 삼성전자 주식회사 | 디램셀의 캐패시터 제조방법 |
| TW243541B (fr) * | 1991-08-31 | 1995-03-21 | Samsung Electronics Co Ltd | |
| GB2293690B (en) * | 1991-08-31 | 1996-06-19 | Samsung Electronics Co Ltd | Manufacturing method for a semiconductor device |
| TW222710B (fr) * | 1991-09-07 | 1994-04-21 | Samsung Electronics Co Ltd | |
| US5150276A (en) * | 1992-01-24 | 1992-09-22 | Micron Technology, Inc. | Method of fabricating a vertical parallel cell capacitor having a storage node capacitor plate comprising a center fin effecting electrical communication between itself and parallel annular rings |
| DE4221434A1 (de) * | 1992-06-30 | 1994-01-05 | Siemens Ag | Herstellverfahren für einen Speicherkondensator |
| DE4222467C1 (fr) * | 1992-07-08 | 1993-06-24 | Siemens Ag, 8000 Muenchen, De | |
| JP2953220B2 (ja) * | 1992-10-30 | 1999-09-27 | 日本電気株式会社 | 半導体装置の製造方法 |
| KR950021644A (ko) * | 1993-12-31 | 1995-07-26 | 김주용 | 반도체 기억장치 및 그 제조방법 |
| KR0126640B1 (ko) * | 1994-05-07 | 1998-04-02 | 김주용 | 반도체소자 및 그 제조방법 |
| GB2322964B (en) * | 1997-03-07 | 2001-10-17 | United Microelectronics Corp | Polysilicon CMP process for high-density DRAM cell structures |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4855801A (en) * | 1986-08-22 | 1989-08-08 | Siemens Aktiengesellschaft | Transistor varactor for dynamics semiconductor storage means |
| JP2702121B2 (ja) * | 1987-02-25 | 1998-01-21 | 日本電気株式会社 | 半導体記憶装置 |
| US4872050A (en) * | 1988-03-15 | 1989-10-03 | Mitsubishi Denki Kabushiki Kaisha | Interconnection structure in semiconductor device and manufacturing method of the same |
| JP2755591B2 (ja) * | 1988-03-25 | 1998-05-20 | 株式会社東芝 | 半導体記憶装置 |
| JPH01302852A (ja) * | 1988-05-31 | 1989-12-06 | Fujitsu Ltd | 半導体メモリのメモリセル構造 |
| JPH01302851A (ja) * | 1988-05-31 | 1989-12-06 | Fujitsu Ltd | 半導体メモリのメモリセル構造 |
| JPH01308069A (ja) * | 1988-06-07 | 1989-12-12 | Fujitsu Ltd | 半導体メモリのメモリセル構造 |
| DE3918924C2 (de) * | 1988-06-10 | 1996-03-21 | Mitsubishi Electric Corp | Herstellungsverfahren für eine Halbleiterspeichereinrichtung |
| JP2724209B2 (ja) * | 1989-06-20 | 1998-03-09 | シャープ株式会社 | 半導体メモリ素子の製造方法 |
-
1990
- 1990-02-23 DD DD338097A patent/DD299990A5/de unknown
-
1991
- 1991-02-14 EP EP94101691A patent/EP0600850B1/fr not_active Expired - Lifetime
- 1991-02-14 DE DE59109236T patent/DE59109236D1/de not_active Expired - Fee Related
- 1991-02-14 EP EP91102082A patent/EP0443439B1/fr not_active Expired - Lifetime
- 1991-02-14 DE DE59106693T patent/DE59106693D1/de not_active Expired - Fee Related
- 1991-02-14 AT AT91102082T patent/ATE129363T1/de not_active IP Right Cessation
- 1991-02-19 DE DE4105501A patent/DE4105501A1/de not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| EP0600850B1 (fr) | 2002-05-29 |
| EP0443439B1 (fr) | 1995-10-18 |
| EP0443439A3 (en) | 1991-10-02 |
| DE4105501A1 (de) | 1991-08-29 |
| ATE129363T1 (de) | 1995-11-15 |
| DE59109236D1 (de) | 2002-07-04 |
| EP0443439A2 (fr) | 1991-08-28 |
| DE59106693D1 (de) | 1995-11-23 |
| EP0600850A1 (fr) | 1994-06-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| NAB | Public notice for inspection of provisional exclusive patent accord. to par 17/1 dd-patg. |