DK0978968T3 - Höjhastigheds switch matrix routningskredslöb med flowkontrol - Google Patents

Höjhastigheds switch matrix routningskredslöb med flowkontrol

Info

Publication number
DK0978968T3
DK0978968T3 DK99250262T DK99250262T DK0978968T3 DK 0978968 T3 DK0978968 T3 DK 0978968T3 DK 99250262 T DK99250262 T DK 99250262T DK 99250262 T DK99250262 T DK 99250262T DK 0978968 T3 DK0978968 T3 DK 0978968T3
Authority
DK
Denmark
Prior art keywords
word
switch circuit
transceiver
master
clock
Prior art date
Application number
DK99250262T
Other languages
Danish (da)
English (en)
Inventor
John P Mullaney
Gary M Lee
Original Assignee
Vitesse Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vitesse Semiconductor Corp filed Critical Vitesse Semiconductor Corp
Application granted granted Critical
Publication of DK0978968T3 publication Critical patent/DK0978968T3/da

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
    • H04L49/1576—Crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling
    • H04L2012/5674—Synchronisation, timing recovery or alignment
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679—Arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5684—Characteristics of traffic flows
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Electronic Switches (AREA)
  • Small-Scale Networks (AREA)
DK99250262T 1998-08-05 1999-08-03 Höjhastigheds switch matrix routningskredslöb med flowkontrol DK0978968T3 (da)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/129,662 US6377575B1 (en) 1998-08-05 1998-08-05 High speed cross point switch routing circuit with word-synchronous serial back plane

Publications (1)

Publication Number Publication Date
DK0978968T3 true DK0978968T3 (da) 2005-06-06

Family

ID=22441017

Family Applications (1)

Application Number Title Priority Date Filing Date
DK99250262T DK0978968T3 (da) 1998-08-05 1999-08-03 Höjhastigheds switch matrix routningskredslöb med flowkontrol

Country Status (6)

Country Link
US (3) US6377575B1 (fr)
EP (1) EP0978968B1 (fr)
JP (1) JP2000078204A (fr)
AT (1) ATE289724T1 (fr)
DE (1) DE69923814T2 (fr)
DK (1) DK0978968T3 (fr)

Families Citing this family (104)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3406790B2 (ja) * 1996-11-25 2003-05-12 株式会社東芝 データ転送システム及びデータ転送方法
US6377575B1 (en) * 1998-08-05 2002-04-23 Vitesse Semiconductor Corporation High speed cross point switch routing circuit with word-synchronous serial back plane
US7233977B2 (en) * 1998-12-18 2007-06-19 Emc Corporation Messaging mechanism employing mailboxes for inter processor communications
US7778259B1 (en) 1999-05-14 2010-08-17 Dunti Llc Network packet transmission mechanism
US6917661B1 (en) * 1999-09-24 2005-07-12 Cypress Semiconductor Corp. Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detector
US7570724B1 (en) * 1999-10-14 2009-08-04 Pluris, Inc. Method of link word synchronization
JP2003536289A (ja) * 2000-02-25 2003-12-02 テラバースト ネットワークス インコーポレーティッド 広帯域通信スイッチ・アレイ
US6668106B1 (en) 2000-02-25 2003-12-23 Teraburst Networks, Inc. Crosspoint microwave switching architecture for optical telecommunications
GB0006291D0 (en) * 2000-03-15 2000-05-03 Lucent Technologies Inc Data communication link
US7274705B2 (en) 2000-10-03 2007-09-25 Broadcom Corporation Method and apparatus for reducing clock speed and power consumption
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
JP3584873B2 (ja) * 2000-10-31 2004-11-04 ヤマハ株式会社 通信制御装置及び通信システム
US6810270B1 (en) * 2000-11-02 2004-10-26 Ericsson Inc. Providing reference signal to radio heads
US20030070033A9 (en) * 2001-02-09 2003-04-10 Zabinski Patrick Joseph Parallel and point-to-point data bus architecture
US20020126659A1 (en) * 2001-03-07 2002-09-12 Ling-Zhong Liu Unified software architecture for switch connection management
JP2002281063A (ja) * 2001-03-21 2002-09-27 Nec Corp パケットスイッチ及びそれに用いるパケットメモリアクセス方法
US20030070126A1 (en) * 2001-09-14 2003-04-10 Werner Carl W. Built-in self-testing of multilevel signal interfaces
US7200153B2 (en) * 2001-09-20 2007-04-03 Intel Corporation Method and apparatus for autosensing LAN vs WAN to determine port type
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
WO2003085906A1 (fr) * 2002-04-11 2003-10-16 Philips Intellectual Property & Standards Gmbh Synchronising cell transmission for packet switching
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
US7330489B1 (en) * 2002-11-26 2008-02-12 Cisco Technology, Inc. Distributed data synchronization apparatus and method
US7460535B2 (en) * 2002-12-18 2008-12-02 Synopsys, Inc. Device and method that allows single data recovery circuit to support multiple USB ports
US7869553B1 (en) * 2003-01-21 2011-01-11 Altera Corporation Digital phase locked loop circuitry and methods
US7535836B2 (en) * 2003-02-12 2009-05-19 Broadcom Corporation Method and system to provide word-level flow control using spare link bandwidth
US7343425B1 (en) 2003-02-21 2008-03-11 Marvell International Ltd. Multi-speed serial interface for media access control and physical layer devices
US7131023B2 (en) * 2003-05-30 2006-10-31 Lucent Technologies Inc. Programmable clock management component reconfiguration upon receipt of one or more control signals to be able to process one or more frequency signals
US7047350B2 (en) * 2003-10-10 2006-05-16 Freescale Semiconductor, Inc. Data processing system having a serial data controller
US7480358B2 (en) * 2004-02-25 2009-01-20 Infineon Technologies Ag CDR-based clock synthesis
US20050219083A1 (en) * 2004-03-16 2005-10-06 Boomer James B Architecture for bidirectional serializers and deserializer
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8458453B1 (en) 2004-06-11 2013-06-04 Dunti Llc Method and apparatus for securing communication over public network
US7672300B1 (en) 2004-07-22 2010-03-02 Marvell Israel (M.I.S.L.) Ltd. Network device with multiple MAC/PHY ports
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
EP1641178B1 (fr) * 2004-09-27 2006-11-29 BFT SpA Procede de communication et installation domotique pour sa mise en oeuvre
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US7284390B2 (en) * 2005-05-18 2007-10-23 Whirlpool Corporation Refrigerator with intermediate temperature icemaking compartment
US8089461B2 (en) 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
US20070019773A1 (en) * 2005-07-21 2007-01-25 Zhou Dacheng Henry Data clock recovery system and method employing phase shifting related to lag or lead time
US8467489B2 (en) * 2005-08-24 2013-06-18 Hewlett-Packard Development Company, L.P. Data clock recovery system and method employing delayed data clock phase shifting
US7248122B2 (en) * 2005-09-14 2007-07-24 Fairchild Semiconductor Corporation Method and apparatus for generating a serial clock without a PLL
US7475187B2 (en) * 2005-09-15 2009-01-06 Infineon Technologies Ag High-speed interface circuit for semiconductor memory chips and memory system including the same
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US7738448B2 (en) * 2005-12-29 2010-06-15 Telefonaktiebolaget Lm Ericsson (Publ) Method for generating and sending signaling messages
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US7769942B2 (en) * 2006-07-27 2010-08-03 Rambus, Inc. Cross-threaded memory system
EP1892877B1 (fr) * 2006-08-25 2008-12-03 Alcatel Lucent Récepteur à signaux numériques avec controle du Q-facteur
US7593273B2 (en) * 2006-11-06 2009-09-22 Altera Corporation Read-leveling implementations for DDR3 applications on an FPGA
JP4333763B2 (ja) * 2007-03-26 2009-09-16 コニカミノルタビジネステクノロジーズ株式会社 画像処理装置、記憶領域の管理方法、およびコンピュータプログラム
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US7975082B2 (en) * 2007-07-12 2011-07-05 Oracle America, Inc. System and method to facilitate deterministic testing of data transfers between independent clock domains on a chip
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US8683572B1 (en) 2008-01-24 2014-03-25 Dunti Llc Method and apparatus for providing continuous user verification in a packet-based network
US8219846B2 (en) * 2008-05-20 2012-07-10 Xilinx, Inc. Circuit for and method of receiving video data
US8300754B2 (en) * 2008-07-29 2012-10-30 Fujitsu Limited Clock and data recovery with a data aligner
US8917718B2 (en) * 2008-10-13 2014-12-23 Centurylink Intellectual Property Llc System, method, and apparatus for user-initiated provisioning of a communication device
WO2010093538A1 (fr) 2009-02-11 2010-08-19 Rambus Inc. Méthode de mémorisation à accès partagé
US8320770B2 (en) * 2009-03-20 2012-11-27 Fujitsu Limited Clock and data recovery for differential quadrature phase shift keying
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
US8503514B2 (en) * 2010-01-14 2013-08-06 Integrated Device Technology Inc. High speed switch with data converter physical ports
US8503515B2 (en) * 2010-01-14 2013-08-06 Integrated Device Technology Inc. High speed switch with data converter physical ports and processing unit
US8510487B2 (en) * 2010-02-11 2013-08-13 Silicon Image, Inc. Hybrid interface for serial and parallel communication
US8380940B2 (en) * 2010-06-25 2013-02-19 Qualcomm Incorporated Multi-channel multi-port memory
US9178692B1 (en) * 2011-02-24 2015-11-03 Broadcom Corporation Serial link training method and apparatus with deterministic latency
US9071243B2 (en) 2011-06-30 2015-06-30 Silicon Image, Inc. Single ended configurable multi-mode driver
US8760188B2 (en) 2011-06-30 2014-06-24 Silicon Image, Inc. Configurable multi-dimensional driver and receiver
AU2013248939B2 (en) * 2012-04-18 2015-05-07 Cisco Technology, Inc. A networking apparatus and a method for networking
JP2014003407A (ja) * 2012-06-16 2014-01-09 Sony Corp 通信装置、通信システム、および通信制御方法、並びにプログラム
US8885435B2 (en) 2012-09-18 2014-11-11 Silicon Image, Inc. Interfacing between integrated circuits with asymmetric voltage swing
US9306563B2 (en) 2013-02-19 2016-04-05 Lattice Semiconductor Corporation Configurable single-ended driver
CN104734838A (zh) * 2013-12-20 2015-06-24 深圳市国微电子有限公司 一种同步数据的方法、系统及交换矩阵
US9407574B2 (en) 2014-04-17 2016-08-02 Adva Optical Networking Se Using SerDes loopbacks for low latency functional modes with full monitoring capability
CN103984659B (zh) * 2014-05-15 2017-07-21 华为技术有限公司 分时使用串口的方法和装置
US20160132072A1 (en) 2014-11-10 2016-05-12 Intel Corporation Link layer signal synchronization
US9973833B2 (en) 2016-09-27 2018-05-15 Analog Devices, Inc. Parameter correction for cascaded signal components
US9661052B1 (en) * 2016-10-14 2017-05-23 International Business Machines Corporation Reconfiguring a streaming application to reduce latency mismatches
US9730089B1 (en) * 2016-12-23 2017-08-08 Quantenna Communications, Inc. Remote controlled WiFi transceiver for wireless home networks
DE102018005892A1 (de) * 2018-07-26 2020-01-30 WAGO Verwaltungsgesellschaft mit beschränkter Haftung Teilnehmer eines Datennetzes
KR102839632B1 (ko) * 2019-10-16 2025-07-28 삼성전자주식회사 인터페이싱 장치, 인터페이싱 장치를 포함하는 반도체 장치 및 반도체 장치의 통신 방법

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE329646B (fr) 1968-02-20 1970-10-19 Ericsson Telefon Ab L M
US3798378A (en) 1972-11-07 1974-03-19 Itt Frame synchronization system
DE2832855C3 (de) 1978-07-26 1981-01-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Übertragen von Daten
JPS55135450A (en) 1979-04-10 1980-10-22 Mitsubishi Electric Corp Synchronous signal formation for digital transmission signal
US4451916A (en) * 1980-05-12 1984-05-29 Harris Corporation Repeatered, multi-channel fiber optic communication network having fault isolation system
US4630045A (en) 1983-10-24 1986-12-16 International Business Machines Corporation Controller for a cross-point switching matrix
US4605928A (en) 1983-10-24 1986-08-12 International Business Machines Corporation Fault-tolerant array of cross-point switching matrices
US4646300A (en) 1983-11-14 1987-02-24 Tandem Computers Incorporated Communications method
US4752777A (en) 1985-03-18 1988-06-21 International Business Machines Corporation Delta network of a cross-point switch
US4719624A (en) 1986-05-16 1988-01-12 Bell Communications Research, Inc. Multilevel multiplexing
US4777640A (en) 1986-06-09 1988-10-11 Motorola, Inc. Frequency adaptive phase jitter canceler
US4821258A (en) 1986-08-06 1989-04-11 American Telephone And Telegraph Company At&T Bell Laboratories Crosspoint circuitry for data packet space division switches
US5245603A (en) 1987-10-15 1993-09-14 Network Equipment Technologies, Inc. High-speed determining unit for prioritizing and arbitrating among competing input signals
US4887076A (en) 1987-10-16 1989-12-12 Digital Equipment Corporation Computer interconnect coupler for clusters of data processing devices
US4958341A (en) * 1988-03-31 1990-09-18 At&T Bell Laboratories Integrated packetized voice and data switching system
KR950001179B1 (ko) 1989-07-31 1995-02-11 삼성전자 주식회사 디지틀 전송용 여파기의 지터 등화기 회로 및 방법
US5179552A (en) * 1990-11-26 1993-01-12 Bell Communications Research, Inc. Crosspoint matrix switching element for a packet switch
US5148113A (en) 1990-11-29 1992-09-15 Northern Telecom Ltd. Clock phase alignment
FR2685594B1 (fr) 1991-12-19 1994-01-28 Alcatel Telspace Dispositif de recuperation de rythme pour installation de reception utilisant l'egalisation auto-adaptative a sur-echantillonnage associee a la demodulation differentiellement coherente.
US5341369A (en) 1992-02-11 1994-08-23 Vitesse Semiconductor Corp. Multichannel self-routing packet switching network architecture
US5511070A (en) 1992-05-20 1996-04-23 Xerox Corporation Reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable for use in a local area network
JPH0637797A (ja) 1992-05-20 1994-02-10 Xerox Corp パケット交換網の予約リング機構
US5359630A (en) 1992-08-13 1994-10-25 Digital Equipment Corporation Method and apparatus for realignment of synchronous data
US5367520A (en) 1992-11-25 1994-11-22 Bell Communcations Research, Inc. Method and system for routing cells in an ATM switch
US5509008A (en) 1993-03-03 1996-04-16 Nippon Telegraph & Telephone Corp. High Speed ATM switch with simplified arbitration scheme and circuit configuration
JP2502920B2 (ja) 1993-08-20 1996-05-29 インターナショナル・ビジネス・マシーンズ・コーポレイション Atmスイッチにおける調停機構
US5452306A (en) 1993-09-07 1995-09-19 Southwestern Bell Technology Resources, Inc. Out-of-band embedded overhead architecture for a transmission network
DE69332333T2 (de) 1993-10-12 2003-05-15 Alcatel, Paris Synchronisierungsschaltung
US5361249A (en) * 1993-10-26 1994-11-01 Martin Marietta Corp. Fault tolerant switched communication system
US5481563A (en) 1994-03-14 1996-01-02 Network Systems Corporation Jitter measurement using a statistically locked loop
GB9408574D0 (en) * 1994-04-29 1994-06-22 Newbridge Networks Corp Atm switching system
DE4417954A1 (de) 1994-05-21 1995-11-23 Sel Alcatel Ag Synchronisationsverfahren sowie Synchronisationseinrichtungen, Endgerät und Vermittlungsstelle dafür
US5598443A (en) 1994-05-23 1997-01-28 At&T Global Information Solutions Company (Aka Ncr Corporation) Method and apparatus for separating data and clock from a digital data stream
EP0761049B1 (fr) * 1994-05-27 2000-08-30 BRITISH TELECOMMUNICATIONS public limited company Systeme de transmission de donnees dote d'un dispositif de commutation de canaux
JP3181471B2 (ja) 1994-06-17 2001-07-03 沖電気工業株式会社 クロック発生回路
US5689530A (en) 1994-06-22 1997-11-18 Alcatel Network Systems, Inc. Data recovery circuit with large retime margin
US5757857A (en) 1994-07-21 1998-05-26 The Regents Of The University Of California High speed self-adjusting clock recovery circuit with frequency detection
US5539784A (en) 1994-09-30 1996-07-23 At&T Corp. Refined timing recovery circuit
TW255079B (en) 1994-09-30 1995-08-21 At & T Corp Communications unit with data and clock recovery circuit
FR2726141B1 (fr) 1994-10-25 1997-01-03 Alcatel Mobile Comm France Correction d'un decalage de frequence
US5757872A (en) 1994-11-30 1998-05-26 Lucent Technologies Inc. Clock recovery circuit
KR0132811B1 (ko) 1994-12-31 1998-04-21 김광호 디지탈 데이터 복구장치
US5604735A (en) 1995-03-15 1997-02-18 Finisar Corporation High speed network switch
US5696800A (en) 1995-03-22 1997-12-09 Intel Corporation Dual tracking differential manchester decoder and clock recovery circuit
JPH08288981A (ja) * 1995-04-18 1996-11-01 Fujitsu Ltd 異モード間における二重化伝送装置の回線切替えシステム
SE506540C2 (sv) * 1995-06-13 1998-01-12 Ericsson Telefon Ab L M Synkronisering av överföring av data via en dubbelriktad länk
US5719908A (en) 1995-07-19 1998-02-17 Unisys Corporation Digital/analog bit synchronizer
US5757652A (en) 1995-12-21 1998-05-26 Tektronix, Inc. Electrical signal jitter and wander measurement system and method
US5761254A (en) 1996-01-31 1998-06-02 Advanced Micro Devices, Inc. Digital architecture for recovering NRZ/NRZI data
US6377575B1 (en) 1998-08-05 2002-04-23 Vitesse Semiconductor Corporation High speed cross point switch routing circuit with word-synchronous serial back plane

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Publication number Publication date
EP0978968A3 (fr) 2003-04-23
US6700886B2 (en) 2004-03-02
ATE289724T1 (de) 2005-03-15
US6801518B2 (en) 2004-10-05
EP0978968A2 (fr) 2000-02-09
JP2000078204A (ja) 2000-03-14
US20020061016A1 (en) 2002-05-23
US20020075845A1 (en) 2002-06-20
DE69923814T2 (de) 2006-02-09
DE69923814D1 (de) 2005-03-31
EP0978968B1 (fr) 2005-02-23
US6377575B1 (en) 2002-04-23

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