EP0051342B1 - Digitaler Mehrkanal-Sprachsynthesizer mit einstellbaren Parametern - Google Patents

Digitaler Mehrkanal-Sprachsynthesizer mit einstellbaren Parametern Download PDF

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Publication number
EP0051342B1
EP0051342B1 EP19810201230 EP81201230A EP0051342B1 EP 0051342 B1 EP0051342 B1 EP 0051342B1 EP 19810201230 EP19810201230 EP 19810201230 EP 81201230 A EP81201230 A EP 81201230A EP 0051342 B1 EP0051342 B1 EP 0051342B1
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EP
European Patent Office
Prior art keywords
speech
control
data
processing unit
interpolations
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Expired
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EP19810201230
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English (en)
French (fr)
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EP0051342A1 (de
Inventor
Petrus Gerardus Maria Maathuis
Maarten Roelof Oberman
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Staat der Nederlanden (Staatsbedrijf der Posterijen Telegrafie en Telefonie)
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Staat der Nederlanden (Staatsbedrijf der Posterijen Telegrafie en Telefonie)
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Publication of EP0051342A1 publication Critical patent/EP0051342A1/de
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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L13/00—Speech synthesis; Text to speech systems
    • G10L13/02—Methods for producing synthetic speech; Speech synthesisers
    • G10L13/04—Details of speech synthesis systems, e.g. synthesiser structure or memory management
    • G10L13/047—Architecture of speech synthesisers

Definitions

  • the invention relates to a digital multichannel speech synthesizer operating according to the linear-predictive-coding method, comprising:
  • a digital multichannel speech synthesizer is according to the invention characterized in that said speech generator in combination with control means are adapted to selectively vary the number of bits involved in the computation of each parameter and/or the number of parameters effective for generating synthesized speech, in dependence on the multichannel load; said control means comprising:
  • a multichannel synthesizer structured in accordance with the principles of the present invention inherently has the options to selectively control a) the number of interpolations between successively received samples of speech (set of parameters), and b) the number and/or "width dimension" (number of bits) of the parameters (filter coefficients) included in the respective speech samples. Therefore the quality of the synthesized speech can be improved when the traffic load is lowered.
  • the above embodiment is illustrative of a specific structure for the implementation of interpolation processes wherein on the basis of knowledge about the time available between successively received samples of speech, a correspondingly varied number of interpolations is carried out.
  • the further embodiment described above is illustrative of a specific structure by which on the basis of knowledge about the traffic load of the multichannel transmission path, (and therefore on the basis of available transmission time) the number of coefficients and/or the number of bits per coefficient can be correspondingly varied.
  • Fig. 1 is a general block diagram of a speech synthesizer.
  • the adjusting parameters for the device are designated by the letters a, b, c and d.
  • the circuit comprises a digital noise source 1, which generates white noise for unvoiced speech components, and a digital pitch generator 2, which generates the fundamental frequency for voiced speech components and is adjusted according to parameter a.
  • the choice between generators 1 and 2 is made by switch 3 as controlled by parameter b.
  • the digital signal is applied successively to an adjustable digital ladder filter 4, controlled by parameter c, and a digital volume regulator 5, controlled by parameter d.
  • a digital-to-analog converter 6 converts the digital signal into an analog signal.
  • Fig. 2 is a block diagram of the device according to the invention.
  • a digital input signal incorporating the parameters a, b, c and d is applied to input 7 of the speech synthesizer and led to a buffer 8.
  • the parameters a, b, c and d have been determined by the "linear predictive coding" method and can come from a storage medium, in the case of a message that has to be repeated regularly or from a transmission line.
  • a preprocessing unit 9 ensures the reading of the parameters and their storage in portion 10.1 of store 10, the interpolation of two successive groups of parameters, the transfer of the interpolation results to other parts of the circuit and the passing of control data to the central processing unit 11.
  • the data stored in store portion 10.1 can be transferred to a second store portion 10.2, when the preceding data stored in 10.2 have been processed. Processing takes place in a computing unit 12, which employs the interpolated data for adjusting the ladder filter (Fig. 1; 4) incorporated in the computing unit. In the meantime store portion 10.1 is filled again.
  • the computing unit 12 of this embodiment can compute the digital speech signals for 16 speech channels simultaneously. These digital speech signals are stored in "first-in-first-out" buffers 13.1... 13.16 (one signal per channel) and then led to digital-to-analog converters 6.1... 6.16, respectively.
  • the computing unit 12 is controlled in conformity with fixed rules by a control unit 14, which receives its instructions from the central processing unit 11.
  • Fig. 3 illustrates a preferred embodiment of the pre-processing unit 9 according to the invention, and store portion 10.1.
  • the data coming from the buffer (Fig. 2; 8) are led to a series-to-parallel converter 15.
  • the discriminator 16 infers from the first few bits of a 24-bit frame whether this frame contains speech data or control information, in which cases a data buffer 17 or a control buffer 18 is opened, respectively.
  • the speech data are led from the data buffer 17 via a data bus 19 to a microprocessor 20, which is connected to the central processing unit (Fig. 2; 11) via a control bus 21 and an address bus 22.
  • Store 23 (RAM) and decoding store 24 (ROM) are also connected to this data bus.
  • the circuit comprises an adder-multiplier 25 for carrying out parts of interpolation calculations.
  • the group of parameters comprises, as has already been observed, the following four:
  • the function of the speech data portion of the circuit of Fig. 3 is described as separating the parameters a, b, c and d and interpolating the parameters c and d. Interpolation is necessary, because the speech information arrives in bursts and because annoying clicks could occur without interpolation.
  • the coefficients and are generated by the microprocessor 20.
  • the reflection coefficients interpolated on the basis of rule (1) and the interpolated volume are led to store 10.1.
  • the pre-processing unit comprises means for adjusting the quality of the speech reproduced according to the degree of occupation of the transmission medium. Therefore, at the transmitting end, relevant data are sent along with the control signals. These data are interpreted in the function decoder 28.
  • the circuit comprises a register 29, for recording the number of interpolations to be carried out by the microprocessor 20 on the unvoiced part of the speech, and a register 30, which has an analogous function with regard to the voiced part of the speech. Registers 29 and 30 are connected to ROM store 31, which converts the number of interpolations to be carried out into a signal for positioning counter 32, stepping in synchronism with a counter incorporated in microprocessor 20.
  • the position of counter 32 is passed to a fraction table 33 (ROM), connected via a selector 34 to control bus 21 and address bus 22. Under the control of the central processing unit (Fig. 2; 11), the number of interpolations to be carried out by the microprocessor 20 can be fixed.
  • the circuit of Fig. 3 also contains registers 35 and 36 for recording adjusting data for the adjustable filter incorporated in the computing unit (Fig. 2; 12). The adjusting data for unvoiced speech are stored in register 35, those for voiced speech in register 36.
  • a ROM 37 converts the adjusting data into positioning data for counter 38. Via selector 39 the counter position is passed to buses 21 and 22, after which the number of calculations to be carried out by the control unit (Fig. 2: 14) is fixed under the control of the central processing unit (Fig. 2; 11).
  • the circuit may contain a register 40 for recording a signal indicating that the next one or two frames contain no speech.
  • the relevant data can be passed via selector 41 and buses 21 and 22 to the central processing unit (Fig. 2; 11), so that the computing unit (Fig. 2; 12) can spend the time thus saved in dealing with other channels.
  • the circuit may comprise a register 42 and a selector 43 for recording the signal indicating that one or two new frames contain the same information as the preceding frame, so that the new frames need not be transmitted. Because the preceding frame is in the buffer (Fig. 2; 8) for interpolation purposes, repetition will suffice, so that transmission capacity is saved. In an analogous way information concerning the degree of compression and expansion of the speech signal can be received and handled.
  • Fig. 4 illustrates a preferred elaboration of store 10.2, computing unit 12, buffers 13 and control unit 14.
  • the data stored in 10.1 (Fig. 2) are transferred to store 10.2 under the control of the central processing unit 11.
  • the data stored in 10.2, containing the information for computing the digital signal to be supplied to the buffers 13, are led to multipliers 44 and 45 working in parallel, adder-subtractor 46, AND-circuit 47 and D-flip-flop 48.
  • Selector 49 determines the number of bits to be calculated per PCM-word and a round-off factor.
  • D-flip-flop 50 ensures in a well-known manner the adaptation to bus traffic.
  • the results of a first calculation are written, for sixteen separate channels, in buffers 51, from which they can be output via D-flip-flops 52.
  • the voiced/ unvoiced and pitch data are sent via output 26 to electronic switch 3 and via output 27 to generator 2, respectively, and combined by means of D-flip-flop 53 with the digital signal to be calculated.
  • the whole algorithm can be represented by the following formulae: and in which and
  • Multipliers 44 and 45 ensure the multiplications and adder-subtractor 46 carries out the adding and subtracting operations.
  • the intermediate results of the operations are put away, every time, in the 51-buffer associated with the channel dealt with. Every time one sample has been calculated, its value is multiplied by the volume factor C n .
  • the various operations carried out on the data from store 10.2 are controlled by a programmable store (PROM) 54, which, under the control of a counter 55, makes a step every time after the calculation of one PCM-sample for each of the 16 channels.
  • the stepping of counter 55 is timed by clock 56.
  • Store 54 supplies the data required for carrying out the various operations via a control bus 57 and the address data for store 10 via address bus 58.
  • the last instruction in store 54 relates to writing the calculated final results in buffers 13 and signalling to the central processing unit 11 (Fig. 2) that the programme has finished. Then, under the control of central processing unit 11 (Fig. 2), a fresh set of data is transferred from store 10.1 to store 10.2, clock 56 being started in order to carry out again the programme contained in store 54.
  • the data produced by the programme will only be stored when the central processing unit 11 (Fig. 2) has found that the buffers 13 are not full. After the data have been stored in buffers 13, the programme is started again under the control of the central processing unit 11.
  • the invention provides a relatively simple device for generating, from an input signal produced by the LPC-method referred to hereinabove, an analog signal for a large number of channels.
  • the pre-processing unit 9 and the central processing unit 11 comprise microcomputers, for which the flow-charts are given in Figs. 5 and 6, respectively.
  • the arrangement is not relevant for a good understanding of the invention, so that the flow-chart need not be described in detail.

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  • Engineering & Computer Science (AREA)
  • Computational Linguistics (AREA)
  • Health & Medical Sciences (AREA)
  • Audiology, Speech & Language Pathology (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Claims (3)

1. Digitaler Mehrkanal-Sprachsynthesizer, der nach dem linearvorhersagenden Kodierverfahren arbeitet, umfassend:
- einen Sprachgenerator enthaltend: einen digitalen Geräuschgenerator (1), einen einstellbaren, digitalen Tonhöhegenerator (2) und einen steuerbaren Umschalter (3), um wahlweise einen dieser Generatoren (1, 2) mit einem Ausgang zu verbinden;
- ein einstellbares digitales Filter (4), um in Kombination mit dem Sprachgenerator digitale Sprachsignale für jedes einer Mehrzahl von Sprachsignalen zu erzeugen;
- Mittel (a, b) zum Einstellen dieses Sprachgenerators und zum Steuern dieses Umschalters mittels Steuersignalen; und
- Mittel zum Erzeugen interpolierter Parameter, dadurch gekennzeichnet, dass die Mittel zum Einstellen des Sprachgenerators, zusammen mit Regelmitteln (9; 10.1; 10.2; 11; 14; 12), so ausgebildet sind, dass sie selektiv die Anzahl der zum Errechnen jedes Parameters benützten Bits und/oder die Anzahl der zur Erzeugung synthetisierter Sprache benützten Parameter variieren in Abhängigkeit der Mehrkanal-Belastung; wobei die Regelmittel umfassen:
- eine Vorbehandlungseinheit (9) enthaltend Mittel (16, 18) zum Trennen von Steuersignalen von einem Mehrkanal-Spracheingang, Mittel (28, 29, 30, 31, 32, 33) zum Ableiten von die Anzahl der zwischen aufeinanderfolgend an diesem Eingang empfangenen Rahmen auszuführenden Interpolationen darstellenden Daten aus diesen Steuersignalen, und Mittel (20, 23, 24, 25) um diese Anzahl Interpolationen auszuführen; und
- einen Speicher (10) zum vorübergehenden Speichern der kodierten Sprachsignale für die Steuerung des einstellbaren Filters.
2. Synthsizer nach Anspruch 1, dadurch gekennzeichnet, dass die Vorbehandlungseinheit (9) zudem umfasst:
- einen Funktionsdekoder (28) zum Dekodieren von Steuersignalen von diesem Eingang;
- Register (29, 30), einen Wandler (31), eine Bruchtabelle (33) und einen Zähler (32), die im Zusammenwirken die Anzahl von auszuführenden Interpolationen auf Grund von Daten in diesen Steuersignalen ermitteln;
- einen Microprocessor (20), der in Antwort auf aus der Bruchtabelle (33) ermittelten Daten und auf Daten von einem Sprachdateneingang (19) die Berechnung der Anzahl Interpolationen steuert; und
- einen Addierer-Multiplizierer (25) zur Durchführung der Interpolationen unter Kontrolle dieses Microprocessors (20) und zum Weiterleiten der interpolierten Parameter an eine Recheneinheit (12) dieser Regelmittel (9; 10.1; 10.2; 11; 14; 12) über Verbindungsleitungen (26, 27).
3. Synthesizer nach Anspruch 2, dadurch gekennzeichnet, dass die Mittel zum Einstellen des Sprachgenerators zusammen mit den Regelmitteln (9; 10.1; 10.2; 11; 14; 12) umfassen:
- einen Serie-Parallel-Umwandler (15), der, gesteuert durch einen zentralen Processor (11), abhängig von der Mehrkanalbelastung selektiv die Anzahl der in den an seinem Eingang vorhandenen Parametern enthaltenen Bits variiert; und
- eine Hilfsregeleinheit (14), die, gesteuert durch den zentralen Processor (11), eine Recheneinheit (12) veranlasst, die Anzahl Parameter abhängig von der Mehrkanalbelastung zu errechnen.
EP19810201230 1980-10-31 1981-10-30 Digitaler Mehrkanal-Sprachsynthesizer mit einstellbaren Parametern Expired EP0051342B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8005989A NL8005989A (nl) 1980-10-31 1980-10-31 Inrichting voor digitale spraaksynthese voor meer kanalen met instelbare parameters.
NL8005989 1980-10-31

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EP0051342A1 EP0051342A1 (de) 1982-05-12
EP0051342B1 true EP0051342B1 (de) 1986-01-29

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101847404A (zh) * 2010-03-18 2010-09-29 北京天籁传音数字技术有限公司 一种实现音频变调的方法和装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3715512A (en) * 1971-12-20 1973-02-06 Bell Telephone Labor Inc Adaptive predictive speech signal coding system
US3975587A (en) * 1974-09-13 1976-08-17 International Telephone And Telegraph Corporation Digital vocoder
IT1165641B (it) * 1979-03-15 1987-04-22 Cselt Centro Studi Lab Telecom Sintetizzatore numerico multicanale della voce

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101847404A (zh) * 2010-03-18 2010-09-29 北京天籁传音数字技术有限公司 一种实现音频变调的方法和装置
CN101847404B (zh) * 2010-03-18 2012-08-22 北京天籁传音数字技术有限公司 一种实现音频变调的方法和装置

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NL8005989A (nl) 1982-05-17
DE3173669D1 (en) 1986-03-13
EP0051342A1 (de) 1982-05-12

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