EP0104616A3 - Statische Speicherzelle in Zwei-Kanal-Technik - Google Patents

Statische Speicherzelle in Zwei-Kanal-Technik Download PDF

Info

Publication number
EP0104616A3
EP0104616A3 EP83109453A EP83109453A EP0104616A3 EP 0104616 A3 EP0104616 A3 EP 0104616A3 EP 83109453 A EP83109453 A EP 83109453A EP 83109453 A EP83109453 A EP 83109453A EP 0104616 A3 EP0104616 A3 EP 0104616A3
Authority
EP
European Patent Office
Prior art keywords
gate
semiconductor body
area
memory cell
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP83109453A
Other languages
English (en)
French (fr)
Other versions
EP0104616A2 (de
Inventor
Armin Dr. Wieder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0104616A2 publication Critical patent/EP0104616A2/de
Publication of EP0104616A3 publication Critical patent/EP0104616A3/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)

Abstract

Speicherzelle, bei der zwei auf einem Halbleiterkörper angeordnete Schalttransistoren eines ersten Kanaltyps (T1, T2) über jeweils ein Lastelement des zweiten Kanaltyps (T3, T4) an eine Versorgungsspannung geschaltet sind, wobei die Schaltungsknoten (3, 4) den Drainanschlüssen der Schalt­ transistoren (T1, T2) entsprechen und mit dem Gate des jeweils anderen Schalttransistors sowie mit dem Gate des zu diesem in Serie liegenden Lastelements verbunden sind. Angestrebt wird eine flächensparende Ausbildung der Spei­ cherzelle. Das wird dadurch erreicht, daß jedes der Lastele­ mente aus stark dotierten Abschnitten einer isoliert auf dem Halbleiterkörper aufgebrachten Schicht aus polykristallinem Silizium besteht, sowie aus einem zwischen diesen Abschnit­ ten liegenden, schwach dotierten oder undotierten Teil der Schicht, der ein Kanalgebiet bildet. Unterhalb des letzteren befindet sich ein umdotiertes Gebiet des Halbleiterkörpers, das als Gategebiet dient. Der Anwendungsbereich umfaßt Speicherzellen für VLSI-Applikationen.
EP83109453A 1982-09-28 1983-09-22 Statische Speicherzelle in Zwei-Kanal-Technik Withdrawn EP0104616A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3235880 1982-09-28
DE19823235880 DE3235880A1 (de) 1982-09-28 1982-09-28 Statische speicherzelle in zwei-kanal-technik

Publications (2)

Publication Number Publication Date
EP0104616A2 EP0104616A2 (de) 1984-04-04
EP0104616A3 true EP0104616A3 (de) 1986-01-15

Family

ID=6174353

Family Applications (1)

Application Number Title Priority Date Filing Date
EP83109453A Withdrawn EP0104616A3 (de) 1982-09-28 1983-09-22 Statische Speicherzelle in Zwei-Kanal-Technik

Country Status (4)

Country Link
EP (1) EP0104616A3 (de)
JP (1) JPS5979568A (de)
CA (1) CA1208364A (de)
DE (1) DE3235880A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2567301B1 (fr) * 1984-07-05 1986-11-14 Commissariat Energie Atomique Cellule memoire statique cmos
US5061986A (en) * 1985-01-22 1991-10-29 National Semiconductor Corporation Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics
US5227316A (en) * 1985-01-22 1993-07-13 National Semiconductor Corporation Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size
US5045916A (en) * 1985-01-22 1991-09-03 Fairchild Semiconductor Corporation Extended silicide and external contact technology
DE3686490T2 (de) * 1985-01-22 1993-03-18 Fairchild Semiconductor Halbleiterstruktur.
US5072275A (en) * 1986-02-28 1991-12-10 Fairchild Semiconductor Corporation Small contactless RAM cell
US5100824A (en) * 1985-04-01 1992-03-31 National Semiconductor Corporation Method of making small contactless RAM cell
US5340762A (en) * 1985-04-01 1994-08-23 Fairchild Semiconductor Corporation Method of making small contactless RAM cell
JPH01309368A (ja) * 1988-06-07 1989-12-13 Nec Corp Ｍｏｓ型半導体記憶回路装置
US5135888A (en) * 1989-01-18 1992-08-04 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
US5801396A (en) * 1989-01-18 1998-09-01 Stmicroelectronics, Inc. Inverted field-effect device with polycrystalline silicon/germanium channel
US5770892A (en) * 1989-01-18 1998-06-23 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
JP3011416B2 (ja) * 1989-04-14 2000-02-21 株式会社東芝 スタティック型メモリ
DE69033746T2 (de) * 1989-12-15 2002-02-28 Sony Corp., Tokio/Tokyo Halbleiterspeicher
US6140684A (en) * 1997-06-24 2000-10-31 Stmicroelectronic, Inc. SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers
US6900513B2 (en) * 2001-01-22 2005-05-31 Nec Electronics Corporation Semiconductor memory device and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2503864A1 (de) * 1975-01-30 1976-08-05 Siemens Ag Halbleiterbauelement
GB2049276A (en) * 1979-03-30 1980-12-17 Nippon Electric Co Semiconductor integrated circuits
EP0045046A1 (de) * 1980-07-24 1982-02-03 Siemens Aktiengesellschaft Halbleiterbauelement und seine Verwendung für statische 6-Transistorzelle

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2503864A1 (de) * 1975-01-30 1976-08-05 Siemens Ag Halbleiterbauelement
GB2049276A (en) * 1979-03-30 1980-12-17 Nippon Electric Co Semiconductor integrated circuits
EP0045046A1 (de) * 1980-07-24 1982-02-03 Siemens Aktiengesellschaft Halbleiterbauelement und seine Verwendung für statische 6-Transistorzelle

Also Published As

Publication number Publication date
EP0104616A2 (de) 1984-04-04
JPS5979568A (ja) 1984-05-08
DE3235880A1 (de) 1984-04-05
CA1208364A (en) 1986-07-22

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Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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AK Designated contracting states

Designated state(s): AT DE FR GB IT

17P Request for examination filed

Effective date: 19841217

PUAL Search report despatched

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AK Designated contracting states

Designated state(s): AT DE FR GB IT

17Q First examination report despatched

Effective date: 19880209

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19880820

RIN1 Information on inventor provided before grant (corrected)

Inventor name: WIEDER, ARMIN, DR.