EP0257737A2 - Gedruckte Schaltungsvorläufer - Google Patents

Gedruckte Schaltungsvorläufer Download PDF

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Publication number
EP0257737A2
EP0257737A2 EP87305039A EP87305039A EP0257737A2 EP 0257737 A2 EP0257737 A2 EP 0257737A2 EP 87305039 A EP87305039 A EP 87305039A EP 87305039 A EP87305039 A EP 87305039A EP 0257737 A2 EP0257737 A2 EP 0257737A2
Authority
EP
European Patent Office
Prior art keywords
layer
article
plating layer
chromium
photoresist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP87305039A
Other languages
English (en)
French (fr)
Other versions
EP0257737A3 (de
Inventor
Hamid C/O Minnesota Mining And Barjesteh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3M Co
Original Assignee
Minnesota Mining and Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minnesota Mining and Manufacturing Co filed Critical Minnesota Mining and Manufacturing Co
Publication of EP0257737A2 publication Critical patent/EP0257737A2/de
Publication of EP0257737A3 publication Critical patent/EP0257737A3/de
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

Definitions

  • This invention relates to circuit material, and, in particular, presensitized circuit material.
  • Photoresist compositions and their uses are well known to those skilled in the art.
  • a photoresist composition can be applied as a coating to a substrate. This coating can then be imagewise exposed to actinic radiation, and depending on whether the photoresist composition is chosen to be positive-acting or negative-­acting, the coating can be selectively removed in either the irradiated or the non-irradiated areas, respectively.
  • Photoresist compositions have been used extensively in forming electrical circuits.
  • an electrically insulative support can be provided with a surface layer of an electrically conductive metal by means of coating or laminating.
  • a photoresist layer can then be applied over the electrically conductive surface layer, imagewise exposed, and then selectively removed, i.e. developed, to define the desired electrical circuit pattern.
  • Either an additive or a subtractive process can then be used to form the actual circuit.
  • the portion of the electrically conductive layer that is not protected by the photoresist layer after development is etched away.
  • the portion of the electrically conductive layer lying beneath the remaining pattern-forming portion of the photoresist layer then forms the conductive elements of the electrical circuit.
  • the portion of the electrically conductive layer exposed by removal of the photoresist layer is further cleaned, as by etching, and metal is plated onto that portion.
  • the plated metal is chosen to be etch-resistant or is plated to a much greater thickness than the electrically conductive layer initially present.
  • etchants are used to remove the remaining portion of the electrically conductive layer.
  • the conductive elements of the electrical circuit are formed primarily by the plated metal and, to a lesser extent, by the remnant of the electrically conductive layer present beneath the plated metal.
  • Verstraete et al U.S. Patent No. 3,832,176 describes a printed circuit precursor material.
  • the printed circuit precursor described therein has been found to be unsatisfactory because of poor adhesion of the deposited circuitry to the polymeric support film and the limitations of negative-acting photoresist systems. It would be desirable to provide a better means for promoting adhesion between the support film and the deposited circuitry. Additionally, it would be desirable to employ a positive-acting photoresist because they have the following advantages over negative-acting photoresists: higher resolution capability, capability of complete removal, and capability of multiple exposures.
  • this invention involves an article of manufacture comprising: (1) an electrically insulative support, (2) overlying and adhered to said support a thin adhesion layer made of a conductive metal, namely, an alloy of chromium and chromium oxide, (3) overlying and adhered to said adhesion layer, a thin metallic plating layer, and (4) overlying and coated onto said plating layer, a photoresist layer which permits substantially microresidue-free removal thereof from said plating layer in exposed areas while protecting the plating layer in the unexposed areas.
  • the photoresist image then facilitates the fabrication of the conductive circuit elements by allowing a metal layer to be selectively deposited where the resist has been removed.
  • the preferred material for the electrically insulative support is polyimide film.
  • the strength of the bond between the electrically insulative support and adhesion layer should be sufficient to withstand the mechanical stresses that will be placed on the circuit during the fabrication process and during the use of the circuit.
  • An essential requirement of the adhesion layer is that it not be significantly removed by normal precleaning processes prior to electroplating.
  • the preferred material for the plating layer is copper.
  • the photoresist layer is preferably positive-acting, although negative-acting photoresist layers can also be used.
  • An embodiment of the article of this invention shown in Figure 1, comprises an electrically insulative support 10, an adhesion layer 12 of a conductive metal, a thin metallic plating layer 14, and a photoresist layer 16.
  • any conventional electrically insulative support 10 can be used in the practice of this invention.
  • Those supports which are considered to be insulative within the purview of this invention are those which exhibit, at least adjacent the adhesion layer, a surface resistivity in excess of 108 ohms per square and, preferably, at least 1012 ohms per square.
  • surface resistivity is determined by measuring the resistance between two parallel electrodes of a given length spaced apart by the same distance along a surface. Since an increase in the length of the electrodes tends to decrease the resistance observed by an amount equal to that by which the resistance would be increased by lengthening the spacing between the electrode by a like increment, it is apparent that the electrode length and spacing are not material so long as they are identical.
  • the surface resistivity expressed in ohms per square is a resistance measurement taken for the special case in which electrode length and spacing are identical and therefore mutually cancelling parameters.
  • the insulative support 10 is formed of a flexible, electrically insulative plastic sheet, preferably of sufficient toughness that the circuit material prepared therefrom can be handled without injury.
  • Flexible plastic sheets having a thickness from about 10 to about 500 micrometers in thickness are preferred, with those having a thickness of from about 25 to 125 micrometers being particularly preferred for most applications.
  • Particularly preferred are those plastic sheets that exhibit a high degree of dimensional stability, high resistance to thermal degradation, high tensile strength, high dielectric strength, and chemical inertness. In particular, the sheet should exhibit sufficiently high thermal stability to withstand soldering and other high temperature circuit fabrication processes.
  • the dielectric strength of the sheet should be sufficiently high to prevent electrical interference between itself and other circuit elements when several printed circuits are stacked together as in a multilayer printed circuit board.
  • a typical polymeric film suitable in the practice of this invention can have a dielectric constant of from about 3.5 to about 4.5 at 1 KHz, a dissipation factor of from about 0.003 to about 0.005, a dielectric strength of from about 3000 to about 5000 volt/mil, tensile stength of from about 2500 to about 3500 psi, and elongation of from about 45% and about 55%.
  • a specifically preferred support 10 is a polyimide sheet having a thickness of from about 25 to about 125 micrometers.
  • This sheet is thin, flexible, comparatively dimensionally stable, and capable of producing dry photoresist articles according to this invention which can be readily handled without injury.
  • Other dimensionally and thermally stable polymers have been considered, but have not found widespread use in the industry. Such polymers include polysulfone, polybenzimidazole, polybenzoxazole, and polybenzothiazole.
  • the adhesion of the plating layer is improved to a sufficient level by first depositing an adhesion layer 12 of conductive metal having a thickness of about 25 to about 150 Angstroms.
  • Materials that are acceptable for this adhesion layer 12 have two important requirements: (1) they must be capable of forming an effective bond between the support 10 and metal plating layer 14, and (2) they must be capable of resisting typical cleaning chemicals used to prepare the plating layer 14 for electrodeposition.
  • the adhesion layer 12 is preferably resistant to the chemicals designed to remove copper oxides, and is also preferably etchable in etchants for copper such as ferric chloride or cupric chloride.
  • a layer of an alloy of chromium and chromium oxide has these preferred properties.
  • the chromium/chromium oxide alloy is referred to as "black-chromium”.
  • This alloy is an electrodeposited layer that is based on chromium but which contains a significant percentage of oxygen atoms (often accounting, for example, for 25 weight-percent of the layer, and probably being present as metal oxide molecules) such that the layer will have, in varying shades, a black appearance.
  • at least a majority of the metal atoms in the layer are chromium atoms.
  • the plating layer 14 can be any single layer or any combination of layers having an aggregate thickness of less than 10,000 Angstroms and, for maximum savings of material of less than 5,000 Angstroms, and being capable of forming a firm, adherent bond to a metal layer 18, i.e., the plated layer, to be deposited thereon during a subsequent processing step, e.g., electroplating or by electroless desposition.
  • the plating layer 14 should also be capable of being removed with an etchant.
  • the plating layer 14 When the plated layer 18 is to be formed by electroplating, the plating layer 14 must be sufficiently electrically conductive to act as a cathode; accordingly it is preferably formed of a metal.
  • the plating layer 14 can be formed of any material known to catalyze deposition of the plated metal.
  • the plating layer 14 is formed of copper, it will catalyze the electroless deposition of copper to form the plated layer 18.
  • Other materials known to catalyze deposition of metal can be used.
  • the plating layer 14 can be conveniently formed by known techniques for forming thin metal layers, such as, for example, electroless deposition, sputtering, or, preferably, vacuum vapor deposition. Any etchable metal known to be capable of deposition as a thin layer can be used, with metals such as copper, silver, manganese, iron, cobalt, nickel, and zinc being particularly preferred.
  • the most preferred material for the plating layer 14 is copper.
  • vacuum vapor deposition two metals can be advantageously deposited from separate sources in a single plating operation, most preferably with some concurrent deposition occurring to insure intimate bonding.
  • the materials used for the plating layer 14 be etchable in commonly used etchants such as, for example, ferric chloride, cupric chloride, etc. It is also preferred that part of the plating layer 14 be capable of being properly cleaned and prepared for electroplating without being etched away by solutions designed for cleaning, because in order to form a good adhesive bond between the plating layer 14 and the plated layer 18, it is necessary that oxides, e.g., copper oxide, be removed from the surface of the plating layer 14 prior to electroplating.
  • etchants such as, for example, ferric chloride, cupric chloride, etc.
  • oxides e.g., copper oxide
  • An adhesion layer 12 formed of the alloy of chromium and chromium oxide will not be rapidly etched in conventional preplate cleaning solutions, and electrical conductivity will be maintained, even if the oxide cleaning process were to inadvertantly remove all of the plating layer 14.
  • Each plated layer 18 formed by deposition onto an exposed surface of the plating layer can be formed of one or more metal layers.
  • the plated layers 18 preferably comprise electrically conductive metals that are tenaciously adherent to the plating layer 14 and to the underlying insulative support.
  • the metals for the plated layers are preferably selected from copper, silver, gold, nickel, or other metals known to have excellent electrical conductivity properties.
  • at least a portion of the plated layer 18 is chosen so as to permit attachment of other electrical conductors thereto.
  • the plated layer 18 can include a solder overcoat or a noble metal surface coating to reduce oxidation prior to soldering thereto. It is preferred to form the plated layers 18 of metals that can be readily electrolessly deposited or electroplated, such as copper and nickel.
  • the photoresist layer 16 can be formed of any photoresist composition known to have clean developing characteristics, that is, any composition which is capable of development in a substantially micro-residue free manner.
  • the photoresist compositions should be capable of being substantially completely removed from a metal surface without resulting in etching or otherwise damaging the metal surface.
  • the photoresist layer 16 is readily removable with mild aqueous developers, such as an aqueous solution of an alkali metal carbonate, silicate, phosphate or the like, or a dilute (0.1 N or less) alkali metal hydroxide, without disturbing a metal layer lying therebeneath. In this way the photoresist layer 16 can be developed without disturbing the thin plating layer 14, which can be readily destroyed with etchants conventionally used for cleaning metal surfaces prior to plating a metal thereon.
  • a preferred photoresist composition for forming layer 16 is the positive-acting photoresist composition described in U.S. Patent 4,247,616, incorporated herein by reference.
  • This composition comprises (a) a crosslinked urethane resin formed by a catalyzed crosslinking of a non-heat reactive novalac phenolic resin and a diisocyanate compound; (b) an epoxy resin having an epoxide equivalent weight of less than about 400 and a curing agent therefor; and (c) a positive-acting photosensitizer.
  • Other photoresist compositions can be used, but positive-acting compositions are preferred for the reasons stated previously.
  • a chromium/chromium oxide alloy layer having a thickness of 100 Angstroms was applied to a sheet of polyimide film having a thickness of 100 micrometers by means of RF sputtering at 2.2 KW using a chromium target in an atmosphere of 95% argon and 5% oxygen at a pressure of 5 micrometers.
  • a layer of copper having a thickness of 1000 Angstroms was applied over the chromium/chromium oxide alloy layer, also by means of DC sputtering at 600 volts and 14 amps using a copper target in an atmosphere of argon at a pressure of 1 micrometer.
  • a photoresist layer was then applied over the copper layer.
  • the photoresist layer was then exposed through a patterned film mask, with an ultraviolet light source having wave length of 360 to 440 nm. Development of the image was carried out by using a 1.2% aqueous solution of sodium hydroxide (See Fig. 2).
  • the exposed copper surface was prepared for electroplating by immersion of the article in a 3% aqueous solution of ammonium persulfate.
  • the cleaned copper surface was then electroplated in a copper sulfate bath operated at room temperature (25°C) at 25 amps/sq. ft. (See Fig. 3).
  • the remaining portions of the photoresist layer were removed by washing with a 5% aqueous sodium hydroxide solution at 60°C (See Fig. 4).
  • the copper layer between the electroformed circuit elements was etched away by immersing the article in a 4% aqueous ferric chloride solution at room temperature (25°C) for 30 seconds (See Fig. 5). Line definition (resolution) and adhesion were excellent.
  • a nickel layer having a thickness of 100 Angstroms was applied to a sheet of polyimide film having a thickness of 100 micrometers by means of sputtering.
  • a layer of copper having a thickness of 1500 Angstroms was applied over the nickel layer, also by means of sputtering.
  • the photoresist layer was prepared, applied, exposed, and processed in the same manner as in Example 1. The line definition was excellent, but adhesion of the circuit elements was inferior to that demonstrated by the article of Example 1.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Silver Salt Photosensitive Materials And Non-Silver Salt Photography (AREA)
  • Laminated Bodies (AREA)
EP87305039A 1986-06-09 1987-06-08 Gedruckte Schaltungsvorläufer Withdrawn EP0257737A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US87184386A 1986-06-09 1986-06-09
US871843 1986-06-09

Publications (2)

Publication Number Publication Date
EP0257737A2 true EP0257737A2 (de) 1988-03-02
EP0257737A3 EP0257737A3 (de) 1989-07-19

Family

ID=25358267

Family Applications (1)

Application Number Title Priority Date Filing Date
EP87305039A Withdrawn EP0257737A3 (de) 1986-06-09 1987-06-08 Gedruckte Schaltungsvorläufer

Country Status (5)

Country Link
EP (1) EP0257737A3 (de)
JP (1) JPS62293689A (de)
KR (1) KR960001355B1 (de)
CA (1) CA1263763A (de)
MY (1) MY101308A (de)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0284939A3 (en) * 1987-03-26 1990-01-10 Nippon Petrochemicals Co., Ltd Finished laminates for high frequency circuits
DE3907004A1 (de) * 1989-03-04 1990-09-06 Contraves Ag Verfahren zum herstellen von duennschichtschaltungen
EP0541436A3 (de) * 1991-11-06 1994-01-05 Fujitsu Ltd
EP0773710A4 (de) * 1995-05-26 1999-03-17 Toyo Metalizing Flexible gedruckte schaltungsplatte
WO2002003767A1 (en) * 2000-06-29 2002-01-10 3M Innovative Properties Company Multi-metal layer circuit
EP1137331A3 (de) * 2000-03-21 2002-10-23 GA-TEK, Inc. (doing business as Gould Electronics Inc.) Kupfer-auf-Polymer-Bauteil mit verbesserter Adhäsion
EP1613135A1 (de) 2004-07-01 2006-01-04 Nitto Denko Corporation Leiterplatte und Verfahren zur Herstellung einer Leiterplatte
WO2006110364A1 (en) * 2005-04-08 2006-10-19 3M Innovative Properties Company Flexible circuit substrate
EP1830616A3 (de) * 1998-09-28 2007-12-12 Ibiden Co., Ltd. Mehrschichtleiterplatte und Herstellungsverfahren dafür
US7614145B2 (en) 2001-09-05 2009-11-10 Zeon Corporation Method for manufacturing multilayer circuit board and resin base material
US9953908B2 (en) 2015-10-30 2018-04-24 International Business Machines Corporation Method for forming solder bumps using sacrificial layer
CN110676156A (zh) * 2019-10-21 2020-01-10 昆山百利合电子材料有限公司 一种光刻半导体加工工艺
US12320715B2 (en) 2019-10-01 2025-06-03 Nitto Denko Corporation Electroconductive film and temperature sensor film

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2795702B2 (ja) * 1989-10-26 1998-09-10 イビデン株式会社 高密度配線板の製造方法
KR100464559B1 (ko) * 2002-03-22 2005-01-03 정남교 벨크로 테이프 제조장치

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3832176A (en) * 1973-04-06 1974-08-27 Eastman Kodak Co Novel photoresist article and process for its use
US3981691A (en) * 1974-07-01 1976-09-21 Minnesota Mining And Manufacturing Company Metal-clad dielectric sheeting having an improved bond between the metal and dielectric layers

Cited By (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0284939A3 (en) * 1987-03-26 1990-01-10 Nippon Petrochemicals Co., Ltd Finished laminates for high frequency circuits
DE3907004A1 (de) * 1989-03-04 1990-09-06 Contraves Ag Verfahren zum herstellen von duennschichtschaltungen
EP0541436A3 (de) * 1991-11-06 1994-01-05 Fujitsu Ltd
US5378310A (en) * 1991-11-06 1995-01-03 Fujitsu Limited Method of producing conductive pattern layer structure
US5415920A (en) * 1991-11-06 1995-05-16 Fujitsu Limited Patterned chromium barrier layer with flange-like structure
EP0773710A4 (de) * 1995-05-26 1999-03-17 Toyo Metalizing Flexible gedruckte schaltungsplatte
US8030577B2 (en) 1998-09-28 2011-10-04 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8020291B2 (en) 1998-09-28 2011-09-20 Ibiden Co., Ltd. Method of manufacturing a printed wiring board
US8533943B2 (en) 1998-09-28 2013-09-17 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8093507B2 (en) 1998-09-28 2012-01-10 Ibiden Co., Ltd. Printed wiring board and method for producing the same
EP1830616A3 (de) * 1998-09-28 2007-12-12 Ibiden Co., Ltd. Mehrschichtleiterplatte und Herstellungsverfahren dafür
US7504719B2 (en) 1998-09-28 2009-03-17 Ibiden Co., Ltd. Printed wiring board having a roughened surface formed on a metal layer, and method for producing the same
US7535095B1 (en) 1998-09-28 2009-05-19 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8018045B2 (en) 1998-09-28 2011-09-13 Ibiden Co., Ltd. Printed circuit board
US7994433B2 (en) 1998-09-28 2011-08-09 Ibiden Co., Ltd. Printed wiring board and method for producing the same
US8006377B2 (en) 1998-09-28 2011-08-30 Ibiden Co., Ltd. Method for producing a printed wiring board
EP1137331A3 (de) * 2000-03-21 2002-10-23 GA-TEK, Inc. (doing business as Gould Electronics Inc.) Kupfer-auf-Polymer-Bauteil mit verbesserter Adhäsion
WO2002003767A1 (en) * 2000-06-29 2002-01-10 3M Innovative Properties Company Multi-metal layer circuit
US7614145B2 (en) 2001-09-05 2009-11-10 Zeon Corporation Method for manufacturing multilayer circuit board and resin base material
US8092696B2 (en) 2004-07-01 2012-01-10 Nitto Denko Corporation Method for manufacturing printed circuit board
EP1613135A1 (de) 2004-07-01 2006-01-04 Nitto Denko Corporation Leiterplatte und Verfahren zur Herstellung einer Leiterplatte
WO2006110364A1 (en) * 2005-04-08 2006-10-19 3M Innovative Properties Company Flexible circuit substrate
US9953908B2 (en) 2015-10-30 2018-04-24 International Business Machines Corporation Method for forming solder bumps using sacrificial layer
US10535592B2 (en) 2015-10-30 2020-01-14 International Business Machines Corporation Method for forming solder bumps using sacrificial layer
US12320715B2 (en) 2019-10-01 2025-06-03 Nitto Denko Corporation Electroconductive film and temperature sensor film
TWI886154B (zh) * 2019-10-01 2025-06-11 日商日東電工股份有限公司 導電膜、溫度感測膜及導電膜之製造方法
CN110676156A (zh) * 2019-10-21 2020-01-10 昆山百利合电子材料有限公司 一种光刻半导体加工工艺

Also Published As

Publication number Publication date
KR880001182A (ko) 1988-03-31
EP0257737A3 (de) 1989-07-19
JPS62293689A (ja) 1987-12-21
MY101308A (en) 1991-09-05
KR960001355B1 (ko) 1996-01-26
CA1263763A (en) 1989-12-05
JPH0465558B2 (de) 1992-10-20

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Inventor name: BARJESTEH, HAMIDC/O MINNESOTA MINING AND