EP0273995A1 - Dispositif d'affichage plat - Google Patents

Dispositif d'affichage plat Download PDF

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Publication number
EP0273995A1
EP0273995A1 EP87100148A EP87100148A EP0273995A1 EP 0273995 A1 EP0273995 A1 EP 0273995A1 EP 87100148 A EP87100148 A EP 87100148A EP 87100148 A EP87100148 A EP 87100148A EP 0273995 A1 EP0273995 A1 EP 0273995A1
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EP
European Patent Office
Prior art keywords
column
display
drive lines
display elements
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP87100148A
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German (de)
English (en)
Other versions
EP0273995B1 (fr
Inventor
Masaru Yasui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hosiden Electronics Co Ltd
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Hosiden Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hosiden Electronics Co Ltd filed Critical Hosiden Electronics Co Ltd
Priority to EP87100148A priority Critical patent/EP0273995B1/fr
Priority to AT87100148T priority patent/ATE49075T1/de
Priority to DE8787100148T priority patent/DE3761279D1/de
Publication of EP0273995A1 publication Critical patent/EP0273995A1/fr
Application granted granted Critical
Publication of EP0273995B1 publication Critical patent/EP0273995B1/fr
Expired legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels

Definitions

  • This invention relates to a planar display device for displaying a monochromatic or color image as liquid crystal display, plasma display, light-emitting diode display, etc. with a plurality of display elements arranged in rows and columns.
  • a liquid crystal display device which comprises a pair of trans­parent sunbstrates 11 and 12 and liquid crystal 13 sealed therebetween.
  • a transparent common electrode 14 is provided on the entire inner surface of the other substrate 12.
  • the display electrodes 1 l,n are arranged in rows and columns. As shown in Fig. 2, a row drive line 2 l is provided along corresponding one of rows of display electrodes 1 l,n , and a column drive line 3 n is provided along corresponding one of columns of display electrodes 1 l,n .
  • a thin-film transistor 4 l,n is provided for each display electrode 1 l,n .
  • Each thin-film transistor 4 l,n has a drain connected to the corresponding display electrode 1 l,n , a gate connected to the corresponding row drive line 2 l and a source connected to the corresponding column drive line 3 n .
  • a red filter R for the color display, a red filter R, a green filter G and a blue filter B are provided on either re­spective display electrodes 1 l,n or on the corresponding portions of the common electrode 14. These color filters are arranged substantially uniformly, for instance as shown in Fig. 3. Various colors can be displayed as mixtures of the red, green and blue colors depending on the state of display by the plurality of display elements corresponding to the respective display electrodes.
  • the display elements for displaying the red color will be referred to as R
  • the display elements for displaying the green color as G for displaying the blue color as B.
  • a white picture point i.e., a white dot
  • three display elements i.e., red, green and blue display elements, adjacent to one another, have to be driven simultaneously for white color emission.
  • White horizontal and vertical lines can be displayed simply by activating corresponding row and column of display elements R, G and B.
  • a 45-degree white oblique line from the right top to the left bottom of the display device can also be displayed by selectively activating display elements R, G and B along the oblique line, as shown in Fig. 4.
  • display elements are selected along a 45-degree oblique line from the left top to the right bottom on the display device, only one of the three colors, e.g.
  • red display elements R are displayed and a white line can not be display, as shown in Fig. 5.
  • This problem arises if it is intended to have one picture element (i.e., pixel) constituted by one display element, i.e., if each display element is intended to be used as a resolvable picture element so that a thin oblique or curved display line can be achieved.
  • a three-color display element set for a picture dot in which a set of three adjacent color display elements, i.e. red, green and blue color display elements R, G and B, are simultaneously driven for display of a white picture point, and also any other desired color is displayed as a picture point (i.e., dot) of a resultant color of suitable combi­nation of light intensities through the three color display elements.
  • a set of three adjacent color display elements i.e. red, green and blue color display elements R, G and B
  • any other desired color is displayed as a picture point (i.e., dot) of a resultant color of suitable combi­nation of light intensities through the three color display elements.
  • Fig. 6 More specifically, it can be arranged to have adjacent red, green and blue display elements R, G and B in two adjacent element rows as a set, as shown in Fig. 6, thus defining color display element sets each shown enclosed by a phantom line, these sets constituting respective picture points P i, j
  • one row drive line 2 l is selectively driven via a row drive circuit 17 according to the contents of a row register 16, while one column drive line 3 n is selectively driven via a column drive circuit 19 according to the contents of a column register 18, as shown in Fig. 2, thus causing the display of a corresponding display electrode.
  • image signal data for one display line is stored in correspondence to individual display elements 5 l,n of the display line.
  • the next row drive line is selectively driven, and image signal data for the next line of display element row to be displayed is stored in the column register 18.
  • successive row drive lines are selectively driven while storing image signal data for a line in the column register 18 after selection of each row drive line.
  • one display row 6 i is displayed as follows.
  • the individual picture point signals in the signals for one display row are divided into two signals, i.e., one being a stream of R1, B1, C2, R3, B3, G4, ⁇ loaded in the column register 18 as shown in Fig. 8A and the other being a stream of G1, R2, B2, G3, R4, B4, ⁇ as shown in Fig. 8B.
  • the signal shown in Fig. 8A stored in the column register 18 in Fig. 2 is provided to activate the display elements connected to the cor­responding row drive line 2l and individual column drive lines 3 n , 3 n+1 , 2 n+2 , ⁇ .
  • the signal shown in Fig. 8B stored in the column register 18 is provided to activate the display elements connected to the row drive line 2 l+1 .
  • the display signal for one display row i.e., one horizontal scanning line cycle
  • the display signal for one display row is divided into two signals for driving display elements independently. Therefore, the operation is complicated.
  • the image signal is usually supplied for each display row, i.e., each horizontal scanning line, the aforementioned display system, therefore, is inferior in view of the matching with the divided two streams of input image signals.
  • the display surface is repeatedly scanned by selecting success­sive row drive lines.
  • the repetition cycle period of scanning the display area i.e., vertical cycle period
  • flicker of the display surface screen occurs to deteriorate the quality of display.
  • increasing the row drive lines dictates increase in the rate of switching of the tow drive lines, thus leading to expensive and compli­cated peripheral circuits.
  • row drive lines are each provided for two adjacent rows of display elements. That is, the display elements in the two rows are connected to the common row drive line.
  • Column drive lines are provided in pairs each for each column of display elements. Every other ones of the display elements in the column are connected to one of the pair column drive lines, and the other display elements in the column are connected to the other column drive lines in the pair. Each of the display elements is selectively displayed by the row and column drive lines connected to it.
  • Fig. 9 is a view similar to Fig. 2 but shows the embodiment of the invention. Referring to Fig. 9, display electrodes 1 2l,3n are arranged in rows and columns. Unlike the prior art system, row drive lines 2 2l are each provided for two adjacent rows of display electrodes 1 2l,3n .
  • one row of display electrodes 1 2l,3n , 1 2l,3n+2 , ⁇ is provided above the row drive line 2 2l
  • the other row of display electrodes 1 2l,3n+1 , 1 2l,3n+3 , ⁇ is provided below the line.
  • Two column drive lines are provided for each column of display electrodes.
  • column drive lines 3 3n and 3 3n+1 are provided on the opposite sides of the column of display electrodes 1 2l,3n , 1 2l,3n+1 , ⁇ .
  • Thin-film transistors 4 2l,3n are each provided for each of the display electrtodes 1 2l,3n .
  • To the row drive line 2 2l are connected the gates of thin-film transistors corresponding to the display electrodes, between which the drive line 2 2l extends.
  • the display electrodes in each column are connected alternately and through the respective thin-film transistors to the column drive lines on the opposite sides of the column.
  • each display electrode constitutes together with the corresponding thin-film transistor and corresponding portions of the liquid crystal and common electrode (Fig. 1) a display element 5.
  • red, green and blue color filters R, G and B are provided substantially in a uniform arrangement in correspondence to the individual pixel electrodes.
  • the red, green and blue colour signals R k , G k and B k or color image signal supplied through input lines 25R, 25G and 25B are supplied through a color signal switching circuit 26 to color signal buses 27 to 29.
  • a horizontal sync pulse signal H syn of the color image signal is supplied from a horizontal sync input terminal 31 to a tertiary counter 32.
  • the color signal switching circuit 26 is controlled to switch the color signals according to the count of the tertiary counter 32. According to the control the color signal switching circuit 26 connects the input signal lines 25R, 25G and 25B to the color signal buses 27, 28 and 29 , or 28, 29 and 27, or 29, 27 and 28, respectively.
  • the color signal buses 27 to 29 are repeatedly connected to successive stages of the column register 18, and the outputs of these stages drive the column drive lines 3 3n , 3 3n+1 , 3 3n+2 , 3 3n+3 , 3 3n+4 , 3 3n+5 , ⁇ through the column drive circuit 19.
  • a clock signal having three times the dot frequency of the input color image signal is supplied as shift clock from a clock terminal 33 to a shift register 34, and a horizontal sync pulse is supplied from the terminal 31 to the first stage of the shift register 34 at the start of each horizontal scanning cycle period.
  • Data from the individual stages of the column register 18 are fetched successively in response to the outputs of the respective shift stages of the shift register 34.
  • red, green and blue color signals R k , G k and B k are stored as the image signal of a certain horizontal cycle period in the manner as shown in Fig. 10A in the column register 18 and the row drive line 2 2l is driven at this time, all the display elements (i.e., display electrodes) in the two rows associated with the row drive line 2 2l shown in Fig. 9 are driven according to the contents of the corresponding stages of the column register 18.
  • the three-color display-element sets of respective picture are simultaneously driven for one display row.
  • color signals are stored in the manner as shown in Fig. 10B in the column register 18, and the row drive line 2 2l+2 is driven.
  • the display elements associated with the row drive line 2 2l+2 shown in Fig. 9 are driven likewise as simul­taneous drive for one display row.
  • color signals are stored in the manner as shown in Fig. 10C in the column register 18, and the row drive line 2 2l+4 is driven.
  • the display elements associated with the row drive line 2 2l+4 are driven as simultaneous drive for one display row.
  • the image signal is stored successively and repeatedly in the order of Figs. 10A to 10C for re­spective horizontal periods in the column register 18. It is possible to arrange such that the color signals on the color signal buses 27 to 29 are stored simultaneously in three stages of the column register 18 for each dot of the input image signal.
  • Fig. 11 shows a second embodiment of the invention.
  • each row drive line 2 2l is provided for every two rows of display elements.
  • each row drive line is provided for each display element row. That is, row drive lines 2 2l+1 , 2 2l+3 , ⁇ are provided additionally to the embodiment of Fig. 9.
  • To each of these additional row drive lines are connected display elements on the opposite sides, i.e., on the upper and lower sides of the additional row drive line in the Figure.
  • Each display element is also connected to the column drive lines or opposite sides thereof.
  • additional thin-film tran­sistors (labeled by circles)4 2l+1,3n , 4 2l+1,3n+2 , ⁇ , and 4 2l+1,3n+1 , 4 2l+1,3n+3 , ⁇ on one sides of the respective display electrodes 1 2l,3n+1 , 1 2l,3n+3 , ⁇ , and 2 2l+2,3n , 1 2l+2,3n+2 , ⁇ , opposite respectively from those thin-film transistors 4 2l,3n+1 , 4 2l,3n+3 , ⁇ and 4 2l+2,3n , 4 2l+2,3n+2 , ⁇ shown in Fig.
  • the thin-film transistors 4 2l+1,3n , 4 2l+1,3n+2 , ⁇ , and 4 2l+1,3n+1 , ⁇ 4 2l+1,3n+3 , ⁇ have their drains connected to the respective opposite side display electrodes 1 2l,3n+1 , 1 2l,3n+3 , ⁇ and 1 2l+2,3n , 1 2l+2,3n+2 , ⁇ , their sources connected to the respective column drive lines 3 3n , 3 3n+2 , ⁇ , and 3 3n+1 , 3 3n+3 , ⁇ and their gates commonly connected to the row drive line 2 2l,+1 .
  • additional thin-film transistors are provided for each of the other additional row drive lines.
  • first or second embodiment two rows, i.e., upper and lower side rows of display elements are connected to each row drive line, so that two rows of display elements can be displayed while a single row drive line is being selected.
  • the row drive lines can be reduced in number to one hald compared to the row drive lines in the prior art arrangement shown in Fig. 2. This means that for the same period, during which each row drive line is selectively driven, the driving period for one frame can be reduced to one half, resulting in reduced flicker and improved quality of the displayed image.
  • the number of display element rows can be doubled to increase the resolution correspondingly.
  • the period of driving of one row drive line can be doubled compared to the prior art system. That is, the drive speed can be reduced to permit simpler con­struction of the peripheral circuits. Further, in the case of the liquid crystal display, the charging period for each of the display electrodes can be extended so that it is possible to obtain a display image having an improved contrast.
  • the row drive line has to be driven twice for the display of one display row.
  • the display device is scanned twice during one horizontal scanning cycle period of the image signal. Therefore, the correspondency to the image signal is unsatisfactory in view of displaying the image signal supplied for each horizontal scanning cycle period.
  • the image signal supplied for each horizontal scanning cycle period is displayed by driving each row drive line only once for one horizontal scanning line period. Nevertheless, the display thus obtained for one display row consists of three-color display element sets as respective picture points.
  • the display device according to the invention thus has satisfactory matching property with respect to the input of the image signal.
  • three color signals for each picture point can be simultaneously input to the column register 18 as mentioned earlier. Further, it is possible to store three color signals for two or three picture points simultaneously in the column register 18.
  • the color signal buses 27 to 29 are connected through a one-dot delay circuit 35 to color signal buses 36 to 38, and the color signals 27 to 29 and 36 to 38 are successsively and repeatedly connected to individual stages of the column register 18.
  • the column register 18 is divided into groups each consisting of 6 stages, a horizontal sync pulse H syn is supplied to the first stage of a shift register 39 and shifted therethrough in response to the output of a frequency divider 41, which divides the frequency of a dot clock from a terminal 40 to one half, and writing of data in one of the groups of the column register 18 is effected according to the output of each stage of the shift register 39.
  • the input image signal is stored six color signals for two picture dots at a time in the column register 18.
  • twofold path is provided for the driving of each display element. That is, even if one of the two paths is defective, the display element may be driven through the other path. This means a corresponding increase in the production yield. While the above embodiments of the invention have concerned with the liquid crystal planar display devices, the invention is applicable to planar display devices based on light-emitting diodes or plasma display as well.
  • the row drive line 2 2l+1 is selected to turn ON the thin-film transistor 4 2l+1,3n , whereby a negative voltage is applied across the liquid crystal at the display electrode 1 2l,3n+1 by negative voltage supplied from the line 3 3n
  • the row drive line 2 2l is selected to turn ON the transistor 4 2l,3n+1 , whereby a negative voltage is applied across the liquid crystal at the same display electrode by negative voltage supplied from the line 3 3n+1
  • the line 2 2l+1 is selected to turn ON the transistor 4 2l+1,3n , whereby a positive voltage is applied across the liquid crystal by positive voltage supplied from the line 3 3n
  • the fourth field (even field) the line 2 2l is selected, whereby a negative voltage is applied across the liquid crystal by negative voltage supplied from the line 3 3n+1 .
  • the drive control is carried out as shown in Fig. 14.
  • the drive control sequence pattern repeats for every eight successive fields.
  • the pattern shown in Fig. 14 is only an example of driving waveform, and it is also possible to use a pattern which is shifted in phase by one field period with respect to the pattern of Fig. 14.
  • zero voltage is applied to the common electrode 4 (Fig. 1).
  • the waveform as shown in Fig. 14 may be obtained with an arrangement as shown in Fig. 15, for instance.
  • the vertical sync pulse signal supplied from a terminal 51 is frequency divided into one half the frequency in a flip-flop 52.
  • the and Q outputs of the flip-flop 52 are used to control gates 53 and 54 to separate the input vertical sync pulses into even and odd field pulses.
  • the separated pulse signals are frequency divided into one half the frequency in respective flip-flops 55 and 56.
  • the outputs of these flip-flops are ANDed in an AND gate 57.
  • the output of the flip-flop 56 is frequency divided into one half the frequency in a flip-flop 58.
  • the outputs of the flip-flop 58 and AND gate 57 are exclusively ORed in an exclusive OR gate 59. As a result, an intended output is obtained at an output terminal 61.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
EP87100148A 1987-01-08 1987-01-08 Dispositif d'affichage plat Expired EP0273995B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP87100148A EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat
AT87100148T ATE49075T1 (de) 1987-01-08 1987-01-08 Flaches anzeigegeraet.
DE8787100148T DE3761279D1 (de) 1987-01-08 1987-01-08 Flaches anzeigegeraet.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP87100148A EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat

Publications (2)

Publication Number Publication Date
EP0273995A1 true EP0273995A1 (fr) 1988-07-13
EP0273995B1 EP0273995B1 (fr) 1989-12-27

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EP87100148A Expired EP0273995B1 (fr) 1987-01-08 1987-01-08 Dispositif d'affichage plat

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EP (1) EP0273995B1 (fr)
AT (1) ATE49075T1 (fr)
DE (1) DE3761279D1 (fr)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287055A3 (en) * 1987-04-15 1989-07-12 Sharp Kabushiki Kaisha Liquid crystal display device
EP0535404A1 (fr) * 1991-10-04 1993-04-07 Siemens-Elema AB Dispositif pour présenter une valeur paramétrique et son utilisation
EP0637009A3 (fr) * 1993-07-30 1997-03-19 Canon Kk Procédé et dispositif de commande pour un affichage couleur à cristaux liquides avec matrice active.
FR2742910A1 (fr) * 1995-12-22 1997-06-27 Thomson Multimedia Sa Procede et dispositif d'adressage d'un ecran matriciel
EP0903717A3 (fr) * 1997-09-13 1999-12-29 Gia Chuong Phan Dispositif d'affichage et méthode de commande dynamique d'éléments d'image
EP0911792A3 (fr) * 1997-10-22 2000-03-22 Carl Zeiss Méthode de formation d'une image sur un écran à couleurs et écran à couleurs approprié
WO2002075708A3 (fr) * 2001-03-20 2003-02-13 Koninkl Philips Electronics Nv Circuit d'attaque de colonnes et procede d'attaque de pixels dans une matrice a colonnes et rangees
WO2004072936A3 (fr) * 2003-02-11 2004-10-14 Kopin Corp Afficheur a cristaux liquides comportant des convertisseurs numeriques-analogiques integres
WO2004021323A3 (fr) * 2002-08-30 2006-06-22 Samsung Electronics Co Ltd Affichage a cristaux liquides et procede de pilotage
US7286136B2 (en) 1997-09-13 2007-10-23 Vp Assets Limited Display and weighted dot rendering method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0167408A2 (fr) * 1984-07-06 1986-01-08 Sharp Kabushiki Kaisha Circuit de commande pour un dispositif d'affichage en couleurs à cristaux liquides
EP0181598A2 (fr) * 1984-11-06 1986-05-21 Canon Kabushiki Kaisha Dispositif d'affichage et méthode de commande à cet effet

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0167408A2 (fr) * 1984-07-06 1986-01-08 Sharp Kabushiki Kaisha Circuit de commande pour un dispositif d'affichage en couleurs à cristaux liquides
EP0181598A2 (fr) * 1984-11-06 1986-05-21 Canon Kabushiki Kaisha Dispositif d'affichage et méthode de commande à cet effet

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287055A3 (en) * 1987-04-15 1989-07-12 Sharp Kabushiki Kaisha Liquid crystal display device
EP0535404A1 (fr) * 1991-10-04 1993-04-07 Siemens-Elema AB Dispositif pour présenter une valeur paramétrique et son utilisation
US5327155A (en) * 1991-10-04 1994-07-05 Siemens Aktiengesellschaft Device for displaying a parameter value
EP0637009A3 (fr) * 1993-07-30 1997-03-19 Canon Kk Procédé et dispositif de commande pour un affichage couleur à cristaux liquides avec matrice active.
FR2742910A1 (fr) * 1995-12-22 1997-06-27 Thomson Multimedia Sa Procede et dispositif d'adressage d'un ecran matriciel
US7286136B2 (en) 1997-09-13 2007-10-23 Vp Assets Limited Display and weighted dot rendering method
EP0903717A3 (fr) * 1997-09-13 1999-12-29 Gia Chuong Phan Dispositif d'affichage et méthode de commande dynamique d'éléments d'image
AU755524B2 (en) * 1997-09-13 2002-12-12 Vp Assets Limited Display and method of control
US6661429B1 (en) 1997-09-13 2003-12-09 Gia Chuong Phan Dynamic pixel resolution for displays using spatial elements
US8860642B2 (en) 1997-09-13 2014-10-14 Vp Assets Limited Display and weighted dot rendering method
EP0911792A3 (fr) * 1997-10-22 2000-03-22 Carl Zeiss Méthode de formation d'une image sur un écran à couleurs et écran à couleurs approprié
WO2002075708A3 (fr) * 2001-03-20 2003-02-13 Koninkl Philips Electronics Nv Circuit d'attaque de colonnes et procede d'attaque de pixels dans une matrice a colonnes et rangees
CN100336088C (zh) * 2001-03-20 2007-09-05 皇家菲利浦电子有限公司 用于驱动先列后行点阵中象素的列驱动电路和方法
WO2004021323A3 (fr) * 2002-08-30 2006-06-22 Samsung Electronics Co Ltd Affichage a cristaux liquides et procede de pilotage
CN100444231C (zh) * 2002-08-30 2008-12-17 三星电子株式会社 液晶显示器及其驱动方法
JP2006517687A (ja) * 2003-02-11 2006-07-27 コピン・コーポレーシヨン データ線の容量を用いた集積デジタル・アナログ変換器を付けた液晶ディスプレー
US7595782B2 (en) 2003-02-11 2009-09-29 Kopin Corporation Liquid crystal display with integrated digital-analog-converters
CN1748239B (zh) * 2003-02-11 2014-05-07 科比恩公司 用来驱动液晶显示器的数据扫描器及其驱动方法
WO2004072936A3 (fr) * 2003-02-11 2004-10-14 Kopin Corp Afficheur a cristaux liquides comportant des convertisseurs numeriques-analogiques integres

Also Published As

Publication number Publication date
DE3761279D1 (de) 1990-02-01
EP0273995B1 (fr) 1989-12-27
ATE49075T1 (de) 1990-01-15

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