EP0302946A1 - Procede pour isoler electriquement des corps d'electrode de grande surface - Google Patents

Procede pour isoler electriquement des corps d'electrode de grande surface

Info

Publication number
EP0302946A1
EP0302946A1 EP88902216A EP88902216A EP0302946A1 EP 0302946 A1 EP0302946 A1 EP 0302946A1 EP 88902216 A EP88902216 A EP 88902216A EP 88902216 A EP88902216 A EP 88902216A EP 0302946 A1 EP0302946 A1 EP 0302946A1
Authority
EP
European Patent Office
Prior art keywords
maskant
applying
substrate
electrode material
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP88902216A
Other languages
German (de)
English (en)
Inventor
Shigeyoshi Kobayashi
Harold A. Mcmaster
Stephen Muhl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AGC Inc
Glasstech Solar Inc
Original Assignee
Asahi Glass Co Ltd
Glasstech Solar Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Glass Co Ltd, Glasstech Solar Inc filed Critical Asahi Glass Co Ltd
Publication of EP0302946A1 publication Critical patent/EP0302946A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • H10F19/30—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells
    • H10F19/31—Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules comprising thin-film photovoltaic cells having multiple laterally adjacent thin-film photovoltaic cells deposited on the same substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/143—Masks therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the subject invention pertains to a method for electrically isolating large area electrode bodies for further fabrication to produce semiconductor devices, especially solar cells.
  • Electronic device production involves many intricate steps and precise handling. It is often necessary to separate the underlying constituents of devices to facilitate interconnection for the production of series-connected devices. In the manufacture of such devices, the process of electrically isolating can be difficult and intricate.
  • U.S. Patent No. 3,691,695 issued September 19, 1972 to Green et al. discloses an abrasive trimmer for microelectronic devices including a nozzle for directing abrasive materials at a microelectronic device to be trimmed.
  • the nozzle is pivot-mounted and spring-biased into a first, normally operative position.
  • a circuit senses the electrical characteristics of the microelectronic device being trimmed and generates a signal when predetermined characteristics are sensed.
  • U.S. Patent 4,443,651 issued on April 17, 1984 to Swartz discloses series-connected amorphous silicon solar cells formed on a single substrate.
  • Methods of inexpensively forming such series-connected amorphous silicon solar cells include a "paint and peel” method utilizing a series of paint strips sprayed onto the surface through a stripped mask. The paint is then peeled off to urge the metal strips to form spikes which extend through to overlying electrodes.
  • U.S. Patent 4,590,093 issued May 20, 1986 to Woerlee et al. discloses a method of providing narrow conductor tracks of metal suicide. According to the disclosure, patterned polycrystalline silicon is covered by a protective layer and"converted along the edges into a metallic silicide by covering the edges with a metal. The remaining silicon is selectively removed, and the tracks obtained can serve as conductor masks.
  • Another object of the invention is to facilitate the electrical isolation of large area electrode bodies for the fabrication of semiconductor devices. Another object of the invention is to achieve separation of electrode bodies in semiconductor devices such as solar cells without requiring the use of costly laser abrasion, or contaminating mechanical scribing, which uses valuable substrate area for electrical isolation.
  • the present invention provides an improved method for electrically isolating large area electrode bodies. More specifically, the present invention provides a chemical method for the precise separation of thin film electrode bodies in the production of semiconductor devices.
  • a maskant is applied in a preselected pattern onto a substrate surface.
  • a desirable maskant is readily removable by a solvent which is substantially chemically inert with respect to subsequently deposited materials such as a solvent selected from the group consisting of organic solvents and aqueous solutions. Examples of organic solvents are alcohols, actone, etc., and aqueous solutions include acidic solutions.
  • Conformally deposited electrically conductive electrode material is then deposited atop the patterned maskant and, by dissolving in the solvent, the maskant is removed along with the electrode material deposited thereon. After removal- at least portions of the substrate are exposed and electrically isolated so that selective electrical interconnections may be made between electrically isolated electrode portions.
  • Maskants are selected from the group consisting of polymeric materials, carbonaceous materials, sulphates, nitrates, photoresist, oxides, carbides, and carbonates.
  • the maskant is barium carbonate, calcium carbonate, or silicon carbide. Application of the maskant is accomplished by screen-printing or photolithographic processes.
  • Another preferred maskant is a pasty ink which is a mixture of a masking powder, a vehicle, and other materials.
  • the masking powder is preferably calcium carbonate, barium carbonate, or silicon carbide, for these substances are stable even at a high temperature around 400°C - 650°C, which is the usual chemical vapor deposition temperature of the conformal layer over the maskant. Also they are substantially chemically inert with the substrate and the conformal layer deposited over the maskant.
  • calcium carbonate it is easy to get the uniformity of the particle size, which contributes to the uniform dispersion- in the vehicle and therefore the - uniform masking effect.
  • calcium carbonate is very easily removable by an acidic solution.
  • the average particle size of the masking powder is smaller than 0.5 ⁇ m. More preferably the maximum particle size is smaller than 0.5 ⁇ m.
  • the particle size gets smaller, the maskant provides better masking effect.
  • the maskant is screen-printed widely, it decreases the surface area of active photovoltaic material exposed to the sun, which decreases the conversion efficiency.
  • the average particle size of the masking powder is preferably less than 0.5 ⁇ m and greater than 0.05 ⁇ m.
  • the vehicle contained in the maskant requires to have good qualities suitable for screen-printing, such- as a suitable viscosity for screen-printing in a good accuracy, and to be readily removable. Regarding these properties, it is preferable that the vehicle contains ethyl cellulose, nitro cellulose or acrylic resin. In order to adjust the viscosity, a solvent compatible with the above substance may be added. If necessary, high boiling solvent or oxidant may also be added to the vehicle.
  • the maskant preferably contains 40 to 60 wt% masking powder, and 60 to 40 wt% vehicle.
  • the preselected pattern disclosed in the present invention is adapted for cascade interconnection of semiconductor device components, and includes rectangular-shaped conductive tracks extending from one side of the substrate to the other.
  • the tracks are deposited to achieve a minimum space between each track, from about 0.1 millimeters to about 1.0 millimeters. It should be realized that any possible shape can be made in accordance with the present invention.
  • Depositing a conformal layer of an electrically conductive electrode material may be accomplished by depositing a layer of transparent conductive oxide, including indium tin oxide, a tin oxide doped with fluorine or tin oxide doped with antimony. This layer will have a thickness of from about 300 angstroms to about 20,000 angstroms.
  • the substrate is ultrasonically agitated and/or chemically washed to expose portions of the substrate and to electrically isolate the remaining portions of the electrode material left on the substrate after the removal.
  • This forms discrete bodies so that selective electrical interconnection may be made between electrically isolated electrode portions.
  • These electrically isolated electrode portions exhibit an increased electrical resistance which produces an electrical separation greater than 1,000 ohms.
  • the advantage of the present invention is the inexpensive, precise removal of electrode material without the use of lasers or mechanical abrading apparatus. Other advantages and features of the present invention will be appreciated from the following description.
  • Figures la through lc are schematic views of the progressive fabrication of a semiconductor device such as a solar cell using the method of the present invention.
  • Figure 2 is a top view of an example of a patterned substrate according to the present invention.
  • BEST MODE FOR CARRYING OUT THE INVENTION Referring now to Figure 1, the methodology of the present invention is shown through illustration of the progressive fabrication of a semiconductor device.
  • Figure la is a device, generally denoted by numeral 10, having a substrate 14 and a maskant 12 applied in a preselected pattern.
  • Substrate 14 is typically of glass, but may be another material, such as plastic, metallic foils, silicon wafers, gallium arsenide wafers and other conventional substrates.
  • Substrate 14 may be a non-conductive, insulating substrate, such as glass.
  • substrate 14 may include an alkali diffusion-preventing layer such as SiO , Al relieve0.,, or Zr0 2r formed over the alkali-containing glass substrate.
  • the substrates may be of any size, including square foot solar panels.
  • the material comprising maskant 12 may be selected from the group consisting of polymeric materials, carbonaceous materials, sulphates, nitrates, photoresist, oxides r carbides, and carbonates.
  • the preferred maskant is barium carbonate, calcium carbonate, or silicon carbide.
  • Another preferred maskant is a mixture of a masking powder, a vehicle, and other materials. Preselected patterning of maskant 12 may be achieved by screen-p inting or photolithographic processes.
  • the material composition of maskant 12 is selected due to its ability to be readily removable by a solvent selected from the group consisting of organic solvents and aqueous solutions. Various maskant applications will, of course, require the use of different solvents.
  • a maskant comprising a masking powder and a vehicle
  • maskant 12 is applied to achieve a pattern of rectangular-shaped tracks 20 extending from one side of the substrate 14 to the other in a spaced-apart relation.
  • Deposition in tracks achieves minimum spacing 21 between each track. This especially useful in the field of photovoltaics where it is more advantageous to have a maximum surface area of active photovoltaic material exposed to the sun.
  • the minimum space 21 between each track 20 in the preferred embodiment is from about 0.1 millimeters to about 1.0 millimeters.
  • a conformal layer 16 of an electrically conductive electrode material such as a transparent conductive oxide, including indium tin oxide and fluorine or antimony doped tin oxide, is deposited atop the pattern maskant 12.
  • the conformal layer 16 is deposited to a thickness of between 300 angstroms and 20,000 angstroms, and preferably 3,000 angstroms and 20,000 angstroms.
  • Device 10 is then contacted with the solvent to remove maskant 12.
  • Removing maskant 12 may be accomplished by ultrasonic agitation and/or chemical washing, such as a spray bath, a tank bath or any other conventional washing technique in an organic solvent or aqueous solution.
  • the maskant material 12 has been removed, leaving a patterned electrode material layer 16 atop substrate 14. Removing maskant 12 yields an electrical separation greater than 1,000 ohms. The result is the structure shown in Figure lc where the-el ctrode material 16 has been divided into separate conductive elements. These elements are now capable of cascade interconnection during further production steps of a monolithic photovoltaic device.
  • the projection 17 on the peripheral edge can be reduced if the maskant is screen-printed in a very thin layer, which can be realized by using the masking powder whose particle size is small, preferably less than 0.5 ⁇ m.
  • the invention may be more fully appreciated by the following illustrative examples.
  • Barium carbonate was screen-printed onto a glass substrate measuring one foot by one foot in a preselected pattern of rectangular-shaped tracks extending from one side of the substrate to the other as described in Figure 2, each track having a measurement of approximately one centimeter in width, spaced apart at a distance of about one-half millimeter.
  • the screen-printing process automatically applied the desired pattern of maskant.
  • a transparent conductive oxide layer was deposited conformally on top of the patterned barium carbonate.
  • the barium carbonate was dissolved in alcohol by chemical washing. Portions of the glass substrate were exposed and the remaining portions of the transparent conductive oxide were electrically isolated to greater than 5,000 ohms.
  • a maskant in the form of paste was prepared by mixing 100 g of calcium carbonate powder whose average particle size was about 0.3 ⁇ m, 90 g of vehicle consisting of 6 wt% ethyl cellulose and 94 wt% tri-methyl pentanediol monoisobutylate, and additional 25 g of tri-methyl pentanediol monoisobutylate to have a viscosity of about 50,000 cps at 25°C.
  • This maskant was screen-printed onto an alkali diffusion-preventing layer of SiO y formed over a soda lime silica glass substrate measuring one foot by one foot in a preselected pattern of rectangular-shaped tracks extending from one side of the substrate to the other, each track having a measurement of approximately one centimeter in width, spaced apart at a distance of about 0.4 millimeters.
  • the screen-printing process automatically applied the desired pattern of maskant.
  • the thickness of the maskant was about 10 ⁇ m.
  • the glass substrate with the pattern of maskant was dried at 150 C for 10 minutes, then carried into a CVD apparatus, and heated up to 500 C.
  • the maskant was dissolved in an aqueous solution by ultrasonic agitation. - Portions -of the' glass " substrate were exposed and the remaining portions of the fluorine doped tin oxide were electrically isolated to greater than 4,000 ohms. Each portion of the fluorine doped tin oxi ⁇ e had a projection of about 0.2 ⁇ m high on the peripheral edge.
  • amorphous silicon layer of 4,000 angstroms thick was deposited by plasma CVD method on the glass substrate with the patterned tin oxide, and then silver layer was formed on the amorphous silicon layer to make a solar cell.

Landscapes

  • Photovoltaic Devices (AREA)
  • Manufacturing Of Electric Cables (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

Dans un procédé pour isoler électriquement des corps d'électrode de grande surface afin de faciliter l'interconnexion en cascade de corps semi-conducteurs qui peuvent être déposés par la suite, on applique un masque d'une configuration présélectionnée sur un substrat, on dépose par dessus le masque ainsi configuré une couche de conformation en un matériau d'électrode électro-conducteur, puis on élimine le masque et le matériau d'électrode par dissolution dans un solvant qui est pratiquement inerte chimiquement par rapport aux matières déposées ultérieurement, afin d'exposer au moins des parties du substrat et d'isoler électriquement les parties restantes du matériau d'électrode de manière à permettre des interconnexions électriques sélectives entre des parties d'électrodes isolées électriquement. Ce procédé permet pratiquement d'éliminer le recours au traçage mécanique ou par laser de corps semi-conducteurs sur un substrat de grande surface.
EP88902216A 1987-02-27 1988-02-26 Procede pour isoler electriquement des corps d'electrode de grande surface Withdrawn EP0302946A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1986887A 1987-02-27 1987-02-27
US19868 1987-02-27

Publications (1)

Publication Number Publication Date
EP0302946A1 true EP0302946A1 (fr) 1989-02-15

Family

ID=21795474

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88902216A Withdrawn EP0302946A1 (fr) 1987-02-27 1988-02-26 Procede pour isoler electriquement des corps d'electrode de grande surface

Country Status (4)

Country Link
EP (1) EP0302946A1 (fr)
JP (1) JPH01502631A (fr)
AU (1) AU1364288A (fr)
WO (1) WO1988006803A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8677929B2 (en) 2010-12-29 2014-03-25 Intevac, Inc. Method and apparatus for masking solar cell substrates for deposition

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4206254A (en) * 1979-02-28 1980-06-03 International Business Machines Corporation Method of selectively depositing metal on a ceramic substrate with a metallurgy pattern
US4339305A (en) * 1981-02-05 1982-07-13 Rockwell International Corporation Planar circuit fabrication by plating and liftoff
US4443651A (en) * 1981-03-31 1984-04-17 Rca Corporation Series connected solar cells on a single substrate
US4396458A (en) * 1981-12-21 1983-08-02 International Business Machines Corporation Method for forming planar metal/insulator structures

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO8806803A1 *

Also Published As

Publication number Publication date
AU1364288A (en) 1988-09-26
JPH01502631A (ja) 1989-09-07
WO1988006803A1 (fr) 1988-09-07

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