EP0405662B1 - Récepteur pour système de transmission de données avec non-linéarités - Google Patents

Récepteur pour système de transmission de données avec non-linéarités Download PDF

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Publication number
EP0405662B1
EP0405662B1 EP90201631A EP90201631A EP0405662B1 EP 0405662 B1 EP0405662 B1 EP 0405662B1 EP 90201631 A EP90201631 A EP 90201631A EP 90201631 A EP90201631 A EP 90201631A EP 0405662 B1 EP0405662 B1 EP 0405662B1
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Prior art keywords
output signal
channel output
look
candidate
receiver
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German (de)
English (en)
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EP0405662A3 (en
EP0405662A2 (fr
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Johannes Wilhelmus Maria Bergmans
Seiichi Mita
Morishi Izumita
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Koninklijke Philips NV
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Hitachi Ltd
Koninklijke Philips Electronics NV
Philips Electronics NV
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03337—Arrangements involving per-survivor processing

Definitions

  • the invention relates to a system according to the preamble of claim 1.
  • Viterbi detectors form an estimate of the most likely transmitted data sequence, assuming that only linear ISI and noise are present. To this end, they maintain a list of candidate data sequences that are referred to as survivors. These survivors are recursively extended, and a selection process takes place on the basis of likelihood measures that are calculated for each survivor by comparing the actual channel output signal with a hypothesized output signal that would result if noise were absent and the concerned survivor would have been transmitted.
  • the aforementioned means to form these hypothesized channel output signals conventionally consist of linear weighing networks that operate on a given number of the most recent symbols of concerned survivors.
  • US 4,015,238 discloses a Viterbi decoder for decoding a signal being encoded using a convolutional code. Said decoder is only arranged for coping with noise, and is not intended for dealing with intersymbol interference.
  • the receiver is arranged according to the characterizing part of claim 1.
  • look-up tables are ideally suited to store nonlinear input-output relations, they can account for any nonlinearity of the channel. Furthermore, because they can account for any nonlinearity of the channel. Furthermore, because they all operate on digital data symbols, these look-up tables are often more conveniently implemented in digital technology than the linear weighing networks in receivers of the above-mentioned prior art. In this way the ability to handle nonlinear ISI is generally accompanied by a decreased receiver complexity.
  • An especially simple version of the receiver according to the invention has only two candidate data sequences, which are recursively updated on the basis of a likelihood measure that is representative for the difference of a function of the likelihoods of both candidate data sequences, and that is determined with the help of means for estimating hypothesized channel outputs in the absence of noise.
  • this receiver is further characterized in that said likelihood measure is determined by selection among precomputed candidate values of said likelihood measure.
  • a special version of the receiver according to the invention in which all look-up tables have only one entry is characterized in that said look-up tables take the form of registers that store hypothesized channel output symbols in the absence of noise.
  • each look-up table is adapted under the control of digits of said candidate data sequences, in response to an error signal that is representative for the difference of the channel output signal and the output signal of said look-up table.
  • each look-up table is adapted in response to an error signal that is representative for the difference of a delayed version of the channel output signal and the output signal of said look-up table when addressed by one or more delayed digits of said candidate data sequences.
  • look-up tables By making the look-up tables adaptive, they attain the ability to track variations of the channel characteristics. This greatly reduces said channel-receiver mismatch.
  • an adaptive version of the receiver according to the invention is further characterized in that each register takes the form of a digital counter that is adapted, under the control of one or more delayed digits of said candidate data sequences, in response to an error signal that is representative for the difference of a delayed version of the channel output signal and the contents of said counter.
  • each likelihood measure is representative for an accumulated version of a function that essentially equals the modulus of the difference of the actual channel output signal and a hypothesized channel output signal in the absence of noise.
  • this receiver is further characterized in that said function is determined by selection among precomputed candidate values of said function.
  • Fig. 1 shows a functional discrete-time model of a system for transmitting data symbols a k at a symbol rate 1/T through a noisy dispersive channel CHN to a data receiver REC.
  • the transmitted data signal a k is binary with a k ⁇ ⁇ -1, +1 ⁇ . This assumption is not meant to be restrictive.
  • the invention is equally applicable to multilevel or complex-valued data signals, as encountered in e.g. digital voiceband communication systems.
  • the channel CHN of Fig. 1 models the cascade of the actual continuous-time channel, a possible receiving filter and/or equalizer, and a synchronous sampling operation at the data rate 1/T.
  • the nonnegative integer M is referred to as the memory length of the channel.
  • the receiver REC in Fig. 1 operates on r k in order to produce decisions â k-D about a delayed version a k-D of a k , where D is a nonnegative integer that is referred to as the detection delay.
  • FIG. 2 depicts a basic model of the likelihood calculations that are associated to any survivor s i k-1 in a receiver according to the above-mentioned prior art.
  • a measure of accumulated likelihood j i k-1 is associated to the survivor s i k-1 .
  • this measure of accumulated likelihood will henceforth be referred to as a metric for the sake of compactness.
  • the components f T â ij k are generated by linear weighing networks LW ij that operate on the M most recent digits of s ij k , and can be recognized as hypothesized channel output samples that would result on moment k if noise ware absent and s ij k were transmitted.
  • the metrics J ij k can be interpreted as accumulated Euclidean distances between the actual channel output signal r k and hypothesized channel output signals f T â ij k . As time proceeds, the detector seeks to minimize this distance across all considered survivors.
  • the detector compares the metrics J ij k of the extended survivors for all i E ⁇ 0,...N-1 ⁇ and j E ⁇ 0,1 ⁇ , and makes a selection on this basis.
  • the details of this selection depend on the precise type of Viterbi detector, and will not be described here in further detail as they are immaterial to the invention.
  • the outputs of the linear weighing networks LW ij can only serve as hypothesized channel outputs in the absence of noise for channels CHN that do not introduce nonlinear ISI. For this reason Viterbi detectors that conform to Fig. 2 are intrinsically unable to handle nonlinear ISI.
  • Fig. 3 is identical to Fig. 2 except for look-up tables LUT ij that replace the linear weighing networks LW ij .
  • Each table is addressed by a total of M+1 binary data symbols and must therefore contain a total of 2 M+1 entries. Even for values of M as large as e.g. 10 this poses no instrumentational problems when use is made of currently available random access memories.
  • This detector also distinguishes itself from Viterbi detectors according to the above-described prior art in that it can handle nonlinear ISI.
  • the Viterbi detector of Mesiya et al. the ability to handle nonlinear ISI comes, in general, at the cost of a greatly increased complexity.
  • various summations need to be performed per symbol interval T and survivor (see eq. (26) of said article by Mesiya et al. and the accompanying explanations), as opposted to the single look-up operation in the receiver according to the invention.
  • Viterbi detector including those described in said article by Bergmans et al., several of the most recent bits of â ij k are known a priori. This enables further reductions in the size of each table.
  • the new entries h'( a ij k ) are ideally improved estimates of f( a ij k ).
  • LMS adaptation algorithm that forms the basis for the recursion of (9) can be found, for example, in an article by P.J. van Gerwen, N.A.M. Verhoecks and T.A.C.M. Claasen entitled "Design Considerations for a 144 kbit/s Digital Transmission Unit for the Local Telephone Network", IEEE J. Selected Areas in Commun., Vol. SAC-2, No.
  • the data vector a k which by (1) underlies r k should coincide with the data vector â ij k of the table that is being updated. Among all possible data vectors â ij k , the one with greatest accumulated likelihood is most likely to satisfy this prerequisite.
  • the selector signals d ij k of (11) are entirely based on information that is generated as an integral part of the detection process. For this reason they can be generated with a minimum of extra hardware.
  • the adaptation constant ⁇ in (9) enables a tradeoff between speed of convergence of the tables and steady state excess mean-square error.
  • ⁇ is usually chosen to be of the form 2 -W for some positive integer W, so that the multiplication by ⁇ in (9) amounts to a shift over W bit positions.
  • a disadvantage of the configuration of Fig. 4 is that very recent estimated data symbols play a role in the adaptation process. By nature of Viterbi detection, these symbols are less reliable estimated of the transmitted data signal than the older digits that also form part of the maintained survivors. More specifically, even if a given survivor s ij k has greatest current likelihood, its most recent digits (e.g. â ij k and â ij k-1 ) may not coincide with the corresponding transmitted digits. Especially for functions f(.) with a weak dependence on these most recent transmitted digits this may in fact occur quite frequently. By (9) and (10) this would equally often cause erroneous table entries to be updated, a problem that may hamper or even preclude convergence of the table contents to the proper values.
  • Fig. 5 A natural possibility to this end is outlined in Fig. 5.
  • the six switches SW 0 0 ,...SW 1 2 of Fig. 5 are in the position "detect", detection proceeds exactly as in Fig. 4, with the look-up tables LUT ij addressed by the estimated data vectors â ij k .
  • the switches are placed in the position "adapt".
  • a delayed data vector b ⁇ ⁇ k i [â k-M-P i ,...,â k-P i ] addresses every look-up table LUT ij .
  • the digits A i k-M-P ,..., â i k-P are for any i likely to be reliable estimates of the actually transmitted data symbols a k-M-P ,...,a k-P .
  • the received signal r k is also delayed over P symbol intervals in order to form a delayed error signal which is used to update the look-up table LUT ij according to the LMS logarithm
  • the data estimates used in this adaptation process are all relatively reliable, it is unnecessary in (14) to use selector signals to condition adaptation on current or past likelihood measures.
  • FIG. 5 A disadvantage of the configuration of Fig. 5 is that each table is read out twice per symbol interval for calculation of error signals that play a role in detection and adaptation, respectively. Relative to Fig. 4, where these two functions are combined, this lowers the largest attainable data throughput. To overcome this problem it is possible to base adaptation on delayed versions of the error signals that were calculated for detection P symbol intervals earlier. This also makes it unnecessary to delay the received signal r k . A simplified version of this possibility will be described later.
  • Fig. 6 shows a conceptual model of a two-state Viterbi detector with linear feedback as described in the aforementioned article by Bergmans et al..
  • the four extended survivors s ij k for i,j ⁇ ⁇ 0,1 ⁇ are defined as in (5) and have metrics J ij k according to (6).
  • Four linear weighing networks LW ij with i,j ⁇ ⁇ 0,1 ⁇ calculate the four possible weighted sums f T â ij k of eq. (6).
  • the vecot f specifies the impulse response of the channel. This may be achieved, for example, with the help of adaptive techniques, as described in the aforementioned book by Proakis, chapter 6, pp. 410-412. Details of these techniques as applied in receivers of prior art are immaterial to the invention and therefore not discussed or shown here.
  • â k-D is arbitrarily chosen to be the detector output â k-D .
  • a disadvantage of the detector of Fig. 6 is that the metric values j i k are, by (6) and (15), a non-decreasing function of time in the usual case that the function G(.) is nonnegative definite. This may cause problems of overflow in a digital implementation of the detector. From (15) it can be noted that only differences between metrics play a role in the selection of new survivors. This observation may be used to re-normalize metric values in such a way that they are no longer a non-decreasing function of time.
  • compare-select unit CS j produces an output signal Q j k according to eq.
  • two shift registers SR0 and SR1 store the digits [â 0 k-D ,...â 0 k-2 ] and [â 1 k-D ,...,â 1 k-2 ] of the survivors s 0 k-1 and s 1 k-1 , respectively.
  • shift register SR1 happens to have a significantly smaller propagation delay than shift register SR0, then a PARALLEL LOAD operation on SR0 may cause one or more digits of the new survivor s 1 k rather than the desired ones of the old survivor SR 0 k-1 to be loaded into SR1.
  • shift register SR0 if the propagation delay of shift register SR0 is significantly smaller than that of SR1, then a LOAD PARALLEL operation on shift register SR1 may cause one or more digits of the new survivor s 0 k rather than the desired ones of the old survivor s 0 k-1 to be loaded into SR1. Both possibilities are clearly undesirable. To avoid this problem, it is possible in a practical implementation of the receiver of Fig. 7 to choose shift registers SR1 and SR0 with well-matched propagation delays, or to latch the cross-couplings between both shift registers. As the diagram of Fig. 7 is merely meant to provide a conceptual model of a receiver according to the invention, possibilities to avoid this implementation-level problem will not be elucidated here in any further detail.
  • the look-up tables LUT ij with i,j ⁇ ⁇ 0,1 ⁇ are addressed by the digits [â i k-M ,..., â i k-2 ] of survivor s i k-1 .
  • these digits coincide with the corresponding digits of the address vectors a ij k .
  • each table can be 4 times smaller in size than for an address vector of the "full" length M+1.
  • the adaption mechanism for the look-up tables LUT ij is identical to that of Fig. 4 and is therefore not explained in further detail.
  • the selector signals d ij k are such that only the table that corresponds to the most likely extended survivor is updated.
  • selector signals are produced by a selector unit SEL that operates, for example, on the signals Q k , d 0 k and d 1 k according to the following truth table: Q k d 0 k d 1 k d 00 k d 01 k d 10 k d 11 k ⁇ 0 0,1 1 0 0 0 1 ⁇ 0 0,1 0 0 0 1 0 >0 1 0,1 0 1 0 0 >0 0 0,1 1 0 0 0 0 0 0 0 0 0 0
  • any positive value of Q k indicates that the new survivor s 0 k is more likely than its counterpart s 1 k , and vice versa for a negative value of Q k .
  • the signal d 0 k can be used to this end, as it specifies, by eq. (22), exactly which of these two extended survivors forms s 0 k .
  • the signal d 1 k specifies which of the two selector signals d 01 k and d 11 k is to be 1, while the other two selector signals are zero.
  • the new value Q k is determined from the signals Q 1 k and Q 0 k according to eq. (20) by means of a summator, while a delay unit stores Q k for use during the next symbol interval.
  • the oldest digit â 1 k-D serves as the output â k-D of the receiver, as in Fig. 6.
  • further aspects of the receiver are not elaborated here as they are either sufficiently self-evident or sufficiently similar to aspects that were discussed before.
  • the receiver of Fig. 7 is attractive in that it combines a complexity no greater than that of its linear counterpart of Fig. 6 with the ability to handle any form of linear or nonlinear ISI. Together with the receiver of Fig. 6, it shares the disadvantage that implementation may become difficult at very high data rates, as encountered in e.g. digital storage of video signals.
  • One cause of this difficulty is that the formation of the signals G(e ij k ) in Fig. 7 requires a table look-up operation, a subtraction and application of the function G, which together may require more time than is permissible.
  • Two adders serve to form error signals e 0ij k and e 1ij k by subtracting h 0ij and h 1ij from r k . Subsequent application of the function G(.) yields signals G(e 0ij k ) and G(e 0ij k ), one of which corresponds with the signal G(e ij k ) that is to be formed.
  • This feedback operation is the counterpart of the linear feedback operation that takes place in a more implicit manner in the conventional receiver of Fig. 7, as explained, for example, in the aforementioned article by Bergmans et al..
  • the configuration of Fig. 8 includes a simplified version of the mechanism of Fig. 5 for adaptation of the counters C 0ij and C 1ij on the basis of delayed digits â i k-M-P ,...,â i k-P .
  • the mechanism of Fig. 5 is preferable over the one of Figs. 4 and Fig. 7 in that it lowers convergence problems for functions f( a k ) with a weak dependence on the most recent digits of a k , such as a k and a k-1 .
  • Said simplification stems from a sign operation that is performed on the error signals e 0ij k and e 1ij k to obtain one-bit error signals that are conveniently handled with digital circuitry.
  • a switch SW e with a feedback function similar to that of SW g is controlled by â i k-2 to obtain the one-bit and undelayed counterpart sgn of the error signal of eq. (13).
  • This signal sgn is applied to a binary shift register that introduces a delay of P symbol intervals T.
  • the delayed error signal sgn serves to update the contents of the counters according to the sign algorithm Details about this simplified version of the LMS algorithm can be found, for example, in an article by N. Holte and S.
  • d 1ij k is a binary selector signal to be described, not to be confused with the signal d ij k of Fig. 7.
  • q is the quantization step size that corresponds to an increment or decrement of counter C 1ij by one unit.
  • the delayed error signal sgn is by (1) a function of the delayed data vector a k-P .
  • Alternative rules in which both vectors b ⁇ 0 k and b ⁇ 1 k are used for the formation of essentially equivalent selector signal signals are, of course, equally suitable but are not described here for the sake of brevity.
  • Fig. 8 In the configuration of Fig. 8, the signals d 1ij k and sgn are connected to the COUNT ENABLE and UP/DOWN inputs of counters C 1ij in order to realize the iteration of (24). Depending on such implementation details as the type of counters used, slight modifications of the configuration of Fig. 8 may be needed to realize the iteration of eq. (24) in a convenient manner. In this respect Fig. 8 is merely illustrative, and is not meant to restrict in any sense the use of the sign-algorithm as described above.
  • Fig. 8 can be easily modified for use of the LMS rather than sign-algorithm by omitting the Sign-operations in Fig. 1.
  • the counters of Fig. 8 should then be replaced by digital accumulators that store h 1ij k and can be updated in steps q. that may assume a multitude of sizes.
  • Intermediate forms of the LMS and sign algorithms arise when such an accumulator is used in combination with a multi-bit quantizer instead of the sign operation in Fig. 8.
  • u or q can be variable rather than fixed. For example, for rapid convergence it is attractive to start adaptation with a relatively large value of u or q. Subsequently, u or q may be decreased gradually or step-wise to a value that is appropriate for small steady-state adaptation errors.
  • Fig. 8 is meant to be illustrative rather than restrictive.
  • Fig. 9 depicts a model of a two-state Viterbi detector according to the invention in which the precomputation units of Fig. 8 are applied.
  • the detector of Fig. 9 rather distinguishes itself from the one of Fig. 7 in that it employs a faster method of calculating Q k .
  • calculation of Q k can not start before the selection process in compare/select units CS0 and CS1 is completed.
  • these actions occur largely in parallel.
  • these 4 possible values are calculated with the help of 4 summators, and concurrently the comparators S0 and S1 produce the logical signals d 0 k and d 1 k of eq. (21).
  • the actual value of Q k is merely selected from the 4 possible values in a selection circuit S q under control of d 0 k and d 1 k . From eqs. (18), (20) and (22) it may be seen that these two bits provide exactly enough information for this selection. As selection is usually a faster process than addition, the configuration for calculating Q k in Fig. 9 may be applicable at higher data rates than the one of Fig. 7, though at the cost of additional hardware, notably 3 additional adders.
  • the complete receiver according to Figs. 8 and 9 may be implemented with approximately 80 digital integrated circuits from the standard ECL 100K series as described, for example, in the "F100K ECL data book", Fairchild Camera and Instrument Corporation, Mountain View, California, 1982.
  • internal signals of the receiver are represented with a word-length of at most 6 bits.
  • the attainable data rate amounts to approximately 50 Mbit/s. Even for digital video storage applications this may be an appropriate value.
  • the nonlinearities arise from a systematic difference in the length of the pits and lands that represent runs of zeros and ones.
  • the curves of Fig. 10 pertain to a situation with severe nonlinear ISI, in which systematic errors in the writing process cause runs of zeros and ones to be T/2 seconds shorter and longer than their nominal value, respectively.
  • Fig. 11 This situation is illustrated in Fig. 11.
  • the upper trace A depicts the NRZ waveform that is applied to the channel
  • the lower trace B depicts the corresponding pattern of pits and lands that is assumed to be recorded on the optical medium.
  • the systematic difference in the lengths of pits and lands manifests itself in the replayed signal as severe nonlinear ISI.
  • the replayed signal is taken to contain linear ISI as a result of the channel bandwidth limitations that are reflected in Fig. 12.
  • the curve that is labeled C in Fig. 12 depicts the transfer characteristic of the linear part of the channel.
  • Fig. 10 confirms the superiority of the receiver according to the invention (curve b.) over its conventional counterpart (curve a.) in dealing with nonlinear ISI. While the former receiver is unable to achieve useful performance levels even at very high signal-to-noise ratio's, the latter one already achieves bit error rates of around 10 ⁇ 4 for signal-to-noise ratio's of about 16 dB. Additional simulations reveal that this represents a loss of only 3 to 4 dB with respect to a corresponding situation without nonlinearities. Thus a receiver according to the invention may provide an attractive degree of insensitivity to nonlinear ISI, unlike its predecessors of prior art.

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  • Signal Processing (AREA)
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Claims (9)

  1. Système de transmission d'un signal de données à une cadence de symboles de 1/T, via un canal de dispersion de bruit (CHN), à un récepteur de données (REC), ledit canal (CHN) introduisant une interférence intersymbole et du bruit dans le signal de données transmis, ledit récepteur (REC) comprenant des moyens pour estimer la séquence la plus probable de symboles de données transmis en conservant une trace des séquences candidates (S) et des mesures de probabilité associées (I), des moyens pour déterminer lesdites mesures de probabilité par comparaison du signal de sortie de canal réel (rk) avec un signal de sortie de canal hypothétique qui aurait été reçu si le bruit avait été absent et si ladite séquence de données candidates avait été transmise, et des moyens pour estimer ledit signal de sortie de canal hypothétique à partir de ladite séquence candidate, caractérisé en ce que lesdits moyens permettant d'estimer lesdits signaux de sortie de canaux hypothétiques comprennent une ou plusieurs tables de consultation stockant lesdits signaux de sortie de canaux hypothétiques correspondant auxdites séquences de données candidates.
  2. Système selon la revendication 1, caractérisé en ce que les moyens d'estimation de la séquence la plus probable de symboles de données transmis sont agencés pour conserver une trace de deux séquences candidates (S¹, S⁰) et une mesure de probabilité de différence (Qk) qui est représentative de la différence d'une fonction des probabilités des deux séquences de données candidates.
  3. Système selon la revendication 1, caractérisé en ce que ladite mesure de probabilité de différence (Qk) est déterminée par une sélection parmi les valeurs candidates précalculées de ladite mesure de probabilité.
  4. Système selon la revendication 1, 2 ou 3, caractérisé, en outre, en ce que lesdites tables de consultation (LUT) se présentent sous la forme de registres qui stockent des symboles de sortie de canaux hypothétiques en l'absence de bruit.
  5. Système selon la revendication 1, 2, 3 ou 4 caractérisé, en outre, en ce que chaque table de consultation (LUT) est adaptée, sous le contrôle de chiffres desdites séquences de données candidates, en réaction à un signal d'erreur (ek) qui est représentatif de la différence du signal de sortie du canal et du signal de sortie de ladite table de consultation.
  6. Système selon la revendication 1, 2 ou 3, caractérisé, en outre, en ce que chaque table de consultation (LUT) est adaptée en réaction à un signal d'erreur (ek) qui est représentatif de la différence d'une version retardée du signal de sortie de canal et du signal de sortie de ladite table de consultation (LUT) lorsqu'elle est adressée par un parmi plusieurs chiffres retardés desdites séquences de données candidates.
  7. Système selon la revendication 4, caractérisé, en outre, en ce chaque registre se présente sous la forme d'un compteur numérique (C) qui est adapté sous le contrôle d'un ou plusieurs chiffres retardés desdites séquences de données candidates, en réaction à un signal d'erreur qui est représentatif de la différence retardée du signal de sortie de canal et du contenu dudit compteur (C).
  8. Système selon la revendication 1, 2, 3, 4, 5, 6 ou 7, caractérisé, en outre, en ce que chaque mesure de probabilité est représentative d'une version accumulée d'une fonction qui est égale essentiellement au module de la différence du signal de sortie de canal réel et du signal de sortie de canal hypothétique en l'absence de bruit.
  9. Système selon la revendication 8, caractérisé, en outre, en ce que ladite fonction est déterminée par une sélection entre des valeurs candidates précalculées G(lk) de ladite fonction.
EP90201631A 1989-06-26 1990-06-21 Récepteur pour système de transmission de données avec non-linéarités Expired - Lifetime EP0405662B1 (fr)

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JP1160756A JP2960436B2 (ja) 1989-06-26 1989-06-26 非線形データ伝送システム用受信器
JP160756/89 1989-06-26

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EP0405662A2 EP0405662A2 (fr) 1991-01-02
EP0405662A3 EP0405662A3 (en) 1992-02-26
EP0405662B1 true EP0405662B1 (fr) 1996-02-21

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EP (1) EP0405662B1 (fr)
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KR (1) KR0152662B1 (fr)
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DE (1) DE69025433T2 (fr)

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JP2960436B2 (ja) 1999-10-06
KR0152662B1 (ko) 1998-11-02
US5131011A (en) 1992-07-14
EP0405662A3 (en) 1992-02-26
DE69025433D1 (de) 1996-03-28
EP0405662A2 (fr) 1991-01-02
CA2019659A1 (fr) 1990-12-26
KR910002173A (ko) 1991-01-31
JPH0327647A (ja) 1991-02-06
CA2019659C (fr) 1999-10-26
DE69025433T2 (de) 1996-09-12

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