EP0602722A2 - Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit - Google Patents

Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit Download PDF

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Publication number
EP0602722A2
EP0602722A2 EP93203453A EP93203453A EP0602722A2 EP 0602722 A2 EP0602722 A2 EP 0602722A2 EP 93203453 A EP93203453 A EP 93203453A EP 93203453 A EP93203453 A EP 93203453A EP 0602722 A2 EP0602722 A2 EP 0602722A2
Authority
EP
European Patent Office
Prior art keywords
digital
hold circuit
hold
input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP93203453A
Other languages
German (de)
English (en)
Other versions
EP0602722A3 (fr
Inventor
Paul Georg Melchior Gradenwitz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FASELEC AG
Koninklijke Philips NV
Original Assignee
FASELEC AG
Koninklijke Philips Electronics NV
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FASELEC AG, Koninklijke Philips Electronics NV, Philips Electronics NV filed Critical FASELEC AG
Priority to EP19930203453 priority Critical patent/EP0602722A3/fr
Publication of EP0602722A2 publication Critical patent/EP0602722A2/fr
Publication of EP0602722A3 publication Critical patent/EP0602722A3/fr
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

Definitions

  • the invention relates to a hold circuit which comprises a comparator element included in a feedback loop, the comparator element having a first input for receiving an analog input signal, and comprises a hold element coupled to the comparator element for holding an extreme value of the analog input signal, the comparator element having a second input for receiving a feedback signal which is a measure for the extreme value.
  • the invention further relates to a base station and a mobile station intended to receive a radio signal modulated with digital data, which base and mobile stations comprise such a hold circuit.
  • the invention further relates to a digital radio communication system comprising at least one base station and/or one mobile station, which system comprises such a hold circuit.
  • a digital radio communication system comprising at least one base station and/or one mobile station, which system comprises such a hold circuit.
  • Such a system may be, for example, a cordless telephone system operating according to the DECT standard.
  • Such a hold circuit is known as a peak value hold circuit from "Design of MOS VLSI Circuits For Telecommunications" by Yannis Tsividis and Paolo Antognetti, Prentice Hall 1985.
  • a MOS transistor whose source is connected to a capacitor used as a hold element is controlled by an output voltage of a comparator element.
  • a first input of the comparator element is supplied with an input voltage.
  • the voltage across the capacitor is fed back to a second input of the comparator element.
  • the transistor is turned on and the capacitor charged. Once the voltage across the capacitor has exceeded or is equal to the input voltage, the transistor is turned off. The voltage across the capacitor then remains constant.
  • an analog peak value is obtained.
  • a digital radio communication system with dynamic channel allocation the maximum signal strength is to be measured in a time slot. This may be done by a base station as well as a mobile station. In such a system it is inconvenient to hold the peak value as an analog value. Especially in a cordless telephone system, such as DECT, a digital peak value is even prescribed.
  • the digital peak value could easily be obtained by means of an analog-digital (A/D) converter following the known peak value hold circuit, it is true, but this leads to a more complicated, more expensive arrangement.
  • A/D analog-digital
  • an efficient circuit integration asks for a fast change-over from a digital signal environment to digital signals.
  • a hold circuit according to the invention is characterized in that the hold element is a digital hold element a digital output signal of which forms the extreme value and in that the feedback loop comprises a digital-analog (D/A) converter coupled to the hold element to convert the digital output signal into the feedback signal.
  • D/A digital-analog
  • An embodiment of the invention is characterized in that the hold element is a counter of which an enable input is coupled to an output of the comparator element.
  • the counter may be reset simply and fast with a digital reset signal for rapidly succeeding measurements.
  • a servo A/D converter is described which also comprises a counter, a D/A converter and a comparator element in the feedback loop. Once the servo A/D converter has been started by a start pulse, an input signal of the A/D converter is sampled. A digital sawtooth-shaped signal then increases until its value exceeds the input signal. A conversion result is then available on the output of the A/D converter. In consequence, the A/D converter is not arranged for determining the peak value of a signal during a specific measuring interval.
  • Fig. 1 shows a peak value hold circuit 1 according to the invention, comprising a feedback loop 2 with a comparator element 3 which comparator element has a first input 4 for receiving an input signal U i and a second input 5 for receiving a feedback signal U f .
  • An output 6 of the comparator element 3 applies a control signal U c to an input 7 of a digital hold element 8.
  • An output 9 of the digital hold element 8 produces a digital output signal U0 which is also applied to an input of a D/A converter 11.
  • An output 12 of the D/A converter 11 is coupled to the second input of the comparator element 3.
  • the comparator element 3 produces the control signal U c , causing the voltage U0 on the output 9 of the digital hold element 8 to increase. If the input voltage U i is smaller than or equal to the feedback voltage U f , the output voltage U0 remains constant. In this manner the peak value of the input voltage U i is held in digital form for a specific period of time. If the (+)input and the (-)input of the comparator element 3 are reversed, a hold circuit 1 will be obtained that holds the minimum value of an input voltage (U i ).
  • the digital hold element 8 is a counter 13, an enable input 14 of which forms the input 7 to the hold element 8 and an output 15 of which forms the output 9 of the hold element 8.
  • the counter 13 continues counting, so that the output value U0 continues rising.
  • the counter 13 continues counting, so that the output value U o continues rising.
  • the counter stops counting and the output value U0 of the counter 13 remains constant.
  • the counter 13 may be reset by a reset signal U r applied through the reset input 16.
  • the hold element 8 may be arranged as a down counter 17.
  • Fig. 2 the input voltage U i and the feedback voltage U f are plotted against time in the case where the hold circuit holds the peak value.
  • the feedback voltage U f is the analog equivalent to the digital output voltage U0.
  • the feedback voltage U f trails the input voltage U i until it exceeds the input voltage U i .
  • the voltage U f then remains constant. Once the input voltage U i has exceeded the feedback voltage U f , the voltage U f in its turn trails the voltage U i .
  • Fig. 3 shows a digital radio communication system 20 comprising a plurality of mobile stations MS1, MS2, MS3, MS4 and MS5, and a plurality of base stations BS1, BS2 and BS3. Each of these base stations BS1, BS2 and BS3 is coupled to an exchange 23 over respective data lines D1, D2 and D3.
  • the control means 38 is coupled to a signal processing unit 39 which unit customarily comprises an A/D converter 40, a D/A converter 41 and a CODEC 42 for converting and (de)coding speech in digitized speech and vice versa .
  • a microphone 43 and a loudspeaker or other acoustic converter 44 are coupled to the signal processing unit 39 and for the purpose of data, for example, a facsimile device 45 via a modem 46.
  • the signals are transmitted to an exchange 23 over data lines D1, D2 or D3.
  • Fig. 5 shows a time slot TS of the digital radio communication system 20 operating according to what is commonly referred to as the DECT standard (Digital European Cordless Telecommunications).
  • the remaining period of time within a time slot is called guard space GS.
  • a maximum value U max of the input signal U i is to be determined during the interval in which data are transferred, including a preceding period ES1 of 10 ⁇ s and a subsequent period ES2 of 10 ⁇ s. In the remaining time of a time slot the maximum value U max is read out and the counter 13 reset.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Mobile Radio Communication Systems (AREA)
EP19930203453 1992-12-14 1993-12-09 Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit. Withdrawn EP0602722A3 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP19930203453 EP0602722A3 (fr) 1992-12-14 1993-12-09 Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit.

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP92203889 1992-12-14
EP92203889 1992-12-14
EP19930203453 EP0602722A3 (fr) 1992-12-14 1993-12-09 Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit.

Publications (2)

Publication Number Publication Date
EP0602722A2 true EP0602722A2 (fr) 1994-06-22
EP0602722A3 EP0602722A3 (fr) 1994-10-26

Family

ID=26131854

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19930203453 Withdrawn EP0602722A3 (fr) 1992-12-14 1993-12-09 Circuit de maintien station mobile, station de base et système de radiocommunication avec un tel circuit.

Country Status (1)

Country Link
EP (1) EP0602722A3 (fr)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2595889B1 (fr) * 1986-03-14 1988-05-06 Havel Christophe Dispositif de controle de puissance d'emission dans une station emettrice-receptrice de radiocommunication

Also Published As

Publication number Publication date
EP0602722A3 (fr) 1994-10-26

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