EP1078450A1 - Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle - Google Patents

Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle

Info

Publication number
EP1078450A1
EP1078450A1 EP99918254A EP99918254A EP1078450A1 EP 1078450 A1 EP1078450 A1 EP 1078450A1 EP 99918254 A EP99918254 A EP 99918254A EP 99918254 A EP99918254 A EP 99918254A EP 1078450 A1 EP1078450 A1 EP 1078450A1
Authority
EP
European Patent Office
Prior art keywords
signal
timing
frequency
positive
vsb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99918254A
Other languages
German (de)
English (en)
Other versions
EP1078450A4 (fr
Inventor
Oded Melamed
Naftali Sommer
Yigal Bitran
Ofir Shalvi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Libit Signal Processing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Libit Signal Processing Ltd filed Critical Libit Signal Processing Ltd
Publication of EP1078450A1 publication Critical patent/EP1078450A1/fr
Publication of EP1078450A4 publication Critical patent/EP1078450A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/24—Homodyne or synchrodyne circuits for demodulation of signals wherein one sideband or the carrier has been wholly or partially suppressed
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Definitions

  • the present invention relates to digital signal processing systems in general, and more particularly to methods and apparatus for timing recovery of vestigial sideband (VSB) modulated signals.
  • VSB vestigial sideband
  • VSB receivers utilize a known synchronization (sync) pattern to extract timing information from the VSB signal.
  • sync synchronization
  • the Digital Television Standard Document A/55 published by the American Television Standards Committee (ATSC) defines a 4 symbol sync pattern for every 832 symbols transmitted in a VSB signal.
  • Receivers that utilize such sync patterns such as is described in U.S. Patent No. 5,260,793, typically suffer from a relatively long convergence time as well as convergence to a poor solution where strong and close (less than pattern length) intersymbol interference is present.
  • the present invention seeks to provide methods and apparatus for timing recovery of digital vestigial sideband (VSB) signals that overcomes the disadvantages of the prior art described above.
  • a "blind" approach is employed where a baseband VSB signal is filtered by a band-edge filter. The filter output is then transformed using a non-linear transformation and then filtered using a linear filter. The output is then used as a timing correction signal to a digital resampler and/or to an external clock source. In this manner the energy contained in the sampled received signal is maximized.
  • This approach is more responsive to signal reflections in the channel and has a faster acquisition time than do prior art receivers.
  • apparatus for timing recovery of vestigial sideband (VSB) modulated signals including a narrow band pass filter adapted to receive a baseband VSB signal having a positive-frequency signal edge and provide a portion of the positive-frequency signal edge, and a non-linear transformer adapted to receive the signal portion and provide a timing-retrievable signal adapted for retrieval of timing information therefrom.
  • the apparatus further includes a loop filter adapted to receive the timing-retrievable signal and average the timing-retrievable signal to provide a timing correction signal.
  • the pass band of the band pass filter generally encompasses the positive-frequency signal edge, and the center frequency of the positive-frequency signal edge is included in the signal portion.
  • the signal portion includes a nonzero band of frequencies of the positive-frequency signal edge frequency.
  • the non-linear transformer is adapted to square the signal portion thereby providing a complex signal having a real and an imaginary component and provide the imaginary component as the timing-retrievable signal.
  • a method for timing recovery of vestigial sideband (VSB) modulated signals including filtering a baseband VSB signal having a positive-frequency signal edge to provide a portion of the positive-frequency signal edge, and non-linearly transforming the signal portion to provide a timing-retrievable signal adapted for retrieval of timing information therefrom.
  • VSB vestigial sideband
  • the method further includes averaging the timing-retrievable signal to provide a timing correction signal.
  • the filtering step provides a nonzero band of frequencies of the positive-frequency signal edge frequency included in the signal portion.
  • the transforming step includes squaring the signal portion, thereby providing a complex signal having a real and an imaginary component, and providing the imaginary component as the timing-retrievable signal.
  • Fig. 1 is a simplified graphical illustration of the spectrum of a baseband
  • Fig. 2 is a simplified block diagram of a VSB receiver constructed and operative in accordance with a preferred embodiment of the present invention.
  • Fig. 3 is a simplified block diagram of the VSB receiver timing block of Fig.
  • Fig. 1 is a simplified graphical illustration of the spectrum of a baseband VSB signal useful in understanding the present invention as described hereinbelow.
  • a VSB modulated signal is defined herein as a signal of the
  • v(t) Re(Va n p(t - nT)e J2 ⁇ c ' ⁇ , where a n are the information symbols, p(t) is the n modulation pulse shape, f c is the carrier frequency, T is the symbol period, and Ref ⁇
  • a baseband VSB signal is defined
  • a spectrum S of a baseband VSB signal is shown in Fig. 1, having a positive frequency signal edge 2 and a negative frequency signal edge 4.
  • a negative frequency edge center 6 is defined herein as the signal at a frequency of 0.
  • a positive frequency edge center 8 is defined as the signal
  • frequency edge center 8 are usually the 3DB bandwidth points of the VSB signal.
  • FIG. 2 is a simplified block diagram of a VSB receiver constructed and operative in accordance with a preferred embodiment of the present invention.
  • a VSB modulated signal 10 embodying transmitted data is shown being received by a tuner 12 and down-converted to a signal 12' of an intermediate frequency (IF), preferably a standard IF frequency such as 44 MHz, prior to channel decoding.
  • IF intermediate frequency
  • the down-converted signal 12' is then sampled at an analog-to-digital (A/D) converter 14 to an A/D converted signal 14'.
  • A/D analog-to-digital
  • FPLL 16 frequency-and-phase-locked loop 16 which locks the carrier frequency and phase and produces an I/Q signal 16' typically comprised of both in-phase (I) and quadrature-phase (Q) signal components.
  • FPLL 16 preferably shifts signal 16' in frequency such that the spectrum of signal 16' appears as spectrum S in Fig. 1.
  • FPLL 16 then feeds the I/Q signal 16' to a digital resampler 20 which preferably comprises a digital numerically controlled oscillator (NCO).
  • a timing recovery block 18 then processes a signal 20' output from digital resampler 20 to derive a timing correction signal 18' which may then be fed back to digital resampler 20.
  • Digital resampler 20 may process the I/Q signal 16' received from FPLL 16 using the timing correction signal 18' to derive T-spaced or fractionally sampled signals which are synchronized with the transmitted clock rate embodied in VSB modulated signal 10.
  • the resampled signal is then fed to a VSB detector 24 which derives the data from the signal.
  • FPLL 16 feeds the I/Q signal 16' directly to VSB detector 24, bypassing digital resampler 20.
  • the timing correction signal 18' is then fed to an external clock generator 22 which may be used to drive the A/D converter 14 in synchronicity with the transmitted clock rate.
  • Fig. 3 is a simplified block diagram showing timing recovery block 18 of Fig. 2 in greater detail.
  • Signal 20' shown in Fig. 3 as input signal a(k) and generally designated 26, is a complex signal having a real component, being the in-phase (I) component described hereinabove with reference to Fig. 2, and an imaginary component, being the quadrature-phase (Q) component.
  • Signal 26 is filtered by a narrow band-pass filter 28 centered at a positive-frequency signal edge 30 of signal 26.
  • the pass band of filter 28 generally encompasses positive-frequency signal edge 30, and filter 28 provides a portion of positive-frequency signal edge 30.
  • the signal portion preferably includes the center frequency of edge 30, and most preferably a nonzero band of frequencies of positive-frequency signal edge 30.
  • the output of filter 28, shown in Fig. 3 as signal x(k) is then passed to a non-linear transformer 32 which is preferably a square function that raises to the power of two.
  • the output of transformer 32 when averaged over time, is proportional to the symbol timing offset of the signal 16', and may therefore be used to derive a timing correction signal that may be fed to a digital resampler or an external clock source such as a voltage controlled oscillator (VCXO).
  • VXO voltage controlled oscillator
  • Performance may also be affected by the choice of the band pass filter 28, where the narrower the filter, the less noisy the steady state output but with slower convergence. It is appreciated that the averaging over time of the output of transformer 32 may be accomplished by other known substitutes for loop filter 34 described hereinabove.
  • digital resampler 20 preferably includes a digital numerically controlled oscillator (NCO) that generates the nominal timing instances of the signal and modifies them according to the correction signal z(k).
  • NCO digital numerically controlled oscillator
  • the VCXO is assumed to be nominally tuned to the nominal sampling frequency of the signal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

Appareil pour la récupération de rythme de signaux modulés dans la bande latérale résiduelle(VSB). Ledit appareil comporte un filtre à bande étroite (28) conçu pour recevoir un signal VSB (26) dans la bande de base, ayant un flanc (30) à fréquence positive, et produisant une partie du flanc (30) à fréquence positive. Une transformée non-linéaire (32) est conçue pour recevoir la partie de signal et permet d'envoyer un signal extractible par récupération à un filtre à boucle (34) conçu pour recevoir et moyenner le signal extractible par récupération, de sorte qu'un signal corrigé par récupération soit produit.
EP99918254A 1998-05-04 1999-05-04 Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle Withdrawn EP1078450A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8406398P 1998-05-04 1998-05-04
US84063P 1998-05-04
PCT/IL1999/000234 WO1999057805A1 (fr) 1998-05-04 1999-05-04 Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle

Publications (2)

Publication Number Publication Date
EP1078450A1 true EP1078450A1 (fr) 2001-02-28
EP1078450A4 EP1078450A4 (fr) 2002-11-20

Family

ID=22182662

Family Applications (1)

Application Number Title Priority Date Filing Date
EP99918254A Withdrawn EP1078450A4 (fr) 1998-05-04 1999-05-04 Procede et appareil pour la recuperation de rythme de signaux modules dans la bande laterale residuelle

Country Status (3)

Country Link
EP (1) EP1078450A4 (fr)
AU (1) AU3626199A (fr)
WO (1) WO1999057805A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2026796B (en) * 1978-07-14 1982-09-29 Fujitsu Ltd Clock synchronization circuit
US5706057A (en) * 1994-03-21 1998-01-06 Rca Thomson Licensing Corporation Phase detector in a carrier recovery network for a vestigial sideband signal
GB9511568D0 (en) * 1995-06-07 1995-08-02 Discovision Ass Signal processing apparatus and method
US5694419A (en) * 1995-11-07 1997-12-02 Hitachi America, Ltd. Shared resource modulator-demodulator circuits for use with vestigial sideband signals
US5712873A (en) * 1996-06-04 1998-01-27 Thomson Consumer Electronics, Inc. Multi-mode equalizer in a digital video signal processing system

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
No further relevant documents disclosed *
See also references of WO9957805A1 *

Also Published As

Publication number Publication date
AU3626199A (en) 1999-11-23
EP1078450A4 (fr) 2002-11-20
WO1999057805A1 (fr) 1999-11-11

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