EP1479108A1 - Structure de transistor bipolaire - Google Patents
Structure de transistor bipolaireInfo
- Publication number
- EP1479108A1 EP1479108A1 EP02707105A EP02707105A EP1479108A1 EP 1479108 A1 EP1479108 A1 EP 1479108A1 EP 02707105 A EP02707105 A EP 02707105A EP 02707105 A EP02707105 A EP 02707105A EP 1479108 A1 EP1479108 A1 EP 1479108A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor structure
- emitter
- base
- thyristor
- bipolar transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 2
- 238000001465 metallisation Methods 0.000 claims 1
- 238000009792 diffusion process Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 230000010354 integration Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/641—Combinations of only vertical BJTs
- H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
Definitions
- the present invention relates to an improved bipolar transistor structure. More particularly, the invention relates to a bipolar transistor structure having conventional base, collector and emitter terminals.
- the invention relates specifically, but not exclusively, to a bipolar transistor inserted into a bipolar transistors Darlington configuration and the following description is given with reference to this field of application with the only purpose to simplify its disclosure.
- These kind of small spark engines normally include an electronic starter using power transistors and, in the most occasions, power .transistors in a Darlington configuration.
- a transistor Darlington configuration includes a couple of bipolar transistors connected one to the other with a common collector terminal and with the base terminal of a first or driver transistor connected to the base terminal of a second transistor.
- bipolar power transistors are often used connected one to the other in a Darlington configuration.
- the technical problem of the present invention is that of providing a new bipolar transistor structure, inside a Darlington configuration if that is the case, such a structure having functional and structural features allowing to simplify the corresponding driving circuit or even to omit it.
- Such a transistor structure should be suitable for semiconductor ' integration by a simple manufacturing process at low costs. Disclosure of Invention
- the solution idea behind the invention is that of integrating on a same chip the power bipolar transistor and a Thyristor SCR device between the base terminal and the emitter terminal of said transistor.
- the driving circuit of the Darlington configuration is extremely simplified and a simple current pulse signal on the gate terminal of the Thyristor SCR device allows realising a short-circuit between the base and the emitter terminals of the power transistor thus turning off the power transistor itself or the Darlington configuration wherein it is inserted.
- a transistor of that kind is inside a Darlington configuration it's preferable to use an Emitter Switching .technology so that the base and emitter regions in the semiconductor chip are obtained by buried layers and corresponding sinker contact regions.
- the invention further relates to a manufacturing process of such a transistor structure as defined in claims 8 and following.
- - Figure 1 is a schematic view of a Darlington transistors structure realised according to the present invention
- - Figure 2 shows a schematic view in a vertical cross section and enlarged scale of an integrated semiconductor circuit portion including at least a transistor according to the scheme of Figure 1;
- Figures 3 and 4 show respective schematic views in vertical cross section and enlarged scale of a semiconductor material portion that is subjected to the process phase according to the present invention for manufacturing an integrated transistors structure as shown in Figure 2;
- the Darlington structure 1 comprises a first driver transistor Tl, of the NPN type, having conventional terminals: a base Bl terminal, a collector Cl terminal and an emitter El terminal.
- the transistor Tl is a power transistor for application with high currents and voltages.
- the Darlington structure 1 comprises a second power transistor T2, of the NPN type, having conventional terminals: a base B2 terminal, a collector C2 terminal a d an emitter E2 terminal.
- this second transistor T2 is a bipolar power transistor.
- the two transistors Tl and T2 are connected one to the other with the emitter El of the first transistor Tl connected to the base B2 of the second transistor T2 and with common collectors Cl and C2 terminals.
- the common collectors Cl and C2 correspond to the collector terminal C of the whole structure;
- the base Bl of the first transistor Tl is the base terminal B of the whole structure while the emitter terminal E2 of - the second transistor is the emitter of the whole structure 1.
- the terminal B, C and E correspond to the terminal of a single bipolar transistor and the whole portion included inside the dotted line may be considered a single power transistor.
- the collector terminal C is normally coupled to a voltage supply reference.
- a resistance R is connected between the collector terminal C and the base terminal B of the Darlington structure 1 ; the resistance R is integrated in the same chip.
- the resistance R is a high voltage type, that is to say it is suitable to withstand high voltage values between its terminals. This resistance may be integrated according to what disclosed in the US patent No. 5,053,743.
- an electronic device 3 a SCR thyristor device, is connected between the base B and the emitter E of the Darlington structure 1.
- the thyristor device 3 is realised in a four-layer PNPN structur ,. that will be disclosed after.
- the Darlington structure 1, the resistance R and the SCR thyristor device 3 are integrated into the same semiconductor material portion and form a monolithic integrated circuit.
- the structure 1 may be manufactured even with an Emitter Switching (E.S) technology.
- E.S Emitter Switching
- both the emitter E and the base B are realised with buried layers and contact sinker wells, as shown in figure 2.
- the Darlington structure 1 may be considered integrating also the driving circuit.
- the driving circuit of the Darlington configuration is so simplified if compared to know " solutions that with a simple pulse signal on the gate terminal of the thyristor 3 SCR it's possible to establish a short circuit between the base B and the emitter E thus turning off the Darlington configuration.
- a very simple circuit is required to apply the more suitable current pulse to the gate terminal of the thyristor.
- the figures that represent cross sections of integrated circuit portions during its manufacturing process are not reproduced in scale but are reproduced to show the most important features of the invention.
- the inventive process initially provides for a diffusion step.
- the doping phases and the kind of the diffused regions are always disclosed just as a indicative and non-limitative example since they may be implemented in a dual manner.
- This layer 5 has an N- type doping and a resistivity and thickness corresponding to the voltage level that the structure 1 may stand as a whole.
- This epitaxial layer 5 may or may not contain an optional energy layer.
- a first buried layer 6 (P-BL) is then realised to form the base B of the first transistor Tl and so of the Darlington structure 1.
- a thermal oxide layer is formed on the surface; an aperture is defined through this oxide layer to realise, by a photolithography technique, a second buried layer 7 (N-BL) allowing to obtain the emitter E2 of the second transistor T2 of the Darlington structure 1.
- a second " epitaxial layer 8 is grown having the same resistivity type of the first epitaxial layer 5 but with a thickness of few micron, for instance 4-6 micron, as schematically shown in figure 3.
- the process is carried on with a diffusion phase of so-called sinker wells 9, 10, of the P and N type respectively, which are obtained inside the second epitaxial layer 8 and are provided to contact the corresponding base and emitter regions, that is the first 6 and the second buried layer 7.
- the sinker diffusion 9, of the P type, is also used to form the anode of the thyristor 3 SCR.
- FIG. 4 Obviously, at one side of figure 4 there are the first and the second transistors Tl, T2 of the Darlington configuration.
- the other figures 5 and 6 show an enlarged portion of the same semiconductor material allowing seeing even the Darlington structure.
- These layers 11, 12 are obtained by diffusion and are of a P and N+ type respectively. These layers 11, 12 are provided for the P body and N source regions of the thyristor in the Emitter Switching structure.
- the layers obtained at the end of this process step provide a PNPN four layers structure as clearly shown in figure 5. More particularly, the P layer 11 is the gate of the thyristor device 3 while the N+ layer 12 is its cathode.
- a gate contact 14 is provided over the P region 11 for the thyristor SCR that also correspond to the base B of the structure 1.
- the thyristor area so realised is suitably sized so that the direct voltage drop (Vf) on this component is minor than the voltage drop base-emitter (Vbe) of the structure 1. In this manner an efficient short circuit is realised between the base B and the emitter E.
- a second metallic layer 15 is provided to contact the anode of the thyristor 3 SCR and the base B of the Darlington structure 1 with the high voltage resistance R that is connected to the voltage supply reference.
- the improved Darlington structure according to the present invention do solves the technical problem and reached various advantages the first of which is given on the fact that, inside a single integrated power circuit, a simple and efficient driving circuit is obtained for the transistor or the transistors Darlington structure.
- the turning off speed is not very high but this is not a problem for the kind of applications wherein the Darlington structure is integrated.
Landscapes
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Abstract
L'invention concerne une structure améliorée de transistor bipolaire (1) pouvant être intégrée dans une configuration Darlington, cette structure étant du type avec bornes classiques de base (B), de collecteur (C) et d'émetteur (E) et comprenant une résistance (R) entre le collecteur (C) et la base (B) et un dispositif de thyristor (3) SCR entre la base (B) et l'émetteur (E). La résistance (R) est une résistance haute tension destinée à maintenir normalement en fonction la structure de transistor alors que le thyristor est un circuit de mise hors circuit qui est activé et piloté sur sa borne de grille.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/IT2002/000123 WO2003073509A1 (fr) | 2002-02-28 | 2002-02-28 | Structure de transistor bipolaire |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1479108A1 true EP1479108A1 (fr) | 2004-11-24 |
Family
ID=27764146
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP02707105A Withdrawn EP1479108A1 (fr) | 2002-02-28 | 2002-02-28 | Structure de transistor bipolaire |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1479108A1 (fr) |
| CN (1) | CN100390996C (fr) |
| AU (1) | AU2002241256A1 (fr) |
| WO (1) | WO2003073509A1 (fr) |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1303338A (fr) * | 1970-10-06 | 1973-01-17 | ||
| US4032958A (en) * | 1972-12-29 | 1977-06-28 | Sony Corporation | Semiconductor device |
| JPS5272183A (en) * | 1975-12-12 | 1977-06-16 | Mitsubishi Electric Corp | Semiconductor device with protecting device |
| GB2030765B (en) * | 1978-10-02 | 1983-04-27 | Lumenition Ltd | Darlington transistor pairs |
| DE3123667C2 (de) * | 1981-06-15 | 1985-04-18 | Robert Bosch Gmbh, 7000 Stuttgart | Darlington-Transistorschaltung |
| FR2646019B1 (fr) * | 1989-04-14 | 1991-07-19 | Sgs Thomson Microelectronics | Resistance spirale haute tension |
| DE4207349A1 (de) * | 1992-03-07 | 1993-09-09 | Telefunken Microelectron | Leistungs-spannungsbegrenzungsschaltung |
-
2002
- 2002-02-28 EP EP02707105A patent/EP1479108A1/fr not_active Withdrawn
- 2002-02-28 CN CNB028283805A patent/CN100390996C/zh not_active Expired - Fee Related
- 2002-02-28 AU AU2002241256A patent/AU2002241256A1/en not_active Abandoned
- 2002-02-28 WO PCT/IT2002/000123 patent/WO2003073509A1/fr not_active Ceased
Non-Patent Citations (1)
| Title |
|---|
| See references of WO03073509A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2003073509A1 (fr) | 2003-09-04 |
| AU2002241256A1 (en) | 2003-09-09 |
| CN100390996C (zh) | 2008-05-28 |
| CN1623233A (zh) | 2005-06-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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| 17P | Request for examination filed |
Effective date: 20040920 |
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| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
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| AX | Request for extension of the european patent |
Extension state: AL LT LV MK RO SI |
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| 17Q | First examination report despatched |
Effective date: 20080507 |
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| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20080830 |