EP1486846A1 - Schalter in Bipolartechnik - Google Patents

Schalter in Bipolartechnik Download PDF

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Publication number
EP1486846A1
EP1486846A1 EP04300320A EP04300320A EP1486846A1 EP 1486846 A1 EP1486846 A1 EP 1486846A1 EP 04300320 A EP04300320 A EP 04300320A EP 04300320 A EP04300320 A EP 04300320A EP 1486846 A1 EP1486846 A1 EP 1486846A1
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EP
European Patent Office
Prior art keywords
transistor
transistors
type
current
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04300320A
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English (en)
French (fr)
Inventor
Joel Concord
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of EP1486846A1 publication Critical patent/EP1486846A1/de
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

Definitions

  • the present invention relates to an integrated switch realized by means of bipolar transistors.
  • Figure 1 shows a classic example of such so-called adaptive switch.
  • the main transistor 1 is a PNP transistor connected in series with a load Q, between an IN input terminal to which a voltage will be applied continuous supply Vcc and a terminal M representing the electrical ground of the circuit.
  • the emitter of transistor 1 is connected to the IN terminal constituting an input terminal of the switch and its collector defines an output OUT terminal, connected to the load Q whose other terminal is to ground M.
  • the rest of the assembly is made up of the adaptive control.
  • This circuit is based on the copying by a transistor 2 (here PNP type) of a fraction of the through current transistor 1.
  • the emitter of transistor 2 is connected to the IN terminal (therefore also at the emitter of transistor 1), and its base is connected to that of transistor 1.
  • the collector of transistor 2 is connected to a current, formed by two NPN 3 and 4 type transistors (defining the source transistor and the transistor respectively mirror copy) whose emitters are connected to ground and whose respective bases are interconnected to the collector of transistor 3 (and therefore to the collector of transistor 2).
  • the bases of transistors 1 and 2 are also connected to the output of the current mirror, on the collector of transistor 4.
  • a polarization resistor R connects the IN terminal to the bases of the transistors 3 and 4.
  • An NPN transistor 5 controlled by a signal ON / OFF activation of the two-state circuit, connects the collector from transistor 2 to ground. When transistor 5 conducts, the current from transistor 2 is flowing to ground and none current is then drawn from the base of transistor 1, which guaranteed its blocking.
  • a disadvantage of the structure of Figure 1 is that transistors 1 and 2 have, between their collectors and transmitters respective, different polarizations. Indeed, the transistor 1 operates in saturated mode with a collector-emitter voltage weak while transistor 2 (unsaturated) sees to its terminals a much higher collector-emitter voltage. This difference in collector-emitter voltage can induce a error of current copying between these two transistors and causing then a significant increase in the consumption of switch on load as at rest. This drawback is encountered especially in integrated technology where the low dimension of the components makes their parameters more sensitive at the polarization conditions.
  • the present invention aims to provide a switch in bipolar technology overcoming the disadvantages of known switches. More particularly, the invention aims to propose a switch in which the feedback report of current is independent of any collector-emitter voltage deviation between the transistors of the mirror.
  • the invention also aims to propose a solution particularly suitable for low consumption systems under integrated form.
  • the invention aims to propose a solution compatible with the addition of a function limiting the output current, among other things to protect the circuit against short circuits at the output or limit the maximum current in charge Q.
  • said current mirror circuit consists of a third second and fourth type bipolar transistor bipolar transistor of the second type connecting the base of the first transistor at a second voltage application terminal power supply, the bases of the third and fourth transistors being interconnected to the collector of the third transistor connecting the collector of the second transistor via of a fifth bipolar transistor of the first type belonging to the bias circuit.
  • the fourth transistor has an emitter surface greater than that of the third transistor.
  • the bias circuit further includes a sixth transistor of the second type connected between said output terminal by its emitter and a seventh bipolar transistor of the second type mounted in current mirror on said third and fourth transistors, the emitter surface of the seventh transistor preferably being identical to that of the third transistor.
  • a starting current source connects the base of the first transistor at the second voltage application terminal Power.
  • a starting assistance circuit injects a current on the collector of the second transistor, the start-up assistance circuit being preferably a resistor in series with an eighth transistor of the first type connected between the input terminal and said collector of the second transistor, the base of the eighth transistor being connected to the base of the first transistor of so as to inject an image current of the output current.
  • an internal current limiting circuit is provided, preferably a resistor inserted between the collectors fifth and third transistors, and a ninth transistor current diversion to ground.
  • the transistors of the first type are PNP transistors, the transistors of the second type being NPN transistors.
  • the transistors of the first type are transistors of the type NPN, the transistors of the second type being transistors of PNP type.
  • Figure 2 shows the electrical diagram of a switch according to an embodiment of the invention.
  • this switch includes a transistor main 1 (here PNP) between two terminals IN and OUT of circuit.
  • PNP transistor main 1
  • this PNP transistor will preferably be of an isolated type, i.e. a component bipolar for which the parasitic elements likely to conduct a leakage current in the substrate in saturation mode have been numbed (for example, a transistor in a insulated pocket).
  • the IN terminal is intended to receive a potential positive supply Vcc while the OUT terminal is intended to be connected to a load Q whose other terminal is connected at mass M (or at a more negative supply potential than the potential Vcc).
  • the collector of transistor 2 is not not directly connected to the collector of transistor 3 but is via a transistor 10, of the same type as transistors 1 and 2 (in the example, PNP), belonging to a transistor bias circuit 6 at the same voltage as transistor 1.
  • This circuit 6 also includes a transistor 11 PNP type mounted as a voltage follower and a transistor 12 NPN type mirror mounted on transistors 3 and 4, the transistors 11 and 12 being in series between the OUT terminal and the mass. More specifically, the emitter of transistor 11 is connected to the OUT terminal and its collector is connected to the collector of transistor 12 whose emitter is grounded. The basis of transistor 11 is connected to its collector and to the base of the transistor 10 whose emitter is connected to the collector of the transistor 2 and whose collector is connected to the collector of the transistor 3. Finally, the base of transistor 12 is connected to bases of transistors 3 and 4.
  • Transistors 10 and 11 are dimensioned so that the ratio of their emitter areas is equal to ratio of the currents crossing them, i.e. as a function of size ratio between transistors 3 and 12. Thus, their base-emitter voltages are equal. It follows that the collector-emitter voltages of transistors 1 and 2 are returned identical. The transistor 2 is now polarized the same so that transistor 1, the feedback ratio is no longer impacted by a difference in collector-emitter voltage of these two transistors and therefore remains constant and equal to 1 / (N-1), where N represents the ratio of the emitter surfaces of the transistors 1 and 2.
  • Transistors 3 and 4 also have surfaces of different emitters, transistor 4 having a surface emitter larger than transistor 3, the ratio of surface of transistor 4 over that of transistor 3 is designated thereafter by M.
  • the transistor 12 preferably has the same size as transistor 3.
  • a current source 7 connects the base of the transistor 1 to ground so as to draw current on this base when the engine starts.
  • the easiest way to make this source of current is a resistor.
  • this resistance is sized to draw a prepolarization current from the transistor 1 on the order of a few microamps.
  • the current source 7 is produced by a transistor assembly.
  • the current supplied by transistor 1 to the load following its prepolarization is amplified by the positive feedback loop internal to the structure, up to the quiescent value corresponding to the output voltage V out divided by l load impedance Q.
  • circuit 6 induces a response time of the switch when the load Q varies greatly.
  • the internal currents are extremely weak or even zero and the transistor 10 is almost non-conductive. Therefore, the current in transistor 1 remains limited to the product of current supplied by source 7 multiplied by the gain of transistor 1 for a more or less long period, necessary for the current of leak to cause priming of the structure and allow the switch to supply current to the load.
  • this reaction time is reduced by injecting a weak current, image of the output current, directly on the collector of the transistor 3.
  • a circuit 8 is therefore provided for injecting current consisting of a resistor R8 in series with a transistor PNP 13 between the IN terminal and the collector of the transistor 3.
  • the base of transistor 13 is connected to the base of transistor 2.
  • the presence of this circuit 8 does not generate consumption problem despite transistor 13 having a collector-emitter voltage different from that of transistor 1.
  • the resistance R8 which is preferably of value high (from a few kiloohms to a few tens of kiloohms) induces a current limitation in transistor 13 making negligible the current supplied by it compared to the current in transistor 2 in normal operation.
  • the internal current consumed by the switch is then equal to I OUT * (M + 2) / (NM) and the efficiency of the switch is equal to (NM) / (N + 2).
  • An advantage of the switch of the invention is that it allows saturation of the main transistor 1 whatever either the conditions (temperature, characteristics of the component, output load).
  • Another advantage of the invention is that consumption of the switch is proportional to the output current and that it generates a weak quiescent current, which makes the structure compatible with low consumption applications.
  • Another advantage of the invention is that the structure is compatible with low voltage applications (up to about 1.5 V) due to the low number of base-emitter voltages between power lines.
  • Another advantage of this switch is that it is can be integrated on a chip in bipolar technology.
  • Figure 3 shows another embodiment of the switch of the invention, equipped with a limitation circuit 9 of internal current.
  • the structure of Figure 3 shows the same elements as those shown in Figure 2.
  • a current limiting resistor R9 is interposed between the collector of transistor 10 and that of transistor 3.
  • This resistor is associated with a PNP type transistor 14 whose emitter is connected to the collector of transistor 10 and the base of which is connected to the collector of transistor 3, the collector of transistor 14 being connected to ground.
  • Circuit 9 limits the output current of the switch to a value I LIM approximately equal to (N / R9) * VBe14, where Vbe14 represents the base-emitter voltage of transistor 14.
  • transistor 14 becomes progressively conductive and part of the current from transistor 10 drifts to ground as soon as the output current reaches approximately the above limit value. Consequently, the output current I OUT of the device is regulated approximately to the value I LIM .
  • transistor 15 of NPN type connecting the terminal IN (by its collector) to the collector of transistor 11 (by its emitter) and whose base is connected to the collector of transistor 10.
  • transistor 10 When transistor 10 begins to saturate under the effect of an increase in its base current, the voltage collector-emitter of transistor 10 decreases and causes the increase in the base-emitter voltage of transistor 15 hence its conduction which therefore allows transistor 12 to draw its collector current not through the base of transistor 10 but by transistor 9, with no significant impact on the limitation of current.
  • Figure 3 also illustrates a variant consisting to replace the short circuit of the base and the collector of the transistor 11 as shown in figure 2 by a resistor R11.
  • the presence of the resistance R11 allows to advance the instant at the start of conduction of transistor 15 without it being necessary to wait for too much saturation of the transistor 10.
  • FIG. 4 illustrates an alternative embodiment of a circuit 9 'for current limitation.
  • this variant consists in removing circuit 9 (therefore directly connecting the collector of transistor 10 to the collector of transistor 3) and to connect a device 9 'upstream of the terminal IN. More precisely, a shunt resistor Rs is inserted between the terminal for applying the potential Vcc and the terminal IN.
  • Two PNP type transistors 16 and 17 are mirrored around the resistor Rs, the emitter of transistor 16 being connected to terminal Vcc while the emitter of transistor 17 is connected to the IN terminal, the respective collectors of the transistors 16 and 17 being connected to two current sources 19 and 20 of the same value, preferably produced by mounting current mirror type transistors, and their base being interconnected to the collector of transistor 17.
  • the collector of transistor 16 is connected to the base of a NPN 18 transistor whose collector is connected to the IN terminal and whose emitter is connected to the collector of transistor 4. The rest of the circuit of figure 3 has not been represented in figure 4.
  • the limiting current of circuit 9 ' is fixed by the emitter area ratio of transistors 16 and 17. In setting this ratio equal to P, the limiting current is the order of Vt * log (P) / Rs, where Vt denotes the thermal potential (approximately 26 mV at 27 ° C).
  • the structure proposed by the invention is dual, that is to say that it can be applied to a negative voltage Vcc by replacing all the PNP transistors by NPN transistors and all NPN transistors by PNP transistors.
  • protection circuit 8 against short-circuits, of circuit 9 for limiting the current, or the load shedding transistor 15 remains optional in depending on the application.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
EP04300320A 2003-06-12 2004-06-10 Schalter in Bipolartechnik Withdrawn EP1486846A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0307087 2003-06-12
FR0307087A FR2856207A1 (fr) 2003-06-12 2003-06-12 Commutateur en technologie bipolaire

Publications (1)

Publication Number Publication Date
EP1486846A1 true EP1486846A1 (de) 2004-12-15

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EP04300320A Withdrawn EP1486846A1 (de) 2003-06-12 2004-06-10 Schalter in Bipolartechnik

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US (1) US6992521B2 (de)
EP (1) EP1486846A1 (de)
FR (1) FR2856207A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4763066A (en) * 1986-09-23 1988-08-09 Huntron Instruments, Inc. Automatic test equipment for integrated circuits

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4645999A (en) * 1986-02-07 1987-02-24 National Semiconductor Corporation Current mirror transient speed up circuit
JPS63304705A (ja) * 1987-06-05 1988-12-13 Toshiba Corp 半導体回路
US5661395A (en) * 1995-09-28 1997-08-26 International Business Machines Corporation Active, low Vsd, field effect transistor current source

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5125112A (en) * 1990-09-17 1992-06-23 Motorola, Inc. Temperature compensated current source
JPH08272468A (ja) * 1995-03-29 1996-10-18 Mitsubishi Electric Corp 基準電圧発生回路
FR2809833B1 (fr) * 2000-05-30 2002-11-29 St Microelectronics Sa Source de courant a faible dependance en temperature

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4645999A (en) * 1986-02-07 1987-02-24 National Semiconductor Corporation Current mirror transient speed up circuit
JPS63304705A (ja) * 1987-06-05 1988-12-13 Toshiba Corp 半導体回路
US5661395A (en) * 1995-09-28 1997-08-26 International Business Machines Corporation Active, low Vsd, field effect transistor current source

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 142 (E - 739) 7 April 1989 (1989-04-07) *

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Publication number Publication date
US20040251950A1 (en) 2004-12-16
FR2856207A1 (fr) 2004-12-17
US6992521B2 (en) 2006-01-31

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