EP1518322A1 - Schnelle, kaskadierte ausgangsstufe der klasse ab mit fet-vorrichtungen - Google Patents

Schnelle, kaskadierte ausgangsstufe der klasse ab mit fet-vorrichtungen

Info

Publication number
EP1518322A1
EP1518322A1 EP03715264A EP03715264A EP1518322A1 EP 1518322 A1 EP1518322 A1 EP 1518322A1 EP 03715264 A EP03715264 A EP 03715264A EP 03715264 A EP03715264 A EP 03715264A EP 1518322 A1 EP1518322 A1 EP 1518322A1
Authority
EP
European Patent Office
Prior art keywords
fets
output stage
gates
fet devices
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP03715264A
Other languages
English (en)
French (fr)
Other versions
EP1518322B1 (de
Inventor
Alok Govil
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of EP1518322A1 publication Critical patent/EP1518322A1/de
Application granted granted Critical
Publication of EP1518322B1 publication Critical patent/EP1518322B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34DC amplifiers in which all stages are DC-coupled
    • H03F3/343DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H03F3/345DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/04Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
    • H03F3/16Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only with field-effect devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3217Modifications of amplifiers to reduce non-linear distortion in single ended push-pull amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3001Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor with field-effect transistors
    • H03F3/301CMOS common drain output SEPP amplifiers
    • H03F3/3011CMOS common drain output SEPP amplifiers with asymmetrical driving of the end stage

Definitions

  • This invention relates to high voltage and power output circuits, and more particularly, to an improved cascaded configuration for a class AB MOS output stage.
  • High voltage and high power output circuits may be manufactured from bipolar output stages or MOS structures.
  • a typical class AB output stage utilizing MOS structures is shown in Fig. 1.
  • Fig. 1 depicts a cascaded class AB buffer utilizing bipolar transistors and several diodes as shown. Notably, there are four static current paths 201-204, leading to increased power consumption. As stated above, minimization of power consumption is a goal in class AB output stages. Thus, the arrangement of Fig. 1 is suboptimal.
  • Fig. 2 shows a class C Darlington output stage with biasing resistors utilizing
  • Fig. 2 FET technology.
  • the arrangement of Fig. 2 would appear to consume less power than that of Fig. 1 , owing to the fact that there are less current paths.
  • transistors M3 and M4 see the load through biasing resistors Rl and R2.
  • transistors M3 and M4 must be sized properly to prevent slowing down of the circuit. Often, this means utilizing larger transistors, with higher power consumption, than desirable. Thus, the larger transistors can make up for the reduction in current paths, and a relatively high power consuming device still results.
  • crossover distortion In addition to the foregoing power consumption problem, another problem in output stages is that of crossover distortion.
  • a prior art known technique of minimizing crossover distortion is to utilize a feedback loop to cancel such distortion.
  • the implementation of such a feedback loop also results in added power consumption.
  • the present invention includes a circuit having cascaded output stages utilizing three sets of FET devices. Of the three sets of FET devices, in a preferred embodiment, a first set includes four FETs, a second set includes a different four FETs, and a third set includes two FETs. Two of the transistors from the second set and the two transistors from the third set comprise one class AB stage, and the remaining two transistors from the second set and all four transistors from the first set comprise the second class AB stage.
  • the two stages are cascaded in a manner that reduces the required size for the transistors as well as eliminating crossover distortion. The arrangement avoids such crossover distortion without the need for a feedback loop, thereby eliminating the additional components that would otherwise be required and also minimizing power dissipation.
  • the circuit has the further advantage of minimizing current paths, and thus power consumption, while permitting smaller size transistors to be used, even to drive relatively highly capacitive output loads. Further advantages of the present invention will become clear from the following detailed description and drawings.
  • Fig. 1 shows a exemplary prior art arrangement
  • Fig. 2 depicts an additional prior art arrangement having the drawback of relatively high power consumption
  • Fig. 3 shows an exemplary embodiment of the present invention utilizing ten FET devices.
  • Fig. 3 shows an exemplary embodiment of the present invention utilizing ten FET devices. It is understood that the particular transistors utilized are not critical to the present invention, and that other types of active devices may be utilized.
  • the exemplary embodiment of Fig. 3 comprises four FET devices 601-604 connected to the input power source.
  • the source of FET 601 is connected as shown to the gate of FET 605, and the drain of FET 604 is connected to the gate of FET 608 as also shown.
  • FETs 608, 605 and 601-604 constitute the equivalent of a single stage of a class AB output circuit.
  • the remaining FETs 606, 607, 609 and 610 constitute a second output stage.
  • the two output stages are connected at a junction between FET 605 and 606, and are also connected at the junction between FETs 607 and 608.
  • FETs 606,607, 609 and 610 By driving the gates of FETs 606,607, 609 and 610 from a common source as shown, the aforementioned four transistors act as a single output stage. Moreover, since FETs 605 and 608 have their respective gates tied to the gates of FETs 601 and 604 respectively, FETs 605 and 608 are part of the first stage.
  • the power is provided to the system from source 600 through series FET devices 601-604.
  • the signal to be amplified is provided at point 615 as shown.
  • the signal is then amplified through the consecutive AB stages and an output is seen at point 616.
  • Fig. 4 permits smaller transistors utilized in the prior art arrangements or circuits with the same response times. The use of such smaller transistors provides for reduced input capacitance and thus, lower delay.
  • the circuit does not generate significant crossover distortion, thereby eliminating the need for a feedback loop in most applications. This mode of operation thus reduces power consumption. It is also noted that the system has at most three current paths, unlike some prior art arrangements that include at least four such paths.
  • the device may be powered by a voltage source or a current source.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)
EP03715264A 2002-05-28 2003-04-28 Schnelle, kaskadierte ausgangsstufe der klasse ab mit fet-vorrichtungen Expired - Lifetime EP1518322B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US156248 2002-05-28
US10/156,248 US6727758B2 (en) 2002-05-28 2002-05-28 Fast cascaded class AB bipolar output stage
PCT/IB2003/001708 WO2003100967A1 (en) 2002-05-28 2003-04-28 Fast cascaded class ab output stage with fet devices

Publications (2)

Publication Number Publication Date
EP1518322A1 true EP1518322A1 (de) 2005-03-30
EP1518322B1 EP1518322B1 (de) 2010-03-03

Family

ID=29582218

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03715264A Expired - Lifetime EP1518322B1 (de) 2002-05-28 2003-04-28 Schnelle, kaskadierte ausgangsstufe der klasse ab mit fet-vorrichtungen

Country Status (9)

Country Link
US (1) US6727758B2 (de)
EP (1) EP1518322B1 (de)
JP (1) JP2005528056A (de)
KR (1) KR20050007561A (de)
CN (1) CN1656673B (de)
AT (1) ATE460008T1 (de)
AU (1) AU2003219452A1 (de)
DE (1) DE60331544D1 (de)
WO (1) WO2003100967A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7078973B2 (en) * 2004-10-07 2006-07-18 Texas Instruments Incorporated Bipolar rail-to-rail output stage
US7839994B1 (en) 2005-03-01 2010-11-23 Marvell International Ltd. Class A-B line driver for gigabit Ethernet
KR101163457B1 (ko) * 2006-02-24 2012-07-18 삼성전자주식회사 저전압 레귤레이티드 캐스코드 회로 및 이를 이용한 시모스아날로그 회로
US7795975B2 (en) * 2008-02-27 2010-09-14 Mediatek Inc. Class AB amplifier
US7902882B2 (en) * 2008-12-29 2011-03-08 Daniele Vimercati Apparatus including a follower output buffer having an output impedance that adapts to a transmission line impedance
DE112014007000B4 (de) * 2014-09-29 2021-05-20 Mitsubishi Electric Corporation Operationsverstärkerschaltung
KR102492494B1 (ko) 2014-12-09 2023-01-30 인피니언 테크놀로지스 오스트리아 아게 전력 트랜지스터들을 위한 조절된 하이 사이드 게이트 드라이버 회로

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4267517A (en) * 1977-12-07 1981-05-12 Tokyo Shibaura Denki Kabushiki Kaisha Operational amplifier
JP3508333B2 (ja) * 1995-10-16 2004-03-22 セイコーエプソン株式会社 定電圧回路
US6259280B1 (en) * 1997-09-25 2001-07-10 Texas Instruments Incorporated Class AB amplifier for use in semiconductor memory devices
JP3123485B2 (ja) 1997-11-06 2001-01-09 日本電気株式会社 半導体電力増幅器
US5973563A (en) * 1997-12-10 1999-10-26 National Semiconductor Corporation High power output stage with temperature stable precisely controlled quiescent current and inherent short circuit protection
CN1074610C (zh) * 1998-04-27 2001-11-07 王斌 采用并联稳压热跟踪偏置电路的推挽电流放大器
US6175277B1 (en) * 1999-02-08 2001-01-16 Texas Instruments Incorporated Bias network for CMOS power devices
CN1175559C (zh) * 2000-09-09 2004-11-10 王仲季 无交越失真功率放大器
US6466093B1 (en) * 2000-09-19 2002-10-15 Texas Instruments Incorporated Low voltage low thd CMOS audio (power) amplifier

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO03100967A1 *

Also Published As

Publication number Publication date
ATE460008T1 (de) 2010-03-15
CN1656673A (zh) 2005-08-17
AU2003219452A1 (en) 2003-12-12
US6727758B2 (en) 2004-04-27
CN1656673B (zh) 2010-05-26
WO2003100967A1 (en) 2003-12-04
DE60331544D1 (de) 2010-04-15
US20030222718A1 (en) 2003-12-04
JP2005528056A (ja) 2005-09-15
KR20050007561A (ko) 2005-01-19
EP1518322B1 (de) 2010-03-03

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