EP1712973A2 - Stromkreis zur Erzeugung eines Bezugsstroms - Google Patents

Stromkreis zur Erzeugung eines Bezugsstroms Download PDF

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Publication number
EP1712973A2
EP1712973A2 EP06112470A EP06112470A EP1712973A2 EP 1712973 A2 EP1712973 A2 EP 1712973A2 EP 06112470 A EP06112470 A EP 06112470A EP 06112470 A EP06112470 A EP 06112470A EP 1712973 A2 EP1712973 A2 EP 1712973A2
Authority
EP
European Patent Office
Prior art keywords
transistors
circuit
current
transistor
capacitive element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06112470A
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English (en)
French (fr)
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EP1712973A3 (de
Inventor
Jean-Luc Moro
Serge Ramet
Marc Sabut
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
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STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of EP1712973A2 publication Critical patent/EP1712973A2/de
Publication of EP1712973A3 publication Critical patent/EP1712973A3/de
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only

Definitions

  • the present invention generally relates to electronic circuits and more particularly to the generation of reference currents for polarization purposes, in particular intended for amplifiers.
  • An exemplary application of the present invention relates to the analog-to-digital converters and the generation of bias currents of the differential stages of the operational amplifiers of the converter.
  • Another example of application of the present invention relates to active filters.
  • the invention applies to any generator of a reference current.
  • FIG. 1 very schematically shows in the form of blocks an analog-to-digital converter 1 (ADC) of the type to which the present invention applies.
  • ADC analog-to-digital converter 1
  • Such a converter is supplied by a DC voltage Vdd applied between two terminals 2 and 3 of the circuit 1.
  • the converter 1 has differential inputs.
  • a differential signal Vin is applied between two input terminals 4 and 5 of the converter.
  • a sampling frequency fc is fixed by a clock signal applied to a clock input 6.
  • the circuit 1 provides an n-bit OUT signal on a serial output or a plurality of parallel outputs 7.
  • the converter also integrates or receives two non-voltage reference signals. shown and integrates or is connected to at least one reference current generating circuit (CREF) for biasing operational amplifiers (not shown in FIG. 1) of the converter 1.
  • CREF reference current generating circuit
  • FIG. 2 represents an example of a simplified diagram of an operational amplifier 10 of the type to which, for example, the present invention applies.
  • This amplifier comprises, between the two terminals 2 and 3 for applying a DC supply voltage Vdd, a differential stage consisting of two parallel banks of transistors (here, MOS transistors), in series with a current source 20 fixing a polarization current Ip.
  • Each branch comprises, for example, a P-channel MOS transistor MP11, MP12 in series with an N-channel MOS transistor MN11, MN12.
  • the gates of the transistors MP11 and MP12 are connected together to the drain of the transistor MP11 to form an active load, while the gates of the transistors MN11 and MN12 define differential inputs, respectively non-inverting 14 (+) and inverting 15 (-), of the amplifier 1.
  • the drain of the transistor MN12 connected to the drain of the transistor MP12 defines an output terminal 17 of the amplifier.
  • the common sources of the transistors MN11 and MN12 are connected to a first terminal 22 of the current source 20 whose other terminal 23 is connected to the ground 3.
  • the current source 20 is formed of a transistor MN20, for example a N-channel MOS transistor, mounted in current mirror on a transistor (not shown in FIG. 2) for copying a reference current compensated at least in temperature.
  • FIG. 3 represents a conventional example of a reference current generator 30 to be copied to provide one or more bias currents to amplifiers of the type shown in FIG. 2.
  • a reference current generator 30 is based on the resistive conversion of a voltage provided by transistors, compensated for the temperature and manufacturing tolerances of the transistors.
  • a generator in MOS technology consisting of two parallel branches between two terminals 2 and 3 for applying a DC supply voltage Vdd.
  • a first branch comprises two MOS transistors, respectively with P-channel MP31 and N-channel MN31, in series between terminals 2 and 3.
  • a second branch comprises two MOS transistors, respectively P-channel MP32 and N-channel MN32, in series with a resistor R30 between the lines 2 and 3.
  • the gates of the transistors MP31 and MP32 are connected together to the drain of the transistor MP32 (drain of the transistor MN32).
  • the gates of the transistors MN31 and MN32 are connected together to the drain of the transistor MN31 (drain of the transistor MP31).
  • the current 10 is then duplicated by current mirror assemblies.
  • a transistor MP21 is in series with a transistor MN21 between the terminals 2 and 3.
  • the transistor MP21 is mounted in mirror on the transistor MP32 (its gate is connected to the drain of the transistor MP32) and the transistor MN21 is diode-mounted (its gate is connected to its drain).
  • the gate of transistor MN20 of the amplifier to be polarized is connected to the drains of transistors MP21 and MN21.
  • the ratio k between the respective surfaces of the transistors MN31 and MN32 sets the importance of the difference ⁇ Vgs, hence the amplitude of the current 10 with a given resistance R. This current is chosen so that the bias circuit is able to provide a sufficient current to all the amplifiers that it polarizes.
  • a surface ratio k is generally chosen between the transistors greater than unity (generally between 5 and 10). In FIG. 3, the surface ratio k has been illustrated in assuming a transistor MN31 of unit size (width W on gate length L of transistor MN31 equal to 1) and a transistor MN32 of size k (width W on gate length L of transistor MN32 equal to k).
  • a unit area ratio is found at the transistors MP31 and MP32, mounted in current mirror.
  • a drawback of the circuit of FIG. 3 is that the integration of the resistor R30, most often in the form of a polycrystalline silicon resistor, makes it necessary to take into account its manufacturing tolerances in the sizing of the transistors to take account of the worst case. Indeed, these tolerances (of the order of 20%) are not compensated by the assembly.
  • the bandwidth of the amplifier 1 is a function of the ratio of the transconductance gm10 of this amplifier to the capacitive value of its output impedance.
  • an operational amplifier 10 has, in its application assembly, always its output connected to the ground 3 (or more generally to an application line of the supply voltage) by a capacitor (dotted line in FIG. 2) .
  • this capacity Cl also has manufacturing tolerances. This therefore also leads to size the current generation circuit 10 according to the maximum possible values of these equivalent output capabilities.
  • the evolution goes in the same direction as that related to the resistance R30, so that these worst cases add up.
  • the document US-2002/0180512 discloses a system for adjusting a VLSI circuit in which a network of switched capacitors is connected in series with a branch of a current mirror of which another branch is in series with an external resistor.
  • the role of the switched capacitor circuit is to obtain a fixed current for a also fixed reference voltage supplied to the generator.
  • the present invention aims to overcome all or part of the disadvantages of known circuits for generating a reference current.
  • the present invention is more particularly directed to the generation of a reference current circuit intended to be reproduced to polarize one or more amplifiers.
  • the present invention also aims to provide a circuit whose consumption adapts to the current requirements of the amplifiers that it polarizes.
  • the present invention also aims to avoid overconsumption due to manufacturing tolerances of the resistance of a reference current generating circuit.
  • the present invention also aims to provide a circuit particularly suitable for applications in which a clock frequency is available.
  • a second capacitive element is provided across the switched capacitor circuit.
  • said second capacitive element is of greater capacity in a ratio of at least five, preferably at least ten, to the capacitance of the first capacitive element constituting the switched capacitor circuit.
  • said switched capacitor circuit includes said first capacitive element in parallel with a first switch, all in series with a second switch.
  • said first capacitive element is made in the same technology as a capacitive element of a charge of a polarized amplifier from a copy of the reference current.
  • an element controls the switched capacitor circuit at a frequency depending on the intensity of the required reference current.
  • said frequency corresponds to the working frequency of at least one amplifier whose bias current is obtained by copying the reference current.
  • control terminals of the first and third transistors are connected to the interconnection between the third and fourth transistors, the control terminals of the second and fourth transistors being connected to the interconnection between the first and third transistors. and second transistors.
  • the control terminals of the first and third transistors are connected to the interconnection between the first and second transistors, the control terminals of the second and fourth transistors being connected to the interconnection of a fifth and sixth series transistors forming a third branch between said supply terminals, the control terminal of the fifth transistor being connected to the interconnection between the third and fourth transistors and the sixth transistor being diode-mounted.
  • the first and third transistors are MOS transistors of a first type of channel, the second and fourth transistors being MOS transistors of a second type of channel.
  • the present invention also provides an amplifier comprising a bias current source, the bias current being obtained by copying a reference current produced by a circuit for generating such a current.
  • the present invention also provides an analog-digital converter comprising at least one such amplifier.
  • FIG. 4 shows a reference current generation circuit 40 according to a first embodiment of the present invention.
  • the circuit 40 produces a current Ir intended to be copied by current mirror assemblies for polarizing, for example, differential stages of transconductance amplifiers of the type described in relation to FIG. 2.
  • the invention will be described in relation to with such an example amplifier, but it will be noted that it applies more generally to the generation of a reference current and that the application for polarization purposes of any amplifier, operational or otherwise, differential or not etc. is a preferred application.
  • the circuit 40 has two parallel branches between two terminals 2 and 3 for applying a DC supply voltage Vdd.
  • a first branch comprises two MOS transistors, respectively with P-channel MP41 and N-channel MN41, in series between terminals 2 and 3.
  • a second branch comprises two P-channel MOS transistors respectively.
  • MP42 and N-channel MN42 in series with a circuit 43 with capacitance switched between terminals 2 and 3.
  • the circuit 43 replaces the resistor R30 of the assembly of FIG. 3.
  • the gates of the transistors MP41 and MP42 are connected together to the drain of the transistor MP42 (drain of transistor MN42).
  • the gates of the transistors MN41 and MN42 are connected together to the drain of the transistor MN41 (drain of the transistor MP41).
  • the circuit 43 is, for example, constituted by a first capacitive element Cs (for example, a capacitor) in parallel with a first switch K1 and in series with a second switch K2 between the source 44 of the transistor MN42 and the terminal of feeding 3 (mass).
  • the switches K1 and K2 are controlled by a circuit 45 in reverse (inverter 46) and alternately at a frequency fc received by the circuit 45 and which depends on the amplitude of the current Ir required, therefore the bias currents Ip of the amplifiers connected to the circuit 40.
  • the switch K2 is closed (switch K1 open) and the capacitor Cs is charged.
  • the switch K1 is closed (switch K2 open) and the capacitor Cs is discharged.
  • the circuit 45 temporally shifts the opening and closing times to avoid simultaneous conduction of the switches K1 and K2.
  • a second capacitive element Ct (for example a capacitor) directly connects the source 44 of the transistor MN42 to the terminal 3.
  • the circuit 40 then maintains substantially constant the product of its transconductance gain gm40 by the equivalent resistance of the circuit 43.
  • the ratio k 'between the respective surfaces of the transistors of the two branches sets the importance of the difference ⁇ Vgs', therefore the amplitude of the current Ir with resistance R' given.
  • this current is chosen so that the bias circuit 40 is capable of supplying a sufficient current to all the amplifiers that it polarizes.
  • a ratio k 'of between 5 and 10 is appropriate in most cases.
  • the surface ratio k ' has been illustrated by assuming a unit-size transistor MN41 (width W over gate length L equal to 1) and an MN42 transistor of size k' (width W over equal grating length L). at k ').
  • the resistor R ' can here be adapted to the operating frequency of the amplifiers (and therefore to the polarization current that they require), the current Ir adapts to the current requirements of the polarized amplifiers and therefore does not generate unnecessary consumption.
  • the invention makes it possible to keep the ratio gm10 / (Cl * fc) constant. Indeed, it suffices that the switching frequency fc of the capacitance Cs is adapted to the working frequency of the amplifier 10 so that the transconductance gains gm10 and gm40 evolve in the same direction.
  • the capacitor Cs is of the same nature (same technology) as the capacitor or capacitors (C1, FIG. 2) forming the charges of the polarized amplifiers. This makes it possible to make the generation of the reference current compensated for in manufacturing tolerances of the capacitors.
  • An advantage of the present invention is that the consumption of the reference current generating circuit is self-adapting to the energy required to bias the downstream assemblies.
  • Another advantage of the present invention is that the circuit remains temperature-compensated (current depending on ⁇ Vgs') and manufacturing tolerances of the transistors.
  • Another advantage of the present invention is that it avoids the problem of manufacturing tolerances of a resistor.
  • Another advantage of the invention is that, whatever the working frequency of the amplifier or amplifiers (for example of an analog-digital converter), the generator adapts its consumption to the called current.
  • Obtaining the working frequency of the amplifiers to be polarized is particularly easy in applications using a clock frequency. This is particularly the case of analog-to-digital converters for which it is sufficient to switch the capacitor Cs of the circuit 43 to the sampling frequency to obtain the desired effect.
  • the capacitive element Cs (and / or the element Ct) consists of an active component, for example a diode whose anode is connected to the terminal 3.
  • FIG. 5 represents a second embodiment of a circuit 50 for generating a reference current according to the invention.
  • the gates of the transistors MP51 and MP52 are connected to the drain of the transistor MN51 and the gates of the transistors MN51 and MN52 are connected to the midpoint of two N-channel P-channel and MN53 MP53 transistors in series. between lines 2 and 3, forming a third plugged.
  • the gate of transistor MN53 is connected to the gates of transistors MN51 and MN52.
  • the gate of transistor MP53 is connected to the interconnection between transistors MP52 and MN52.
  • an additional capacitive element C ' connects the terminal 2 to the gate of the transistor MP53 in order to stabilize the potential of this gate.
  • transistor MP51 has a larger size k1 and transistor MP53 has any size.
  • Transistors MN51 and MN52 have identical sizes assumed to be unitary.
  • the transistor MN53 has a size k3 greater than or equal to unity.
  • the surface ratios between transistors of the same type and the notion of unit size is arbitrary and different depending on the type of channel.
  • This embodiment makes it possible to overcome any possible constraint on capacitor sizes Cs and Ct.
  • the smaller the capacitance Cs the smaller the maximum current Ir.
  • the higher the Cs capacity the greater the Ct capacity is important and one can be confronted with problems of integration of these capacities.
  • the embodiment of FIG. 5 makes it possible to make the difference of the gate-source voltages of the transistors MN51 and MN52 as a function of the ratio k1 of the currents flowing in the first two branches. At the cost of a slight increase in the area occupied by the transistors, it is then possible to reduce the size of the capacitors Cs and Ct.
  • the role of the third branch is to copy, to serve as a basis for a subsequent copy for the polarization currents. , the current k1 * I of the first branch, which allows to keep a relatively low current I in the second branch, so in the capabilities.
  • MOS transistors may be replaced by NPN-type bipolar transistors and / or N-channel transistors may be replaced by bipolar PNP transistors in bipolar technology or BiCMOS.
  • the adaptation of the control circuit is within the reach of the skilled person.
  • the different branches of the circuit may be replaced by cascode transistors mounts to increase the output impedance, so the accuracy of the current copying.
  • the switches K1 and K2 will be transistors of the same nature as the other transistors of the assembly.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
EP06112470A 2005-04-12 2006-04-11 Stromkreis zur Erzeugung eines Bezugsstroms Withdrawn EP1712973A3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0550932 2005-04-12

Publications (2)

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EP1712973A2 true EP1712973A2 (de) 2006-10-18
EP1712973A3 EP1712973A3 (de) 2007-03-07

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EP06112470A Withdrawn EP1712973A3 (de) 2005-04-12 2006-04-11 Stromkreis zur Erzeugung eines Bezugsstroms

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2169824A1 (de) * 2008-09-25 2010-03-31 Moscad Design & Automation Sàrl Kapazitätsfehlerverstärkungsschaltung zur Erzeugung einer präzisen Stromreferenz bzw. zur Verwendung in einem Präzisionsoszillator
FR2975246A1 (fr) * 2011-05-09 2012-11-16 St Microelectronics Grenoble 2 Dispositif de generation d'un signal en dents de scie
EP2887176A1 (de) * 2013-12-20 2015-06-24 The Swatch Group Research and Development Ltd. Elektronischer Schaltkreis mit selbst kalibriertem PTAT-Referenzstrom, und sein Einsatzverfahren

Families Citing this family (4)

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Publication number Priority date Publication date Assignee Title
JP2005311591A (ja) * 2004-04-20 2005-11-04 Matsushita Electric Ind Co Ltd 電流駆動装置
US8390371B2 (en) * 2010-07-30 2013-03-05 Tialinx, Inc. Tunable transconductance-capacitance filter with coefficients independent of variations in process corner, temperature, and input supply voltage
CN104536504B (zh) * 2014-12-12 2016-04-06 长沙景嘉微电子股份有限公司 一种自启动基准电路
CN106055009A (zh) * 2016-06-17 2016-10-26 中国科学院微电子研究所 一种高精度带隙基准电路

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2169824A1 (de) * 2008-09-25 2010-03-31 Moscad Design & Automation Sàrl Kapazitätsfehlerverstärkungsschaltung zur Erzeugung einer präzisen Stromreferenz bzw. zur Verwendung in einem Präzisionsoszillator
WO2010034782A1 (en) * 2008-09-25 2010-04-01 Moscad Design & Automation Sarl A system and a method for generating an error voltage
US8373450B2 (en) 2008-09-25 2013-02-12 Moscad Design And Automation Sarl System and a method for generating an error voltage
FR2975246A1 (fr) * 2011-05-09 2012-11-16 St Microelectronics Grenoble 2 Dispositif de generation d'un signal en dents de scie
EP2887176A1 (de) * 2013-12-20 2015-06-24 The Swatch Group Research and Development Ltd. Elektronischer Schaltkreis mit selbst kalibriertem PTAT-Referenzstrom, und sein Einsatzverfahren
US9442509B2 (en) 2013-12-20 2016-09-13 The Swatch Group Research And Development Ltd. Electronic circuit with self-calibrated PTAT current reference and method for actuating the same

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EP1712973A3 (de) 2007-03-07
US20060226892A1 (en) 2006-10-12

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