EP1994672A2 - Procédé et appareil de chiffrement de flux synchrone à l'aide de codes réservés - Google Patents

Procédé et appareil de chiffrement de flux synchrone à l'aide de codes réservés

Info

Publication number
EP1994672A2
EP1994672A2 EP07757380A EP07757380A EP1994672A2 EP 1994672 A2 EP1994672 A2 EP 1994672A2 EP 07757380 A EP07757380 A EP 07757380A EP 07757380 A EP07757380 A EP 07757380A EP 1994672 A2 EP1994672 A2 EP 1994672A2
Authority
EP
European Patent Office
Prior art keywords
word
key
encrypted
pseudorandom
produce
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP07757380A
Other languages
German (de)
English (en)
Other versions
EP1994672A4 (fr
EP1994672B1 (fr
Inventor
Matthew John Fritz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of EP1994672A2 publication Critical patent/EP1994672A2/fr
Publication of EP1994672A4 publication Critical patent/EP1994672A4/fr
Application granted granted Critical
Publication of EP1994672B1 publication Critical patent/EP1994672B1/fr
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L65/00—Network arrangements, protocols or services for supporting real-time applications in data packet communication
    • H04L65/60—Network streaming of media packets
    • H04L65/70—Media network packetisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/34—Encoding or coding, e.g. Huffman coding or error correction

Definitions

  • This invention relates generally to digital encryption devices, and in particular, to a method and implementation for synchronous stream cipher encryption of digital data with reserved codes.
  • Encoding with a key invariably results in an encoding period over which the encryption process repeats.
  • a substantially complex keystream generator such as a 128-bit AES (Advanced Encryption Standard, also called "Rijndael," a widely used block cipher created by Joan Daemen and Vincent Rijmen) core
  • the length of encoding period repetition is sufficiently long to render the encryption substantially unbreakable.
  • the key can be changed before the encoding period repeats.
  • Synchronous stream cipher encryption refers to a process operating on a stream of input words wherein word-by- word encryption is performed independently of the input data stream.
  • a commercial application frequently relying on synchronous stream cipher encryption is projection of digital video images in movie theaters.
  • a typical digital cinema projection system includes a playback server that produces a digital video signal for a coaxial link to a digital video projector, such as a DLP® projector.
  • Strong signal encryption is necessary for the coaxial link, because the video data produced by the server generally contains substantially higher video resolution than commonly available DVD video discs, which produces high value in alternative markets.
  • Video data contained in server memory is already strongly encrypted to prevent reproduction. Unencrypted video data openly transmitted over a coaxial link can easily be diverted to an unintended receiver for easy unencrypted capture.
  • FIG. 1 illustrates a digital channel typically used in cinemas to couple a video source (not shown) to a projector (not shown).
  • Input video signals 105 and 106 containing luminance and chrominance video data, respectively, usually with 10-bit precision, are encrypted in blocks 108 and 109.
  • the digital encrypted signals from these blocks are multiplexed by multiplexer 110 over coaxial link 112 that transmits binary data to demultiplexer 114.
  • decryption of the demultiplexed signals in blocks 115 and 116 plaintext luminance and chrominance signals are reproduced on output leads 117 and 118.
  • a typical coaxial link between a server and a projector used in commercial cinemas is a 1.45 Gb/s HD-SDI (high definition, serial digital interface) link.
  • An HD-SDI link is a 10-bit link with 1024 possible data codes.
  • For 10-bit words representing a video signal eight codes are restricted by commonly used video specification SMPTE-292 so that synchronization and other control functions can be provided for the video equipment.
  • the eight restricted codes in the SMPTE-292 specification are the first four and last four 10-bit binary codes of the 1024 possible codes in a 10-bit signal, i.e., the codes are 0000, ..., 0003 and 1020,..., 1023
  • FIG. 2 shows a digital signal encryption process of the prior art often used for video signals. Encryption is accomplished by modulating the plaintext input with a pseudorandom keystream in the server, and decryption is accomplished by demodulating the resulting ciphertext with the same pseudorandom keystream in the projector. Using lookup tables ("LUTs") and an AES core running in counter mode as the keystream generator, strong, efficient encryption and decryption engines can be realized. Encryption/decryption arrangements that use substantially identical processes for encryption and decryption are called "complementary.”
  • a plaintext data stream is supplied as signal 202 from a video source to encryption block 205.
  • keystream generator 210 uses a key 213 inputted to encryption block 205 to produce a stream of pseudorandom, 10-bit words on lead 231.
  • Encoding is performed using lookup table 216 that contains possible combinations of 10-bit input words and 10-bit pseudorandom words from the keystream generator 210.
  • the resulting 10-bit ciphertext data stream produced by the lookup table and transmitted on lead 208 is inputted to decryption block 206.
  • keystream generator 211 using key 214, produces a stream of pseudorandom 10-bit words on lead 232.
  • Decoding is performed using lookup table 217 that again contains possible combinations of 10-bit input words and 10-bit words from the key-stream generator 211.
  • Plaintext output data is provided on lead 203.
  • This encryption/decryption arrangement can be constructed to be symmetric and complementary.
  • the arrangement illustrated in FIG. 2 can be used to produce ciphertext excluding the eight restricted words, and is operable with a wide range of encoding maps. It can implement nearly any other coding scheme by appropriately defining the lookup table mapping data.
  • a significant disadvantage of this scheme is the large amount of memory that is required for the lookup table, which renders it impractical to implement using, for example, presently produced FPGAs (field-programmable gate arrays).
  • FPGAs field-programmable gate arrays
  • FIG. 3 A second modulator/demodulator arrangement of the prior art that can be used to produce ciphertext excluding the eight restricted words is illustrated in FIG. 3.
  • a plaintext 10-bit data stream 302 is inputted to encryption block 305. Encryption is performed by inputting a key 313 to keystream generator 310, which produces a pseudorandom stream of 10-bit words on lead 331.
  • the plaintext input 302 is coupled to adder 321, which subtracts the number 4 from the input data.
  • the output from adder 321 and the output of keystream generator 310 are coupled to adder 322, producing an 11-bit summed output, supplied to block 316.
  • Block 316 performs a modulo-1016 operation on its input, and its output is coupled to adder 323, which adds the number 4 to the input data to produce the 10-bit ciphertext output on lead 308, which is transmitted over a communication channel such as coaxial line.
  • adder 323 which adds the number 4 to the input data to produce the 10-bit ciphertext output on lead 308, which is transmitted over a communication channel such as coaxial line.
  • a modulo operation such as encountered with a summing operation, a summed result that exceeds the modulo index is altered by subtracting the modulo index from the summed result, eliminating thereby the possible need for an additional bit to represent the summed result.
  • the decryption process performed in block 306 uses key 314 supplied to keystream generator 311, which produces a pseudorandom stream of 10-bit words represented by 332.
  • Three adders, 324, 325, and 326, are also used in the decryption process, subtracting and then adding the number 4 to the data stream to produce 10-bit plaintext output 303.
  • Block 317 performs a further modulo- 1016 operation.
  • the process illustrated in FIG. 3 is used in movie theaters to provide video data protection for projection arrangements requiring exclusion of the eight restricted binary codes.
  • This scheme requires no memory for lookup tables, but requires six to eight 10-bit adders (possibly including two for the two modulo functions).
  • This scheme is the most restrictive in terms of selecting an encryption mapping, and is inefficient in terms of the amount of digital processing that must be performed for each input data word, requiring six to eight independent addition operations.
  • modulator/demodulator pairs particularly pairs based on addition or modulo addition for synchronous stream cipher encryption, with and without restricted words
  • limitations of prior art processes in arrangements that exclude encoding of restricted words from the data stream and maintaining a high level of data security are a need for large lookup tables or extensive digital computation for encryption/decryption for each input word.
  • Prior art schemes are also hampered by inflexibility in selection of data mappings. A need thus exists for an apparatus and method to perform highly secure encryption and decryption that is not encumbered by these limitations, particularly for systems communicating high data rate signals.
  • Embodiments of the present invention achieve technical advantages as a signal encryption device that performs synchronous stream cipher encryption for a sequence of input words with restricted codes.
  • the signal encryption device receives a key and a stream of input words.
  • the signal encryption device includes a key stream generator producing a stream of pseudorandom words from the key, and an adder coupled to the keystream generator and to the input words, producing a summed signal stream therefrom.
  • a lookup table using the summed signal stream produces encrypted codes for the input words excluding the restricted codes.
  • a signal decryption device receives a key and a stream of encrypted words with restricted codes.
  • the signal decryption device includes a keystream generator for producing a stream of pseudorandom words from the key, and an adder coupled to the keystream generator and to the stream of encrypted words, producing a summed signal stream therefrom.
  • a lookup table using the summed signal stream produces decrypted codes excluding the restricted codes for the input words.
  • a signal encryption and decryption system performs synchronous stream cipher encryption and decryption for a sequence of input words.
  • the system receives a key and a stream of input words with restricted codes.
  • the system includes a keystream generator for producing a stream of pseudorandom words from the key, and an adder coupled to the keystream generator and to the input words, producing a summed signal stream therefrom.
  • a lookup table using the summed signal stream produces encrypted codes for the input words excluding the restricted codes.
  • the system further includes a second keystream generator for producing a second stream of pseudorandom words from the key, and a second adder coupled to the second keystream generator and to the stream of encrypted words, producing a second summed signal stream therefrom.
  • a second lookup table using the second summed signal stream produces decrypted codes for the input words excluding the restricted codes.
  • Another embodiment of the present invention is a method of performing synchronous stream cipher encryption for a sequence of input words with restricted codes.
  • the method includes receiving a key and a stream of input words.
  • the method further includes producing a stream of pseudorandom words from the key using a keystream generator, and producing a summed signal from the output of keystream generator and the stream of input words.
  • the method further includes using a lookup table accessed by the summed signal to produce encrypted codes for the stream of input words excluding the restricted codes.
  • the method includes performing synchronous stream cipher decryption for a sequence of encrypted words with restricted codes.
  • the method includes receiving a key and a stream of encrypted words.
  • the method further includes producing a stream of pseudorandom words from the key using a keystream generator, and producing a summed signal stream from the output of keystream generator and the encrypted words.
  • the method further includes using a lookup table accessed by the summed signal stream to produce decrypted codes for the encrypted words excluding the restricted codes.
  • the invention solves the problem of encrypting an input sequence of words with restricted codes without the need for substantial memory, or the need for substantial digital processing.
  • Embodiments of the present invention advantageously provide a signal encryption device and a signal decryption device and method that can encrypt input words with restricted codes using minimal memory while using minimal digital computation to perform encryption and decryption processes.
  • FIG. 1 illustrates an exemplary block diagram of the prior art showing and encryption and decryption of 10-bit video luminance and chrominance video signals
  • FIG. 2 illustrates a block diagram of the prior art showing encryption and decryption of a 10-bit input signal with restricted codes using a lookup table of size sufficient to contain combinations of input and keystream data
  • FIG. 3 illustrates a block diagram of the prior art showing encryption and decryption of a 10-bit input signal with restricted codes using six adders and two modulo operations;
  • FIG. 4 illustrates a block diagram of an embodiment of the invention showing encryption and decryption of a 10-bit input signal with restricted codes using two adders and lookup tables, each table with approximately two entries for each possible input word; and
  • FIG. 5 illustrates a circular table of an embodiment of the invention showing indexed transitions for encoding and decoding of a 10-bit input word with restricted codes.
  • Embodiments of the invention will be described with respect to preferred embodiments in a specific context, namely an apparatus and method for encoding a digital data stream containing reserved data codes in both the unencoded and encoded data streams.
  • Embodiments comprise processes that can be symmetric and complementary to perform signal encryption and decryption.
  • FIG. 4 illustrates an exemplary embodiment of an encryption and decryption process and method of the present invention that can perform encryption and decryption excluding restricted codes such as the eight restricted codes in an HD-DSI link operating with the
  • Input plaintext data stream 402 typically but not necessarily 10- bit words representing a video signal, is coupled to encryption block 405.
  • Encryption block 405 includes keystream generator 410 that receives key 413 and produces bit stream 431 of pseudorandom, 10-bit words for encoding input data. This pseudorandom bit stream and plaintext input data are added word by word in adder 422 to produce an 11-bit result on line 432.
  • a lookup table, 416 a ciphertext stream of 10-bit words is produced and coupled to channel 408.
  • the channel 408 may transmit the data bit by bit such as described by video specification SMPTE-292.
  • the input data for the eight restricted codes are not encrypted.
  • the mapping contained in lookup table 416 is arranged so that no restricted code is generated by the encryption process.
  • the lookup table mapping is complementary so that the modulation result produced by adder 422 can be demodulated by second adder 425.
  • the lookup table mapping is substantially the same for both the encryption and decryption processes. The same key can be used for both processes, and can be changed from time to time for improved security.
  • the decryption block 406 operates in a similar manner.
  • Decryption block 406 includes keystream generator 411 that receives key 414, and produces bit stream 432 of pseudorandom, 10-bit words for decoding the ciphertext data supplied on line 408.
  • the keys 413 and 414 are the same key, i.e., the system can be symmetric.
  • the bit stream 433 and ciphertext input data are added word by word in adder 425 to produce an 11- bit result as signal 434.
  • lookup table 417 a plaintext stream of 10-bit words is produced and coupled to the output, 403.
  • the decryption process can be thought of as "flipping over" the table used for encryption.
  • An exemplary lookup table in an embodiment of the invention can be constructed using the equation,
  • Y [((A-X) - 4) modulo(1016)] + 4
  • A is an arbitrary constant
  • X is the input to the lookup table
  • Y is the output from the lookup table.
  • the value for A can be chosen to be 917.
  • FIG. 5 Illustrated is a circle 501 that represents a circular table containing labeled entries for a 10-bit input word, with 1016 possible values that are to be encrypted, which excepts the eight restricted codes in the SMPTE-292 specification.
  • the cells in the table are labeled 4, 5,..., 1018, 1019.
  • the table contains 1016 entries, with no positions for the eight restricted codes.
  • encoding of a plaintext input word is performed by selecting a table entry indexed "D" entries counterclockwise from the input word to produce a ciphertext word.
  • Decoding of the ciphertext word is then performed by selecting a table entry indexed "D" entries clockwise from the ciphertext word.
  • table entry number 5 is indexed counterclockwise by 412 to produce table entry 417.
  • Such reverse operation can be performed by operating an "adder" in a subtraction mode.
  • the table entry index D is a pseudorandom number that may be derived from an input key, which may be altered from time to time to provide a high level of security for encryption of the input data stream.
  • the digital arithmetic that must be performed on each input word is merely indexing in a circular table, which can be performed with minimal digital computation, and is readily amenable to operation with a high data rate stream, for example to encrypt a 1.45 Gb/s data link.
  • the more extensive computation necessary to compute a pseudorandom index D to select an encrypted or decrypted word can be performed at a substantially slower rate without substantially compromising encryption security.
  • the 10-bit word size may be altered in the broad scope of the invention in other applications, including other video systems.
  • the method and apparatus also may be used on data other than video data.
  • the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification.
  • processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Security & Cryptography (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

L'invention concerne un procédé et un appareil pour un dispositif de chiffrement des signaux (405) construit pour exécuter un chiffrement de flux synchrone pour une séquence de mots d'entrée (402) à l'aide de codes réservés. Le dispositif de chiffrement comprend un générateur de flot de clés (410) destiné à produire une séquence de mots pseudo-aléatoires (431) à partir d'une clé (413), et un additionneur (422) qui est utilisé pour additionner la sortie du générateur de flot de clés et les mots d'entrée. Un table de conversion (416) de taille sensiblement égale à deux fois le nombre de mots d'entrée possibles produit des codes chiffrés (408) excluant les codes réservés à partir du signal additionné. Un système de chiffrement et de déchiffrement des signaux est construit par inclusion d'un second générateur de flot de clés (411) destiné à produire une seconde séquence de mots pseudo-aléatoires (433) à partir de la clé (414), et d'un second additionneur (425) destiné à produire un second signal additionné (434) à partir de la sortie du second générateur de flot de clés et des codes chiffrés. Une table de conversion (417) correspondante produit des codes déchiffrés (403) excluant les codes réservés à partir du second signal additionné.
EP07757380.6A 2006-02-23 2007-02-23 Procédé et appareil de chiffrement de flux synchrone à l'aide de codes réservés Not-in-force EP1994672B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/360,138 US7734044B2 (en) 2006-02-23 2006-02-23 Method and apparatus for synchronous stream cipher encryption with reserved codes
PCT/US2007/062647 WO2007101085A2 (fr) 2006-02-23 2007-02-23 Procédé et appareil de chiffrement de flux synchrone à l'aide de codes réservés

Publications (3)

Publication Number Publication Date
EP1994672A2 true EP1994672A2 (fr) 2008-11-26
EP1994672A4 EP1994672A4 (fr) 2011-06-15
EP1994672B1 EP1994672B1 (fr) 2017-10-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP07757380.6A Not-in-force EP1994672B1 (fr) 2006-02-23 2007-02-23 Procédé et appareil de chiffrement de flux synchrone à l'aide de codes réservés

Country Status (5)

Country Link
US (1) US7734044B2 (fr)
EP (1) EP1994672B1 (fr)
JP (1) JP2009528006A (fr)
CN (1) CN101390332B (fr)
WO (1) WO2007101085A2 (fr)

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US9680806B2 (en) * 2014-06-11 2017-06-13 New York University Secure transactions using alphacodes
KR102314917B1 (ko) * 2015-03-19 2021-10-21 삼성전자주식회사 통신 시스템에서 디바이스들 간의 연결 설정 방법 및 장치
US11533170B2 (en) * 2018-12-17 2022-12-20 Intel Corporation Hardware mechanisms for link encryption
CN114827672B (zh) * 2022-04-29 2024-03-15 武汉船舶通信研究所（中国船舶重工集团公司第七二二研究所） 一种hd-sdi接口的传输加密方法及装置

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Also Published As

Publication number Publication date
WO2007101085A3 (fr) 2008-02-14
US7734044B2 (en) 2010-06-08
EP1994672A4 (fr) 2011-06-15
JP2009528006A (ja) 2009-07-30
CN101390332A (zh) 2009-03-18
WO2007101085A2 (fr) 2007-09-07
US20080019513A1 (en) 2008-01-24
EP1994672B1 (fr) 2017-10-25
CN101390332B (zh) 2012-09-05

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