Classifications

• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
  • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
  • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
  • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
  • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
  • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
  • H04L9/3013—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the discrete logarithm problem, e.g. ElGamal or Diffie-Hellman systems
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
  • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
  • H04L9/3247—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving digital signatures
  • H04L9/3252—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving digital signatures using DSA or related signature schemes, e.g. elliptic based signatures, ElGamal or Schnorr schemes
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
  • G06F2207/7219—Countermeasures against side channel or fault attacks
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
  • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
  • G06F7/722—Modular multiplication
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
  • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
  • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
  • G06F7/724—Finite field arithmetic
  • G06F7/725—Finite field arithmetic over elliptic curves
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
  • H04L2209/04—Masking or blinding
  • H04L2209/046—Masking or blinding of operations, operands or results of the operations

Definitions

• the present invention relates to a countermeasure method in an electronic component implementing an asymmetric cryptography algorithm with a private key, resistant to attacks aimed at discovering the private key. It also relates to a microcircuit device and a portable device, in particular a smart card, implementing such a method.
• Private-key asymmetric cryptography is based on the use of primitives P which are generally functions exploiting a problem with complex and one-way resolution, such as the so-called discrete logarithm problem in finite fields (DLP of English "Discrete Logarithm Problem ”) or the so-called discrete logarithm on elliptic curves (ECDLP of the English” Elliptic Curves Discrete Logarithm Problem ").
• DLP discrete logarithm problem in finite fields
• ECDLP of the English Elliptic Curves Discrete Logarithm Problem ").
• Signature schemes are a classic use of asymmetric cryptography.
• an algorithmic application of asymmetric cryptography with a signature scheme involving the use of a private key d is generally implemented by a microcircuit 12 to authenticate the transmission of an M message by a signature of this message using the private key.
• the private key d is for example stored in the microcircuit 12 which includes a memory 14 including itself a secure memory space 16 provided for this purpose and a microprocessor 18 for executing the asymmetric cryptographic algorithm 10.
• Microcircuit devices implementing cryptographic algorithms are sometimes attacked to determine the secret data they manipulate such as the key (s) used and possibly, in some cases, information. on the messages themselves.
• the algorithms of asymmetric cryptography to signature scheme are under attack to discover the private key.
• Auxiliary channel attacks are an important family of cryptanalysis techniques that exploit certain properties of software or hardware implementations of cryptographic algorithms.
• the attacks of the SPA (Simple Power Analysis) or DPA (Differential Power Analysis) type consist in measuring the incoming and outgoing currents and voltages in the microcircuit. during the execution of the asymmetric cryptographic algorithm in order to deduce the private key.
• the feasibility of this family of attacks has been demonstrated in the article by P. Kocher, J. Jaffe and B. Jun entitled “Differential Power Analysis” published in Advances in Cryptology in particular - Crypto 99 Proceedings, Lecture Notes In Computer Science Vol . 1666, M. Wiener, eds., Springer-Verlag, 1999.
• Time attacks analyze the time taken to perform certain operations. Such attacks on asymmetric cryptographic algorithms are described in the article by P. Kocher, N. Koblitz titled “Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other Systems” published in Advances in Cryptology - Crypto 96, 16th annual international cryptology conference, Aug. 18-22, 1996 Proceedings.
• Fault injection (s) attacks are also known, among which are the DFA (Differential Fault Analysis) attacks, which consist in intentionally generating faults during the execution of the algorithm. cryptography, for example by disrupting the microcircuit on which it runs. Such a disturbance may include one or more short illumination (s) of the microcircuit or the generation of one or more peak (s) of voltage on one of its contacts. It thus makes it possible, under certain conditions, to exploit the calculation and behavior errors generated in order to obtain part or all of the private key sought.
• DFA Different Fault Analysis attacks
• the invention more particularly relates to a method of countermeasure in an electronic component implementing an asymmetric cryptography algorithm with a private key d, comprising the steps of: generate a first output data using a primitive,
• the protection parameter a is conventionally generated using a pseudo random data generator 20, so that the execution of the primitive by the cryptographic algorithm 10 is itself made random, for example by a technique commonly referred to as masking, which can also be renamed a method of transformation or deformation of the data since their manipulation is deformed as opposed to their raw use, performed by a countermeasure section 22 of the microprocessor 18, using the protection parameter a.
• masking a technique commonly referred to as masking
• the intermediate data of the cryptographic algorithm and, consequently, the measurable currents are modified by the random protection parameter and their observation does not make it possible to find the true value of the private key.
• the masking does not disturb the algorithm itself, which therefore provides the same result with or without masking.
• RSA asymmetric cryptographic algorithm
• An efficient implementation of this primitive uses a binary representation of the private key d by iterating on each bit of this binary representation. In each iteration, the calculation performed and in fact the energy consumption during the calculation depends on the value of the bit concerned. Therefore, the execution of such a primitive makes the private key particularly vulnerable to the aforementioned attacks.
• a conventional countermeasure then consists in directly masking the private key using the protection parameter.
• a known signature scheme using this RSA algorithm can be used to sign an M message by applying the modular exponentiation to the message M using the private key d as an exponent.
• the signature is in this case the direct result of the modular exponentiation.
• a fault injection attack (s) is described. This attack allows, by switching to 0 a number of low-order bits of the random and then calculation of the signature a number of times, to deduce the value of the private key.
• One embodiment of the invention relates to a countermeasure method in an electronic component implementing a private key asymmetric cryptography algorithm, comprising the steps of:
• generating a protection parameter characterized in that it further comprises the steps of:
• the protection parameter is used to protect the execution of the operation following the application of the primitive, rather than the execution of the primitive itself. It is indeed more this operation that is exploited in the attacks aimed at this type of signature scheme.
• the countermeasure method comprises the steps of:
• the countermeasure method comprises the steps of:
• the intermediate parameter is the first output data item.
• the primitive is a modular exponentiation for the realization of a signature scheme cryptography algorithm of the DSA type.
• the primitive is a scalar multiplication for the realization of an ECDSA type signature scheme cryptography algorithm.
• the countermeasure method implements a signature-type asymmetric cryptographic algorithm consisting in applying the Fiat-Shamir heuristics to a zero-knowledge identification identification protocol.
• the generation of the protection parameter comprises the steps of:
• the countermeasure method comprises the steps of:
• each function being generating, by successive applications to at least one predetermined secret parameter and stored in memory, a corresponding sequence of values that can be determined solely from the corresponding secret parameter and the corresponding function
• the countermeasure method comprises the steps of:
• the method of countermeasure comprises, after carrying out the transformation, a step of regenerating the protection parameter for use in the step of generating the second output data item.
• Another embodiment of the invention consists in providing a microcircuit device, comprising a microprocessor for implementing a countermeasure method of a private key asymmetric cryptography algorithm, at least one secure memory for storage of the private key, and a data generator for generating a protection parameter, characterized in that it is configured to:
• the microcircuit device is configured to:
• the microcircuit device is configured to:
• the intermediate parameter is the first output data item.
• the primitive is a modular exponentiation for the realization of a signature scheme cryptography algorithm of the DSA type.
• the primitive is a scalar multiplication for the realization of an ECDSA type signature scheme cryptography algorithm.
• the microprocessor implements a signature-type asymmetric cryptographic algorithm consisting in applying the Fiat-Shamir heuristics to a zero-knowledge identification identification protocol.
• the data generator is configured to generate the protection parameter by:
• the data generator is configured to:
• each function being generating, by successive applications to at least one predetermined secret parameter and stored in memory, a corresponding sequence of values that can be determined solely from the corresponding secret parameter and the corresponding function
• the data generator is configured to: defining a generating function, by successive applications to at least one predetermined secret parameter and stored in memory, of a sequence of values that can be determined solely from the secret parameter and from the function,
• the microcircuit device is configured to, after completion of the transformation, regenerate the protection parameter to use it during the step of generating the second output datum.
• Another embodiment of the invention consists in providing a portable device, in particular a smart card, comprising a microcircuit device as described above.
• FIG. 1 previously described schematically represents the structure of a microcircuit device, of conventional type
• FIG. 2 schematically represents the structure of a microcircuit device, according to a first embodiment of the invention
• FIG. 3 schematically represents a smart card comprising the device of FIG. 2,
• FIG. 4 illustrates the successive steps of a first countermeasure method implemented by the device of FIG. 2,
• FIG. 5 illustrates the successive steps of a second countermeasure method implemented by the device of FIG. 2,
• FIG. 6 schematically represents the structure of a microcircuit device, according to a second embodiment of the invention.
• FIG. 7 illustrates the successive steps of a countermeasure method implemented by the device of FIG. 6.
• the microcircuit device 12 'represented in FIG. 2 comprises, like that represented in FIG. 1, an algorithmic application of asymmetric cryptography 10, a memory 14 including a secure memory space 16 for storing, in particular, a private key d intended to be used by the application 10, a microprocessor 18 and a pseudo-random data generator 20 for the supply a protection parameter a. It also has a countermeasure section 22 ', but this provides an improvement to the existing countermeasures, in particular to the countermeasure section 22 previously described.
• the device 12 ' is for example integrated in a portable device, in particular in the form of a secure smart card chip 30, as shown in FIG.
• the algorithmic application of asymmetric cryptography 10 is more precisely adapted for the implementation of a signature scheme of the type consisting in applying the heuristics of Fiat-Shamir to an identification protocol to zero disclosure of knowledge. It therefore comprises:
• the first and second output data constitute the signature (si, s2).
• the countermeasure section 22' is configured to transform, using the protection parameter a, the private key d and / or an intermediate parameter obtained from the first data Release.
• the intermediate parameter is the first output data itself.
• a first method of this type, performing a DSA-type signature on a message M, is illustrated in FIG. 4.
• the public key is (p, q, g, e).
• the private key is d.
• a random number u is generated, chosen such that 0 ⁇ u ⁇ q.
• the pseudo-random data generator 20 generates a protection parameter a whose size of the binary representation is equal to that of the private key d.
• the generator 20 generates a parameter a 'whose size is much smaller than that of d, but the binary representation of this parameter a' is concatenated as many times with itself as necessary, in order finally to provide a protection parameter a whose size of the binary representation is equal to that of d.
• the parameter generated by the generator 20 (a or a ') is stored in memory for use later, especially optionally as a verification parameter for the parameter a 'when combined with other parameters of the DSA algorithm to form a.
• an optional verification step 110 is performed if, in step 104, the parameter a 'generated by the generator 20 has been stored in memory as a verification parameter.
• the parameter a is again calculated, using the COMB function and the public and / or stored values used by this function (a ', q, si, ).
• step 104 If the value of a has changed between step 104 and step 110, it can be concluded that a fault injection attack (s) has occurred between these two steps. An alert is then transmitted by the cryptographic application 10 and the cryptographic algorithm is stopped (112) or a different security response comes into application.
• step 114 If the value of a has not changed between step 104 and step 110, proceed to a step 114 in which the following calculation is performed:
• a last step 116 the cryptographic application 10 returns the value (si, s2) as the signature DSA of the message M.
• the first method described above can be modified as follows.
• step 108 calculating the linear congruence operation involves the first transformed output data if 'and the private key d:
• the first method described above can be modified as follows.
• step 108 calculating the linear congruence operation involves the first output data if and the private key transformed from:
• step 114 the following calculation is performed:
• the first method described above can be modified as follows.
• step 108 calculating the linear congruence operation involves the first transformed output data if 'and the private key d:
• step 114 the following calculation is performed:
• the first method described above can be modified as follows.
• step 104 the pseudo-random data generator 20 generates a protection parameter a whose size of the binary representation is much smaller than that of d.
• step 108 the calculation of the linear congruence operation involves the first transformed output datum if and the transformed private key of:
• FIG. 1 A second method according to the invention, carrying out an ECDSA signature of the "Elliptic Curve Digital Signature Algorithm" on a message M, is illustrated in FIG.
• G be an elliptic curve of order q with q a prime number greater than 2160 .
• the curve is also defined by two elements a and b which are elements of a Galois field of cardinality n.
• a random number of k bits such as 0 ⁇ d ⁇ q, are randomly determined.
• the public key is Q.
• the private key is d.
• a random number u is generated, chosen such that 0 ⁇ u ⁇ q.
• the pseudo-random data generator 20 generates a protection parameter a whose size of the binary representation is equal to that of the private key d.
• the generator 20 generates a parameter a 'whose size is much smaller than that of d, but the binary representation of this parameter a' is concatenated as many times with itself as necessary, in order finally to provide a protection parameter a whose size of the binary representation is equal to that of d.
• the generator 20 generates a parameter a 'which is combined with other parameters of the ECDSA algorithm, such as q or if previously determined, using a COMB function to provide the protection parameter a.
• a COMB (a ', q, si, ).
• the parameter generated by the generator 20 (a or a ') is stored in memory for later use, especially optionally as a verification parameter for the parameter a' when combined with other parameters of the DSA algorithm to train a.
• the following steps 206 to 216 are identical to steps 106 to 116. They will therefore not be detailed.
• another method according to the invention can realize a Schnorr type signature.
• the step of calculating the first output data is identical to step 102.
• the linear congruence applied to steps 108, 114 is slightly modified.
• the microcircuit device 12 "represented in FIG. 6 comprises, like that represented in FIG. 2, an algorithmic application of asymmetric cryptography 10, a memory 14 including a secure memory space 16, a microprocessor 18 and a countermeasure section 22 'It is for example integrated in a portable device, in particular in the form of a chip of a secure smart card 30 as
• a cryptographic algorithm including a countermeasure can in fact be closely integrated into one and the same implementation.
• the algorithmic application of asymmetric cryptography 10 of the device 12 is more precisely adapted for the implementation of a signature scheme of the type consisting in applying the heuristics of Fiat-Shamir to a identification protocol with zero knowledge disclosure, and therefore includes:
• the countermeasure section 22 'of the device 12 is configured, like that of the device 12', to transform, using the protection parameter a, the private key d and / or an intermediate parameter obtained at From the first output data
• the intermediate parameter is the first output data itself.
• the pseudo-random data generator 20 of conventional type is replaced by a data generator 20" which comprises:
• a section 20 "has application of a predefined function F to at least one predetermined secret parameter S for generating a sequence of determinable values solely from this secret parameter and this function F, and
• a section 20 "b for providing at least one protection parameter reproducibly has a value of this sequence.
• Section 20 is actually a software or hardware implementation of the F function.
• the secret parameter S is stored in the secure memory 16 and supplied at the input of the section 20 "of the generator 20", while the protection parameter a is provided, at the output of the section 20 “b, at the counter section. -measure 22 '.
• the parameter a is not therefore a hazard in the conventional sense mentioned in the documents of the state of the art. This is a deterministic result derived from the calculation of the function F executed by the generator 20 "on at least one secret parameter S which may be specific to the smart card 30 on which the microcircuit 12 'is disposed. secret is for example derived from a public data device 30.
• the element A n can be processed before providing the parameter a.
• sequences of values (A n ) that can be provided by a generator 20 "according to the second embodiment of the invention . Then a second step, we will expose several possible uses of such sequences of values for the provision of protection parameters, in particular to the two countermeasure applications in asymmetric cryptography previously described with reference to FIGS. 4 and 5.
• the protection parameters are for example the elements of the sequence (A n ).
• A, q L .A 0 + r (q l -1) / (q-1).
• m 2 k .
• m is one of the secret parameters to be kept in the secure memory of the device.
• the initial element A 0 is chosen as being the generating element a to which the law of internal composition of the group GC is applied k times,
• the secret parameters S used by the generating function of the sequence (A n ) are then for example the generating element a and the values k, k 'and m.
• the protection parameters generated are for example the elements of the sequence (A n ).
• Frobenius a finite field, where the order q is a prime number of k bits.
• the group of inverse affine transformations on this finite field is a group of Frobenius.
• An interesting property of Frobenius groups is that no non-trivial element fixes more than one point.
• a t + m ⁇ m + O .A t 1n-1 -A t + 1 + ... + A 1 -A ⁇ 1+ 1, wherein the ⁇ , take the value 0 or 1.
• a secret parameter A 0 for example 16 bits
• a corresponding CRC polynomial among those conventionally used in CRC calculations, for example the CRC-16 polynomial (X 16 + X 15 + X 2 + 1) or the CRC CCITT V41 polynomial (X 16 + X 12 + X 5 + 1).
• the function T in question can be a secret matrix of values, the values A ' n and A " n respectively denoting respectively a row and a column of this matrix.
• the sequence (A n ) can be generated from a first sequence (A ' n ), also according to public data, such as for example data used during the execution of the cryptography application with countermeasure and not secret. Among these data, depending on the applications, mention may be made of the message M (in clear or encrypted), a public key e, etc.
• the values of the sequence used as protection parameters are then calculated using any COMB function combining all these data:
• a n COMB (A ' n , M, e, ).
• sequence of values (A n ) can be used not only to supply the countermeasure application of the cryptography algorithm with protection parameters, but also to detect fault injection attacks. (especially on public data). Indeed by regeneration of the sequence (A ' n ) using the secret parameter (s), at the end of the execution of the cryptography algorithm for example, but before doing the opposite operation of the initial transformation using a regenerated protection parameter, then by using this regenerated sequence (A ' n ) and public data as it appears at the end of execution, it is possible to check whether the application of the COMB function produces the same sequence of values (A n ) or not and therefore if public data has been assigned or not running.
• this generation of random events can be replaced by the non-random generation of parameters derived from one or more sequence (s) of values obtained using at least one secret parameter.
• FIG. 7 illustrates an example of steps performed by a method according to the second embodiment of FIG. 6, applied to the execution of an asymmetrical cryptographic algorithm with countermeasure, using T protection parameters a. ... a ⁇ by execution, all the protection parameters that can be extracted from the same sequence of values (A n ) generated by the section 20'a.
• a counter i is initialized to 0. This counter i is intended to keep in memory the number of times that the asymmetric cryptographic algorithm has been executed since this step of initialization INIT, as long as another initialization is not performed.
• the secret parameter S (or the parameters S when there are several), from which the sequence of values must be generated, is defined. It can be kept from a previous initialization, but can also be generated on the basis of a new value on the occasion of this initialization. It is for example generated from unique identification data, such as a public data device 30. It can also be generated from parameters or physical phenomena related to the microcircuit at a given instant, which can be random. In all cases, it is stored in memory in a secure manner, to allow the microcircuit to regenerate at any time the same sequence of values (A n ) using the function implemented by section 20 "a.
• the initialization step INIT can be unique in the life cycle of the microcircuit, carried out during the design by the manufacturer, or reproduced several times, for example regularly or whenever the counter i reaches an imax value.
• the generator 20 " is solicited one or more times to apply the secret parameter S to the predefined function F , so as to generate, in one or more times, a number T of elements of the sequence of values (A n ): A 1 , ... A ⁇ . From these first T elements, the protection parameters T v ... a ⁇ are generated.
• a k A k .
• the generator 20 " is again requested one or more times to apply the secret parameter S to the predefined function F, so as to generate, in one or more times, a number T of additional elements of the sequence of values (A n ): A T (M) +1 , ... A 11 . From these additional elements T, the protection parameters ⁇ ,..., ⁇ are generated, as before.
• a k AT ( ⁇ 1) + k .
• the knowledge of the method and the secret values used by the method including the initial parameter A 0 previously loaded in memory or during a stage of the life cycle of the microcircuit device in EEPROM memory, allows to find at any time the protection parameters generated and used in the life of the device. It is clear that this feature then allows simple and effective debugging and improved resistance to attack by fault injection.

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