EP2502369A1 - Agencement de circuit pour un récepteur de radiodiffusion à traitement de signal numérique - Google Patents

Agencement de circuit pour un récepteur de radiodiffusion à traitement de signal numérique

Info

Publication number
EP2502369A1
EP2502369A1 EP10768026A EP10768026A EP2502369A1 EP 2502369 A1 EP2502369 A1 EP 2502369A1 EP 10768026 A EP10768026 A EP 10768026A EP 10768026 A EP10768026 A EP 10768026A EP 2502369 A1 EP2502369 A1 EP 2502369A1
Authority
EP
European Patent Office
Prior art keywords
digital
circuit arrangement
output
analog
output stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP10768026A
Other languages
German (de)
English (en)
Inventor
Klaus-Erwin Groeger
Jens Passoke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2502369A1 publication Critical patent/EP2502369A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving

Definitions

  • the invention relates to a circuit arrangement for a receiver, such a receiver and an output stage, which can be used in an presented circuit arrangement.
  • a circuit arrangement for a radio receiver is known.
  • This circuit has a receiver which amplifies, selects and demodulates a signal received via an antenna.
  • a stereo multiplex signal with a sampling rate of, for example, 456 kHz available.
  • This is further processed and passed through a circuit for noise reduction.
  • a stereo decoder which generates two audio signals, the be routed to outputs via multiplexers. From there, the digital audio signals are fed to the speakers via LF amplifiers.
  • DACs are integrated in the final stage, only as many audio DACs have to be implemented as required. Furthermore, there are no more analog outputs for connecting z. As a headphone or an analog audio amplifier available.
  • analog outputs are implemented in the output stage ICs for driving additional analog components which, for example, are driven with a lower output power than the loudspeakers.
  • analog outputs in the usually digitally controlled integrated circuits or ICs of an output stage for controlling additional analog components such as.
  • headphones with a lower output power than the speakers are controlled, be realized.
  • a simple audio player in the final stage can be integrated, which is controlled for example via a digital interface of the power amplifier.
  • additional devices or devices such as, for example, an external audio amplifier to be connected for more speakers whose level via the user interface (HMI: Human Machine Interface) can be adjusted.
  • HMI Human Machine Interface
  • Figure 1 shows a schematic representation of a circuit arrangement for a radio receiver according to the prior art.
  • FIG. 2 shows a schematic representation of a first embodiment of the presented circuit arrangement.
  • FIG. 3 shows a schematic representation of a further embodiment of the circuit arrangement.
  • FIG. 1 schematically shows a circuit arrangement 10 for a radio receiver according to the prior art.
  • This circuit arrangement 10 comprises two input stages 12, which comprise an adjustment unit or a tuner and are designed as input and mixing stages. Furthermore, an output stage or a backend 14 and an output stage 16 are shown.
  • ADC analog-to-digital converters 18
  • IF intermediate frequencies
  • RDS Radio Data System
  • Digital interfaces 26 allow bidirectional communication with an external control unit 28. Furthermore, digital inputs 30 are for digital
  • Sources 32 such as MP3, provided.
  • Analog sources 34 are connected via the ADC 18.
  • a DAC audio output 36 is provided.
  • a high-quality signal path for the radio reception in car radios usually the analog front-end 12, with an analog intermediate frequency or IF interface is used.
  • the front-end 12 is then followed by the back-end 14 or a back-end IC, which digitizes and further processes the analog intermediate frequency or IF signal by means of the ADCs 18.
  • the recovered digital audio signal is digital-analog converted and output in the back-end IC 14.
  • the analog output stage 16 is used to amplify the signal.
  • digital output stages are also used.
  • the output stage has two first outputs 45 for driving two loudspeakers 47. In this way, a stereo signal can be transmitted to the two speakers 47. The outputs then transmit signals that go back to a common source.
  • the backend ICs still contain analog circuit components besides the all-digital signal processing path due to the required ADCs and DACs. This limits the choice of semiconductor technology, which adversely affects the cost of the system.
  • the aim is to specify a system architecture which enables a purely digital back end IC.
  • the DACs for analog audio output can be omitted in the backend IC.
  • the audio signal processing in the receiving IC can be purely digital. This can be achieved with little effort and chip area as well as a high degree of flexibility, for example by means of a software-based solution on a DSP.
  • the DACs are integrated into the power amplifier, only as many audio ADCs are automatically implemented as required.
  • FIG. 2 shows an embodiment of the circuit arrangement according to the invention, which is provided with the reference numeral 50.
  • This comprises two input and mixing stages or frontends 52, in each of which an ADC is integrated and which serve as setting units or tuners, an output stage or a backend 54 for a purely digital signal processing and an output stage 56.
  • Digital intermediate frequency signals are received from the input stages 52 given to the backend 54 (arrows 80).
  • a block 56 which includes digital signal processing, intermediate frequency (IF) processing and phase diversity, a demodulator and a radio data system (RDS), and another block 58, which includes a digital processing, a multiplexer and an audio player included.
  • IF intermediate frequency
  • RDS radio data system
  • another block 58 which includes a digital processing, a multiplexer and an audio player included.
  • Digital interfaces 60 allow bidirectional communication with an external control unit 62. Also provided are digital inputs 64 for digital sources 66, such as MP3. Analog sources 68, such as a microphone, are connected directly to the output stage 56. For controlling the output stage 16, a digital audio output 70 is set up in the backend 54.
  • the all-digital backend 54 apart from analog functions, can take into account technology trends and increasing performance requirements. It also provides a flexible tuner IC design for single and multi-turn concepts.
  • the output stage 56 comprises two first outputs 65 for driving two loudspeakers 67 and a second output 69 for driving a headphone 71.
  • the second output 69 goes back to a different source than the two first outputs 65th
  • analog outputs in this case the output 69, are realized in the digitally driven output stage 56, with which additional analog components, such as, for example, headphones, can be controlled.
  • these ADCs can also be recorded in the digitally controlled power amplifier module.
  • a simple audio player is integrated in the final stage, this can in a further embodiment of the invention, for. B. via the digital interface of the power amplifier, are controlled.
  • additional devices or devices such as an external audio amplifier for additional speakers, can be connected, the level of which can be adjusted via the user interface. But the sound position for a headphone to be connected is hereby possible.
  • the illustrated system partitioning allows a purely digital backend.
  • FIG. 3 it is provided that the previously described ADCs and DACs for audio signal conversion are not integrated in the audio amplifier, but are realized on a separate IC or in the frontend.
  • FIG. 3 shows a further embodiment of the circuit arrangement, which is denoted overall by the reference numeral 100.
  • This circuit arrangement 100 comprises two input stages or frontends 102, an output stage or a backend 104 and an output stage 106.
  • the input stages 102 serve as setting units or tuners.
  • ADCs 108 are integrated. These ADCs 108 provide digital intermediate frequency signals to the back end 104 (arrows 110).
  • Digital interfaces 1 12 in the backend 104 are available for bidirectional communication (arrows 1 15) with an external control unit 14.
  • Digital inputs 1 16 connect digital sources 1 18 (arrow 120).
  • a demodulator and a radio data system comprises, and another block 132, which includes a digital processing, a multiplexer and an audio player provided. Furthermore, a block 134 is set up for a digital audio output.
  • Analog sources 136 such as microphones, are connected to one of the input stages 102 (arrow 140).
  • a DAC 142 in the front end shown above has a direct connection (arrows 144) to the final stage 106.
  • the digital audio output 134 can be coupled into this connection (arrow 146).
  • the output stage 106 includes two first outputs 1 15 for driving two speakers 1 17 and a second output 1 19 for driving a headphone 121.
  • the second output 1 19 goes back to a different source than the two first outputs 1 15.
  • a Analog-to-digital converter unit 131 provided in the output stage 106.

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

La présente invention concerne un agencement de circuit (50) pour un récepteur, un tel récepteur et un étage final (56) pour l'agencement de circuit décrit (50). Selon l'invention, l'agencement de circuit (50) comporte au moins un étage d'entrée (52), au moins un étage de sortie (54) et au moins un étage final (56). Le ou les étages finaux (56) sont commandés de manière numérique et comportent au moins une première sortie analogique (65) et au moins une deuxième sortie analogique (69) qui proviennent de différentes sources.
EP10768026A 2009-11-18 2010-10-21 Agencement de circuit pour un récepteur de radiodiffusion à traitement de signal numérique Ceased EP2502369A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102009046840 2009-11-18
DE102010001548A DE102010001548A1 (de) 2009-11-18 2010-02-03 Schaltungsanordnung für einen Empfänger
PCT/EP2010/065837 WO2011061036A1 (fr) 2009-11-18 2010-10-21 Agencement de circuit pour un récepteur de radiodiffusion à traitement de signal numérique

Publications (1)

Publication Number Publication Date
EP2502369A1 true EP2502369A1 (fr) 2012-09-26

Family

ID=43877765

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10768026A Ceased EP2502369A1 (fr) 2009-11-18 2010-10-21 Agencement de circuit pour un récepteur de radiodiffusion à traitement de signal numérique

Country Status (4)

Country Link
EP (1) EP2502369A1 (fr)
CN (1) CN102668422B (fr)
DE (1) DE102010001548A1 (fr)
WO (1) WO2011061036A1 (fr)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0873041A1 (fr) * 1997-04-19 1998-10-21 MICRONAS Semiconductor Holding AG Processeur numérique du son

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1048724A (en) 1912-03-07 1912-12-31 Illinois Silo Company Silo.
US1242780A (en) 1913-11-04 1917-10-09 Ellen De Long Garment-supporter.
US5661810A (en) 1993-03-24 1997-08-26 Robert Bosch Gmbh Circuit arrangement for deriving signals for masking audio signals
JP4089020B2 (ja) 1998-07-09 2008-05-21 ソニー株式会社 オーディオ信号処理装置
US7010061B2 (en) * 1999-12-30 2006-03-07 Infineon Technologies Ag Configurable all-digital coherent demodulator system for spread spectrum applications
US7076233B2 (en) 2003-03-28 2006-07-11 Sandbridge Technologies, Inc. AM receiver and demodulator
EP1487122A1 (fr) 2003-06-12 2004-12-15 STMicroelectronics S.r.l. Récepteur radio numérique
US7099648B2 (en) 2003-12-19 2006-08-29 Broadcom Corporation Radio frequency integrated circuit layout with noise immunity border
US7724843B2 (en) * 2006-04-18 2010-05-25 Sigmatel, Inc. Clock adjustment for a handheld audio system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0873041A1 (fr) * 1997-04-19 1998-10-21 MICRONAS Semiconductor Holding AG Processeur numérique du son

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2011061036A1 *

Also Published As

Publication number Publication date
CN102668422B (zh) 2016-06-29
CN102668422A (zh) 2012-09-12
WO2011061036A1 (fr) 2011-05-26
DE102010001548A1 (de) 2011-05-19

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