EP3281218A1 - Procédé de connexion électrique d'un composant au moyen de la liaison galvanique d'une pièce de contact à pores ouverts, et ensemble composant correspondant - Google Patents

Procédé de connexion électrique d'un composant au moyen de la liaison galvanique d'une pièce de contact à pores ouverts, et ensemble composant correspondant

Info

Publication number
EP3281218A1
EP3281218A1 EP16726297.1A EP16726297A EP3281218A1 EP 3281218 A1 EP3281218 A1 EP 3281218A1 EP 16726297 A EP16726297 A EP 16726297A EP 3281218 A1 EP3281218 A1 EP 3281218A1
Authority
EP
European Patent Office
Prior art keywords
component
contact
contact piece
open
pore
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP16726297.1A
Other languages
German (de)
English (en)
Inventor
Stefan Stegmeier
Hubert Baueregger
Volkmar Sommer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of EP3281218A1 publication Critical patent/EP3281218A1/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/20—Conductive package substrates serving as an interconnection, e.g. metal plates
    • H10W70/22—Conductive package substrates serving as an interconnection, e.g. metal plates having an heterogeneous or anisotropic structure
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D21/00—Processes for servicing or operating cells for electrolytic coating
    • C25D21/12—Process control or regulation
    • C25D21/14—Controlled addition of electrolyte components
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424—Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
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    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
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    • H10W40/25—Arrangements for cooling characterised by their materials
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    • H10W40/257—Arrangements for cooling characterised by their materials having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh or porous structures
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    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
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    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
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    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/652—Cross-sectional shapes
    • H10W70/6523—Cross-sectional shapes for connecting to pads at different heights at the same side of the package substrate, interposer or RDL
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/953—Materials of bond pads not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/764—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

Definitions

  • the invention relates to a method for electrical contacting of a component with an electrically conductive contact and a component module having a component with at least one electrically conductive contact.
  • the component contacts can withstand high temperatures, while non-substrate contacts are regularly used with processes such as wire-bond technology (also: “Ribbon Bond Technology”). ), the pressure-contact technology with the aid of compensating elements, such as molybdenum, or realized with planar technologies (for example, SiPLIT, Skin and DirectFET)
  • wire-bond technology also: “Ribbon Bond Technology”
  • compensating elements such as molybdenum
  • planar technologies for example, SiPLIT, Skin and DirectFET
  • soldering and sintering processes adversely affect a high temperature entry in the components to be contacted and therefore can not be used for heat-sensitive components.
  • Electroplating, diffusion soldering and sintering are also very time-consuming processes.
  • the necessary fixing in particular in the case of the contacting of a plurality of contact points, requires considerable installation effort.
  • these contacting methods are not very reliable due to the risk of component damage due to irregular compressive forces.
  • the inventive method is a method for electrical see contacting a component having at least one electrical contact.
  • at least one open-pored contact piece is galvanically connected to the at least one contact.
  • the open-pore nature of the contact piece provides numerous passages for electrolyte fluid, which can thus reach the interface of the contact piece and the electrical contact of the component from the outside.
  • the open-pored material of the contact piece has an open-cell structure through which electrolyte liquid can pass through particularly efficiently.
  • the method according to the invention can advantageously be carried out without a large temperature input into components to be contacted, which are at least potentially heat-sensitive, since galvanic methods are regularly carried out at relatively low temperatures of at most 150.degree.
  • permanently elastic, resilient contacts can be realized very easily by means of the method according to the invention, since straight open-pore materials regularly have elastic, resilient material properties.
  • galvanically connected in the sense of this application is understood in particular to mean “connected by electroplating technology” or “connected by means of electroplating”, the galvanic connection preferably taking place by means of electrolyte fluid, in particular by means of an electrolytic bath.
  • electrolyte liquid is introduced into open pores of the open-pore contact piece.
  • open-pored contact piece is understood to mean, in particular, a contact piece in which pores lead from the outside into the interior of the contact piece Material is, with which the contact piece and / or the electrical contact of the component is formed.
  • such a component is used in the method according to the invention, in which the at least one contact, viewed at least in itself, is a flat part.
  • the contact preferably has a contact surface whose greatest areal extent is greater than an extent of the contact perpendicular to this contact area.
  • the method according to the invention proves to be particularly advantageous, since by means of this method, a flat contacting is readily feasible.
  • heat-dissipating contacts can be easily achieved in this way, since planar contacts already cause a strong heat spreading due to the spatial geometry. Also the to
  • Heat spread required thermal conductivity is given regularly, as required for contacting good electrical conductivity as well as desirable for a heat spreading good thermal conductivity for typical materials matrials regularly go together.
  • At least one contact piece is an electrically conductive Kon- clock piece used.
  • the contacts can be realized very quickly, since only an electrically conductive connection has to be accomplished by means of the material deposited on the contact point. To deposit larger amounts of material is unnecessary in this embodiment of the method according to the invention, since the contact piece itself already represents a large-scale conduction path.
  • the at least one, open-pore contact piece is formed from or with porous material.
  • the at least one open-pore contact piece is formed from or with metal, in particular nickel and / or silver and / or gold and / or tin and / or copper.
  • the at least one open-pored contact piece with a fabric-like and / or foam-like and / or net-like structure is expediently formed in the method according to the invention.
  • the at least one open-pore contact piece is galvanically bonded to the contact at such a temperature which is at most 100 ° C., preferably at most 60 ° C., in particular at most 20 ° C. and expediently at most 5 ° C. and / or from the operating temperature of the component by at most 20 ° C, preferably by at most 10 ° C, in particular by at most 5 ° C and ideally by at most 2 ° C, deviates.
  • the temperature input into the component in the implementation of the method can be kept very low.
  • this development of the method according to the invention is particularly preferable.
  • the component is the smallest possible difference in temperature of galvanic connection and later operating temperature tied with low tension.
  • the galvanic connection can be carried out at temperatures of more than 100 ° C., in which case salt melt - based metal deposition methods are expediently used.
  • the at least one open-pored contact piece is galvanically connected by means of an electrochemical electroplating process.
  • an electrically conductive contact piece is used, wherein metal is deposited on the contact piece by means of the electrochemical electroplating process.
  • an anode is used, which is formed with such a metal, which is to be deposited in the process on the contact piece.
  • this metal is copper.
  • the metal used is nickel and / or silver and / or gold and / or tin.
  • the at least one open-pore contact piece is galvanically connected by means of an external current-free method, in particular by exchange metallization and / or by reduction metallization and / or by contact metallization.
  • an external current-free method in particular by exchange metallization and / or by reduction metallization and / or by contact metallization.
  • a contact piece is used, which initially as such does not form a continuous conduction path, strictly speaking, therefore, it is not macroscopically conductive. Instead, the contact piece has a large number of metal islands, which to a certain extent form a continuous conduction path as metallization islands during the electroless plating process, which is expediently free from external current.
  • the component is contacted by means of the contact piece with a further component and / or current conductor and / or with a substrate, after which the contact piece and / or the component and / or the further component and / or conductor and / or substrate with an electrical insulation layer are provided.
  • the insulating layer is advantageously formed by means of casting and / or molding and / or from or with siloxanes and / or polymers.
  • a power component is used as the component.
  • Herangezo- gene is suitably in the inventive method as a component, a component having at least one transistor, preferably an insulated-gate bipolar transistor.
  • a component with two contacts preferably on opposite sides, in particular flat sides of the component, used, wherein at least one open-pore contact piece is electrically connected to these contacts, in particular at least one open-pore contact piece per contact, preferably in each case after one inventive method as described above.
  • the component module according to the invention has a component with at least one electrical contact.
  • at least one open-pore contact piece is galvanically connected to the electrical contact.
  • the component module according to the invention is particularly advantageously formed by means of a method according to the invention as described above.
  • this stack is realized in the manner of a stack, the planes of this stack being formed by means of printed circuit boards and / or substrates to which components are connected by means of contact pieces.
  • the contacts of components of all levels are contacted at the same time by means of the method according to the invention.
  • the component module according to the invention, several components are connected to this or these together on a flat side of a substrate or a printed circuit board. Also in this development, the plurality of components can be contacted at the same time by means of the method according to the invention.
  • FIG. 1 shows an arrangement of a power component on a
  • Fig. 2 shows the arrangement of the power component according to. 1 when performing a first step of the invention inventive method in a schematic diagram in cross section
  • Fig. 3 shows the arrangement of the power component according to. Fig. 1
  • FIG. 4 shows an enlarged detail (A) from FIG. 3 together with a detail (B) from it
  • FIG. 5 shows the component module according to the invention according to the method steps according to the figures 1 to 4 in a schematic diagram in cross section
  • FIG. 6 shows a further arrangement of a power component on a ceramic substrate before carrying out a further exemplary embodiment of the method according to the invention for producing a further exemplary embodiment of the component module according to the invention in a schematic diagram in cross section,
  • Fig. 7 shows the arrangement of the power component according to. Fig. 6 in a first step of the further embodiment of the inventive method in a schematic diagram in cross section and Fig. 8 shows the further embodiment of the component module according to the method steps according to Figures 6 and 7 in a schematic diagram in cross section.
  • the power component 10 shown in FIG. 1 is a
  • Insulated-gate bipolar transistor n IGBT
  • IGBT Insulated-gate bipolar transistor
  • first 20 and second flat side 30 which vonanan are averted.
  • first 20 and second flat side 30 extend thin-film-like surface contacts 40, 50 of the power component 10, which are formed as areal chip metallizations.
  • the surface contact 40 of the power component 10 arranged on the upper side in FIG. 1 consists of copper
  • the underside surface contact 50 of the power component 10 consists of silver.
  • top surface contacts may also be formed from or with silver or from or with AlSiCu, other metals or other electrically conductive materials
  • the bottom surface contacts may also be formed from or with gold or other metals or other electrically conductive materials.
  • contact pieces 60, 70 open-pored material are placed on the surface contacts 40, 50, which extend substantially flat along the surface contacts 40, 50.
  • the contact pieces 60, 70 are formed conductive and realized as copper sponges.
  • the open-pore contact pieces 60, 70 can also consist of other open-pore conductive materials, such as nets or fabric or other porous structures formed aluminum -, Ti- or formed from or with other metals contacts.
  • polymer sponges coated with conductive materials or partially coated with conductive particles can also be used as contact pieces.
  • One of the surface contacts 50 of the power component 10 faces a further surface contact 80 of a ceramic substrate 90 with a ceramic core 100 made of aluminum nitride (A1N).
  • the ceramic core 100 can be made of other ceramic materials in further, not specifically shown embodiments. mixing material, or from printed circuit board materials such as FR 4 or other carriers made of silicone and / or epoxy.
  • the further surface contact 80 of the ceramic substrate 90 is formed as superficial substrate metallization, in the illustrated exemplary embodiment as a copper substrate metallization.
  • the surface contact 50 of the power component 10 facing the ceramic substrate 90 and the further surface contact 80 of the ceramic substrate 90 extend parallel to one another and consequently form a planar gap.
  • the contact piece 70 arranged on that surface contact 50 facing the ceramic substrate 90 fills this planar gap completely and rests against this surface contact 50 of the power component 10 as well as on the further surface contact 80 of the ceramic substrate 90.
  • the contact piece 70 is thus arranged for contacting the power component 10 and the ceramic substrate 90.
  • the open-pore contact pieces 60, 70 are contacted with electrodes 110, 120 in a further method step (FIG. 2).
  • a first electrode 110 at that contact piece 60 which is arranged on that surface contact 40 facing away from the ceramic substrate 90, is electrically contacted on its outer side 130, which is remote from the power component 10.
  • Another second electrode 120 is electrically contacted to the one copper surface contact 80 which is located on the contact piece located between power component 10 and ceramic substrate 90.
  • the first electrode 110 acts as a fixing element, which ensures the fixing of the power module formed by the power component 10, ceramic substrate 90 and contact pieces 60, 70 during the method according to the invention.
  • the first electrode 110 by means of a not shown in detail clamping device in the direction of
  • the electrode 110 may not be formed as a fixing element, wherein the fixation of the contact pieces 60, 70 instead by means of a conductive adhesive takes place. Due to the conductivity of the adhesive, the contact pieces 60, 70 can be easily contacted electrically.
  • metal is deposited by means of electrochemical galvanization known per se, copper in the illustrated embodiment, in the region between the open-pore contact pieces 60, 70 and the surface contacts 40, 50, 80 (FIG ).
  • the deposited material forms layers 132, 134, 136 which extend flat along the chip metallizations or
  • FIG. 4 A illustrates the connection of the contact piece 70 located between the power component 10 and the ceramic substrate 90.
  • FIG. 4 B illustrates the connection of the contact piece 70 to the power component 10.
  • the power modules according to the invention formed of ceramic substrate 90 and anAuth investigatingm power device 10 with insulating material 170, in the illustrated case, a siloxane, wrapped (Fig. 5).
  • insulating material 170 in the illustrated case, a siloxane, wrapped (Fig. 5).
  • another insulating material 170 is used, for example, a polymer.
  • FIGS. 6 to 8 instead of an electrochemical electroplating process, an electroless plating process is used. Accordingly, this embodiment differs from the embodiment shown in Figures 1 to 5 in that - as known per se - a contact with electrodes 110, 120 is not required for electroless plating process. Consequently, instead of the first electrode 110, only one fixing element 180 is present (FIG. 6). The fixing element 180 is subjected to a force in the direction of the ceramic substrate 90 by means of a clamping device not shown in detail, so that the power module is held together during the method.
  • no fixing element 180 is provided, wherein the fixation of the contact pieces 60 ⁇ , 70 'instead by means of an adhesive (for example by means of a small adhesive point).
  • an adhesive for example by means of a small adhesive point.
  • a contact piece is used, which initially as such does not form a continuous conduction path. Rather, the contact piece has a large number of copper metal islands, which as a rule form a continuous conduction path as metallization islands during the electroless plating process as described above.
  • the power modules according to the invention formed of ceramic substrate 90 and contacted power component 10 are coated with insulating material 170, in the illustrated case a siloxane (FIG. 8).
  • insulating material 170 in the illustrated case a siloxane (FIG. 8).
  • another insulating material 170 is used, for example, a polymer.
  • the galvanized metal may be another metal instead of copper.
  • a power module according to the invention may be realized in a stack with several stacked ceramic or other substrates in the manner of a stack.
  • Electronic contacts can be performed in several levels at the same time by means of the method according to the invention.
  • a plurality of components can also be contacted simultaneously by means of the method according to the invention in a single plane.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Die Bonding (AREA)
  • Manufacturing Of Electrical Connectors (AREA)

Abstract

L'invention concerne un procédé de connexion électrique d'un composant (10) (par ex. d'un composant de puissance et/ou d'un composant (à semi-conducteur) pourvu d'au moins un transistor IGBT (transistor bipolaire à porte isolée)), ledit composant comprenant de préférence au moins un contact (40, 50), selon lequel au moins une pièce de contact à pores ouverts (60, 70) est reliée galvaniquement (par électrochimie ou sans apport de courant extérieur) audit contact (40, 50). Un ensemble composant est ainsi formé. Le contact (40, 50) est de préférence une pièce plate ou présente une surface de contact dont la plus grande étendue plane est supérieure à une étendue du contact (40, 50) perpendiculairement à cette surface de contact. La température de la liaison galvanique est au maximum de 100 °C, de préférence au maximum de 60 °C, pertinemment au maximum de 20 °C et idéalement au maximum de 5 °C et/ou dévie de la température de fonctionnement du composant de 50 °C au maximum, de préférence de 20 °C au maximum, en particulier de 10 °C au maximum et idéalement de 5 °C au maximum, préférablement de 2 °C au maximum. Ledit composant (10) peut être connecté au moyen de la pièce de contact (60, 70) avec un autre composant, conducteur électrique et/ou substrat (90). De préférence, un composant (10) présente deux contacts (40, 50) sur les faces opposées l'une à l'autre dudit composant (10), au moins une pièce de contact (40, 50) à pores ouverts étant reliée galvaniquement à chaque contact (40, 50).
EP16726297.1A 2015-06-01 2016-05-23 Procédé de connexion électrique d'un composant au moyen de la liaison galvanique d'une pièce de contact à pores ouverts, et ensemble composant correspondant Withdrawn EP3281218A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102015210061.8A DE102015210061A1 (de) 2015-06-01 2015-06-01 Verfahren zur elektrischen Kontaktierung eines Bauteils und Bauteilmodul
PCT/EP2016/061595 WO2016193038A1 (fr) 2015-06-01 2016-05-23 Procédé de connexion électrique d'un composant au moyen de la liaison galvanique d'une pièce de contact à pores ouverts, et ensemble composant correspondant

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EP3281218A1 true EP3281218A1 (fr) 2018-02-14

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Country Link
US (1) US11037862B2 (fr)
EP (1) EP3281218A1 (fr)
JP (1) JP6550477B2 (fr)
KR (1) KR102062068B1 (fr)
CN (1) CN107660308B (fr)
DE (1) DE102015210061A1 (fr)
WO (1) WO2016193038A1 (fr)

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EP4672330A1 (fr) 2024-06-26 2025-12-31 Nexperia B.V. Dispositif semi-conducteur et procédé de fabrication du dispositif semi-conducteur

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Publication number Publication date
US20180158757A1 (en) 2018-06-07
KR20180014081A (ko) 2018-02-07
JP6550477B2 (ja) 2019-07-24
KR102062068B1 (ko) 2020-01-03
CN107660308B (zh) 2021-09-17
US11037862B2 (en) 2021-06-15
JP2018516464A (ja) 2018-06-21
CN107660308A (zh) 2018-02-02
WO2016193038A1 (fr) 2016-12-08
DE102015210061A1 (de) 2016-12-01

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