EP3673513A4 - Barrière arrière à base d'alliage numérique destinée à des transistors au nitrure à canal p - Google Patents
Barrière arrière à base d'alliage numérique destinée à des transistors au nitrure à canal p Download PDFInfo
- Publication number
- EP3673513A4 EP3673513A4 EP17922088.4A EP17922088A EP3673513A4 EP 3673513 A4 EP3673513 A4 EP 3673513A4 EP 17922088 A EP17922088 A EP 17922088A EP 3673513 A4 EP3673513 A4 EP 3673513A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- rear barrier
- nitride transistors
- digital alloy
- based rear
- channel nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/472—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having lower bandgap active layer formed on top of wider bandgap layer, e.g. inverted HEMT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
- H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
- H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
- H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
- H10D62/8164—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation comprising only semiconductor materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/512—Disposition of the gate electrodes, e.g. buried gates
- H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2017/048753 WO2019040083A1 (fr) | 2017-08-25 | 2017-08-25 | Barrière arrière à base d'alliage numérique destinée à des transistors au nitrure à canal p |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP3673513A1 EP3673513A1 (fr) | 2020-07-01 |
| EP3673513A4 true EP3673513A4 (fr) | 2021-04-07 |
Family
ID=65439473
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP17922088.4A Pending EP3673513A4 (fr) | 2017-08-25 | 2017-08-25 | Barrière arrière à base d'alliage numérique destinée à des transistors au nitrure à canal p |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP3673513A4 (fr) |
| CN (1) | CN111033750B (fr) |
| WO (1) | WO2019040083A1 (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115458406B (zh) * | 2022-03-18 | 2025-11-25 | 西安电子科技大学 | 基于ScAlN数字合金的极化可调HEMT及其制备方法 |
| CN114937688B (zh) * | 2022-05-17 | 2025-06-03 | 江苏镓宏半导体有限公司 | 一种氮化镓外延结构及半导体器件及制备方法 |
| CN118676199A (zh) * | 2024-08-21 | 2024-09-20 | 深圳平湖实验室 | 半导体器件及其制备方法、芯片、电子设备 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100276732A1 (en) * | 2007-12-26 | 2010-11-04 | Yuji Ando | Semiconductor device |
| US20140264379A1 (en) * | 2013-03-15 | 2014-09-18 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | III-Nitride P-Channel Field Effect Transistor with Hole Carriers in the Channel |
| US20150303290A1 (en) * | 2014-04-21 | 2015-10-22 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device and method of manufacturing the semiconductor device |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6942150B2 (en) * | 1993-11-24 | 2005-09-13 | Metrologic Instruments, Inc. | Web-based mobile information access terminal |
| US7030428B2 (en) * | 2001-12-03 | 2006-04-18 | Cree, Inc. | Strain balanced nitride heterojunction transistors |
| US7612390B2 (en) * | 2004-02-05 | 2009-11-03 | Cree, Inc. | Heterojunction transistors including energy barriers |
| US7709859B2 (en) * | 2004-11-23 | 2010-05-04 | Cree, Inc. | Cap layers including aluminum nitride for nitride-based transistors |
| US7615774B2 (en) * | 2005-04-29 | 2009-11-10 | Cree.Inc. | Aluminum free group III-nitride based high electron mobility transistors |
| US9711633B2 (en) * | 2008-05-09 | 2017-07-18 | Cree, Inc. | Methods of forming group III-nitride semiconductor devices including implanting ions directly into source and drain regions and annealing to activate the implanted ions |
| CN102265412A (zh) * | 2008-12-16 | 2011-11-30 | 加州理工学院 | 光电探测器的数字合金吸收体 |
| US8217480B2 (en) * | 2010-10-22 | 2012-07-10 | California Institute Of Technology | Barrier infrared detector |
| US8617927B1 (en) * | 2011-11-29 | 2013-12-31 | Hrl Laboratories, Llc | Method of mounting electronic chips |
| WO2013155108A1 (fr) * | 2012-04-09 | 2013-10-17 | Transphorm Inc. | Transistors au nitrure-iii n-polaires |
| US8860091B2 (en) * | 2012-04-16 | 2014-10-14 | Hrl Laboratories, Llc | Group III-N HFET with a graded barrier layer |
| EP3285302B1 (fr) * | 2013-02-15 | 2019-09-11 | AZUR SPACE Solar Power GmbH | Structure de couches pour un transistor normalement bloqué à nitrures d'éléments iii |
| US9202905B1 (en) * | 2014-09-08 | 2015-12-01 | Triquint Semiconductor, Inc. | Digital alloy layer in a III-nitrade based heterojunction field effect transistor |
| US10347722B2 (en) * | 2015-03-04 | 2019-07-09 | Lehigh University | Artificially engineered III-nitride digital alloy |
-
2017
- 2017-08-25 EP EP17922088.4A patent/EP3673513A4/fr active Pending
- 2017-08-25 WO PCT/US2017/048753 patent/WO2019040083A1/fr not_active Ceased
- 2017-08-25 CN CN201780094188.2A patent/CN111033750B/zh active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100276732A1 (en) * | 2007-12-26 | 2010-11-04 | Yuji Ando | Semiconductor device |
| US20140264379A1 (en) * | 2013-03-15 | 2014-09-18 | The Government Of The United States Of America, As Represented By The Secretary Of The Navy | III-Nitride P-Channel Field Effect Transistor with Hole Carriers in the Channel |
| US20150303290A1 (en) * | 2014-04-21 | 2015-10-22 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor device and method of manufacturing the semiconductor device |
Non-Patent Citations (1)
| Title |
|---|
| See also references of WO2019040083A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111033750B (zh) | 2023-09-01 |
| WO2019040083A1 (fr) | 2019-02-28 |
| EP3673513A1 (fr) | 2020-07-01 |
| CN111033750A (zh) | 2020-04-17 |
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| RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 29/423 20060101ALN20210303BHEP Ipc: H01L 29/15 20060101ALI20210303BHEP Ipc: H01L 29/20 20060101ALI20210303BHEP Ipc: H01L 29/778 20060101AFI20210303BHEP |
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