Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
  • H10P72/0604—Process monitoring, e.g. flow or thickness monitoring
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
  • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
  • B23K26/03—Observing, e.g. monitoring, the workpiece
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
  • B23K26/02—Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
  • B23K26/03—Observing, e.g. monitoring, the workpiece
  • B23K26/032—Observing, e.g. monitoring, the workpiece using optical means
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
  • B23K26/36—Removing material
  • B23K26/38—Removing material by boring or cutting
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
  • B23K26/50—Working by transmitting the laser beam through or within the workpiece
  • B23K26/53—Working by transmitting the laser beam through or within the workpiece for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
  • H10P52/40—Chemomechanical polishing [CMP]
  • H10P52/402—Chemomechanical polishing [CMP] of semiconductor materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/04—Apparatus for manufacture or treatment
  • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
  • H10P72/0616—Monitoring of warpages, curvatures, damages, defects or the like
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
  • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
  • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
  • H10P72/78—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using vacuum or suction, e.g. Bernoulli chucks
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
  • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
  • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
  • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K2101/00—Articles made by soldering, welding or cutting
  • B23K2101/36—Electric or electronic devices
  • B23K2101/40—Semiconductor devices
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
  • B23K2103/00—Materials to be soldered, welded or cut
  • B23K2103/50—Inorganic materials other than metals or composite materials
  • B23K2103/56—Inorganic materials other than metals or composite materials being semiconducting
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
  • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
  • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
  • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
  • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
  • H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

Definitions

• Various embodiments described in the present disclosure can provide benefits such as, among other things, improved wafer processing yield, maintaining or improving vacuum hold during the wafer thinning process, improved wafer edge profile after wafer thinning process, among other things.
• the improved wafer processing yield in turn ensures and improves the performance and yield of semiconductor wafers.
• Wafer modification region 420 can be formed from front surface 402A of wafer 400 and have a modification depth d as measured from wafer front surface 402A.
• modification depth d is equal to or greater than defect depth t such that when semiconductor wafer 400 is being thinned from wafer back surface 402B, the back grinder cup wheel of the wafer thinning apparatus is in contact with wafer modification region 420 before it forms contact with wafer defects 403.
• a ratio B of modification depth d over substrate thickness T can be between about 1%and about 80%.
• ratio B of d/T can be between about 1%and about 20%, between about 20%and about 50%, between about 50%and about 80%, or any suitable ratio.
• a grinding process 510 can be applied to back surface 502B to reduce the thickness of wafer 500.
• a back grinder cup wheel 530 is pressed against substrate 502 and is rotated at a nominal rotational speed. Similar to the grinding process described in Fig. 3, the relative lateral movement between back grinder cup wheel 530 and wafer 500 as well as the downward pressure from back grinder cup wheel 530 can remove material from substrate 502.
• Wafer modification station 700 can include processing chamber 702, wafer holder 719, spin base 725, modifier 730, arm 735, and motor 740.
• Modifier 730 can be any suitable wafer-modifying apparatus that can modify physical or chemical properties of selective regions of a semiconductor wafer.
• Wafer modification station 700 can further include detectors 780a-780c positioned around processing chamber 702 to detect wafer characteristics, such as properties of wafer edge defects.
• a processing system 790 can receive the detected wafer characteristics via communication channels 792 and generate wafer profiles.
• wafer profiles can include metrological data of the wafer.
• the wafer profiles can include the dimension, material composition, defect type and location, as well as any other suitable information customized for each individual wafer.
• the wafer profiles can be selected from a database of wafer profiles based on the characteristics of the individual wafers.
• method 900 begins with operation 910 that includes transferring a wafer to a wafer modification chamber of a wafer modification station, according to some embodiments.
• a wafer 710 is positioned in processing chamber 702.
• Wafer 710 can be secured onto a wafer holder 719 using a clamp, a vacuum chuck, adhesive tape, or the like.
• wafer 710 can include semiconductor dies 704 formed on a front surface of wafer 710.
• Wafer holder 719 is further attached to a spin base 725 of wafer modification station 700.
• wafer holder 719 can spin semiconductor wafer 710 via spin base 725 during a wafer modification process at different rotational speeds.
• semiconductor wafer 710 can be rotated at any suitable rotational speed.
• semiconductor wafer 710 can be rotated at about 300 rpm, 500 rpm, 1000 rpm, 2000 rpm, or any suitable rotational speed.
• detectors 780a-780c are positioned around sidewalls and/or top/bottom walls of wafer modification chamber 702.
• Data representing the characteristics of the detected wafer edge defects can be transmitted to processing system 790 which can determine whether the wafer edge defects are below a variation threshold, such as whether the detected wafer edge defects are excessive (e.g., extending into semiconductor dies 704) .
• processing system 790 proceeds to create wafer modification profiles for forming wafer modification regions in semiconductor wafer 710.
• processing system 790 can proceed to alert a user or select dies to be sacrificed.
• detectors 780a-780c can be installed in a detector chamber that is configured to detect wafer characteristics before semiconductor wafer 710 is transported into wafer modification chamber 702.
• detectors 780a-780c can be a laser thickness sensor, optical profiler, step profiler, multi-wavelength ellipsometer, ion beam analyzer, and/or any other suitable detectors or combinations thereof.
• detectors 780a-780c can each be a charge-coupled device (CCD) camera that is a component of a CCD-based image detection system.
• CCD charge-coupled device
• photocells, or other such automated detecting apparatus that detect an image of an area presented thereto can also be used.
• detectors 780a-780c can include at least one CCD monochrome or color camera, depending on the process being inspected. Therefore, detectors 780a-780c can each be configured to produce one or more high-resolution images of the wafer and provide the high-resolution images to a user or a processing system.
• a processing system 790 can be electrically connected to detectors 780a-780c and wafer modification chamber 702 through communication channels 792.
• Processing system 790 can include processing circuitry and software for analyzing signals produced by detectors 780a-780c and generate wafer profiles using the signals.
• Communication channels 792 can be any suitable wiring, fiber optics or wireless technology for transmitting signals.
• the generated wafer profiles can be suitable for viewing by a user. For example, the resulting wafer profiles can be displayed on processing system 790 or a viewing device such as a computer monitor located at, for example, an operator work station.
• the generated wafer profiles can include information such as the location, depth, width, and type of wafer edge defects that are in the perimeter region of the semiconductor wafers.
• processing system 790 can determine a wafer modification recipe or processing condition suitable for the wafer.
• the wafer modification recipe can depend on the defect depth of the wafer edge defects.
• processing system 790 can set the depth of the wafer modification to be equal to or greater than the edge defect depth.
• Examples of defect depth and modification depth can be defect depth t and modification depth d described in Figs. 2A-2D and 3-5.
• the wafer modification recipe can also include information related to the position of wafer modification.
• the wafer modification can be positioned along the wafer’s circumference and within the perimeter region.
• the detectors can be operated by processing system 790 to take a one-time measurement of the wafer characteristics, or can be operated to continuously measure wafer characteristics at predetermined intervals during wafer processing. Therefore, the detectors can provide continuous monitoring of wafer processing and transmit the detected results to processing system 790 such that processing system 790 can adjust the processing recipe or conditions in real-time during the wafer modification process.
• the processing system 790 can be configured to receive extremely large data sets (e.g., big data) and computationally analyze them to reveal patterns, trends, and associations, relating to wafer edge defects and the resulting processed wafer.
• processing system 790 can receive from detectors collected data sets representing wafer edge shape, thickness, compositions, roughness, and any other suitable characteristics of the wafer, and analyze the data sets with reference to the wafer modification process.
• the data sets can be used as a feedback for processing system 790 to fine tune the wafer modification recipe in real-time or after processing such that the wafer modification process can be continuously improved, which in turn results in improved wafer processing uniformity and device yield.
• Processing system 790 can be configured to perform a variety of additional or alternative analytical tasks, such as analysis of any suitable signals, statistics processing, task scheduling, generation of alarm signals, generation of further control signals, and the like. For example, upon detection of excessive wafer edge defects, processing system 790 can be configured to generate alarm signals to alert a user. Processing system 790 can be further configured to perform a series of scheduled tasks within the wafer modification chamber to reduce wafer edge defects. In some embodiments, examples of excessive wafer edge defects can include wafer edge defects that expand into the wafer active device region. In response to the detection of excessive wafer edge defects, processing system 790 can determine appropriate next steps, such as identifying semiconductor dies that may be impacted by the wafer edge defects and adjust the path of wafer modification accordingly.
• method 900 continues with operation 940 that includes performing a wafer modification process on a semiconductor wafer based on the measured wafer characteristics, according to some embodiments.
• wafer modifications 720 can be formed on wafer 710 according to one or more wafer modification recipes.
• Wafer modification station 700 includes modifier 730 attached to arm 735.
• Processing system 790 can direct modifier 730 to perform wafer modification processes based on wafer modification profiles.
• modifier 730 can be a dicing blade configured to perform a partial dicing process, such as removing a portion of material from wafer 710 without penetrating through the entire thickness of the wafer.
• the dicing blade can penetrate into wafer 710 at a pre-set depth (e.g., modification depth d described in Figs. 4A and 4B) that is less than the wafer thickness and form a ring-shaped trench that is substantially concentric with the ring-shaped perimeter regions of wafer 710.
• modifier 730 can be a set of laser focusing lens that focuses infrared laser beams at a focal point that is inside the bulk substrate of wafer 710.
• Various parameters of modifier 730 can be adjusted such that a partial stealth laser dicing process is performed, such as penetrating a portion but not the entire thickness of wafer 710. For example, power, frequency, focus depth, number of passes, shifting distances, and any suitable parameters can be adjusted based on the physical and chemical properties of the material that forms wafer 710. Increasing the laser frequency can provide the benefit of having smoother cleaving planes.
• Fig. 8 is an illustration of wafer modification system 800, according to some embodiments.
• Wafer modification system 800 can include processing system 790, modifier controller 850, arm controller 860, and chamber controller 870, among other components.
• Wafer modification system 800 can further include other suitable components, such as additional detectors, sensors, pumps, valves, these structures are not illustrated in Fig. 8 for simplicity.
• modifier controller 850, arm controller 860, and chamber controller 870 can include any suitable computer controlled modules such as valves, motors, or wafer stages.
• the abovementioned controllers can control a variety of processing parameters based on the generated wafer profile and monitoring of the wafer modification process.
• modifier 730 can be controlled by modifier controller 850 to provide infrared laser for stealth dicing. In some embodiments, modifier 730 can be controlled by modifier controller 850 to form a trench in wafer 710 using a rotating dicing blade. In some embodiments, modifier controller 850 can control the orientation of modifier 730 with respect to a top surface of semiconductor wafer 710, the dicing blade rotational speed, the laser power and frequency, and any suitable parameters. In some embodiments, arm controller 860 can be operated to move modifier 730 to be positioned above different regions of wafer 710. In some embodiments, arm controller 860 can also control the height between modifier 730 and semiconductor wafer 710, the lateral travelling speed of modifier 730, the travelling path of modifier 730, among other parameters.
• method 900 continues with operation 950 that includes performing a wafer thinning process on a modified semiconductor wafer based on the measured wafer characteristics, according to some embodiments.
• An example of performing a wafer thinning process can be grinding process 510 performed on wafer 500 illustrated in Figs. 5 and 6 and are not described in detail herein for simplicity.
• Various embodiments described herein are directed to systems and methods for improving wafer processing yield during a wafer thinning process. More particularly, this disclosure is directed to a wafer processing system that is configured to determine wafer profiles and modify the wafer accordingly prior to the wafer thinning process, such that each wafer is customized according to the wafer profile. For example, the wafer processing system identifies defects located at the perimeter regions of the wafer and modify portions of the perimeter regions to create a barrier that prevents the defects from propagating into the device regions of the wafer during the wafer thinning process.
• modifying portions of the perimeter region can include partially cutting through the wafer along the perimeter such that a trench is formed along the perimeter.
• modifying portions of the perimeter region can include modifying physical properties of a portion of the wafer through non-invasive methods, such as stealth laser dicing.
• a method for processing a wafer includes measuring one or more wafer characteristics of the wafer using a plurality of detectors.
• the wafer includes a device region and a perimeter region.
• the method also includes determining a wafer modification profile of the wafer based on the measured one or more wafer characteristics.
• the method further includes modifying a ring-shaped portion of the wafer within the perimeter region using the wafer modification profile.
• the modified ring-shaped portion has a penetration depth that is less than a thickness of the wafer.
• the method further includes performing a wafer thinning process on the wafer.
• a method for processing a wafer includes detecting wafer edge defects at a circumference of the wafer.
• the wafer have front and back surfaces and an array of semiconductor dies on the front surface.
• the method also includes measuring one or more characteristics of the wafer edge defects, and the one or more characteristics comprise at least a defect depth.
• the method also includes modifying, from the front surface, a portion of the wafer that is between the array of semiconductor dies and the wafer edge defects. The modified portion has a penetration depth measured from the front surface and less than the defect depth.
• the method further includes performing a wafer thinning process on the back surface of the wafer.

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• Engineering & Computer Science (AREA)
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• Optics & Photonics (AREA)
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• Chemical Kinetics & Catalysis (AREA)
• General Chemical & Material Sciences (AREA)
• Oil, Petroleum & Natural Gas (AREA)
• Mechanical Treatment Of Semiconductor (AREA)
• Laser Beam Processing (AREA)
• Testing Or Measuring Of Semiconductors Or The Like (AREA)

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• 2020
  • 2020-11-19 WO PCT/CN2020/129954 patent/WO2022104622A1/en not_active Ceased
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  • 2020-11-19 JP JP2022578917A patent/JP7566052B2/ja active Active
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