EP4620042A1 - Composant optoélectronique et procédé de fabrication d'un composant optoélectronique - Google Patents

Composant optoélectronique et procédé de fabrication d'un composant optoélectronique

Info

Publication number
EP4620042A1
EP4620042A1 EP23806237.6A EP23806237A EP4620042A1 EP 4620042 A1 EP4620042 A1 EP 4620042A1 EP 23806237 A EP23806237 A EP 23806237A EP 4620042 A1 EP4620042 A1 EP 4620042A1
Authority
EP
European Patent Office
Prior art keywords
protective layer
carrier
optoelectronic component
layer
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP23806237.6A
Other languages
German (de)
English (en)
Inventor
Sebastian Wittmann
Markus Boss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
Original Assignee
Ams Osram International GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ams Osram International GmbH filed Critical Ams Osram International GmbH
Publication of EP4620042A1 publication Critical patent/EP4620042A1/fr
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H10H20/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/852—Encapsulations
    • H10H29/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/01—Manufacture or treatment
    • H10H29/036—Manufacture or treatment of packages
    • H10H29/0362—Manufacture or treatment of packages of encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/8506—Containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/8508—Package substrates, e.g. submounts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/852—Encapsulations
    • H10H29/853—Encapsulations characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0362—Manufacture or treatment of packages of encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H10H20/853—Encapsulations characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Definitions

  • An optoelectronic component is specified.
  • a method for producing an optoelectronic component is specified.
  • One problem to be solved is to provide an optoelectronic component with increased efficiency.
  • Another problem to be solved is to provide a method for producing an optoelectronic component with increased efficiency.
  • the component is, for example, a radiation-emitting optoelectronic component.
  • the optoelectronic component generates electromagnetic radiation, in particular electromagnetic radiation with a wavelength in the wavelength range between UV radiation and infrared radiation.
  • the optoelectronic component has at least one component, in particular several components, or is composed thereof.
  • the optoelectronic component comprises a carrier.
  • the carrier represents the mechanically supporting component of the optoelectronic component.
  • the remaining components of the optoelectronic component for example optical and/or electronic components.
  • the carrier serves for the mechanical fastening and/or electrical connection for optical and/or electronic components of the optoelectronic component.
  • the carrier is a connection carrier.
  • the carrier is structured.
  • a structured carrier has one or a plurality of chip connection points and/or one or a plurality of metal tracks for electrical contacting.
  • the metal track or the plurality of metal tracks can comprise Cu and/or Cu blackened with CuO, CU3N or Pd and/or Cu with various surface coatings such as NiAu or NiPdAu.
  • the optoelectronic component comprises at least one semiconductor chip on the carrier.
  • the at least one semiconductor chip is arranged on the carrier in direct or indirect contact.
  • the direct or indirect contact between the semiconductor chip and the carrier can be an electrical and/or mechanical contact.
  • the at least one semiconductor chip is arranged on a chip connection point of the carrier.
  • the semiconductor chip is attached to the carrier, in particular to a chip connection point of the carrier, by means of a solder connection, in particular by means of a solder connection that comprises a low-temperature solder system.
  • the low-temperature solder system has a melting point of below 220 °C or below 150 °C.
  • the at least one semiconductor chip comprises or consists of a diode structure, passivation layers and contacts. The contacts are in direct contact with the solder system.
  • the at least one semiconductor chip is not a package, but rather the pure semiconductor chip.
  • the at least one semiconductor chip can be a chip-scale package without polymer- or ceramic-type intermediate carriers.
  • a chip-scale package comprises, for example, an additional connection layer or a conversion layer surrounding the semiconductor chip without an additional substrate.
  • the at least one semiconductor chip is designed to emit primary radiation with a first wavelength range during operation of the optoelectronic component.
  • the semiconductor chip can comprise an active layer sequence which contains an active region which can generate the primary radiation during operation of the optoelectronic component.
  • Primary radiation here and below refers to electromagnetic radiation of a first wavelength or a first wavelength range which is emitted by the semiconductor chip.
  • the semiconductor chip is, for example, a light-emitting diode chip or a laser diode chip.
  • the at least one semiconductor chip emits blue primary radiation, green primary radiation, yellow primary radiation or red primary radiation.
  • a chip-scale assembly can generate a secondary radiation with a second wavelength range.
  • the conversion layer can convert the primary radiation partially or completely into secondary radiation.
  • the non-converted part of the primary radiation is transmitted through the conversion layer.
  • the chip-scale assembly emits a mixed light that is made up of the primary radiation and the secondary radiation.
  • the chip-scale assembly emits white light that is made up of primary radiation in the blue spectral range and secondary radiation in the red spectral range. In the case of full conversion, no primary radiation is transmitted through the conversion layer.
  • non-scale means that so little primary radiation is transmitted that it no longer perceptibly influences the light emitted by the chip-scale assembly. For example, a maximum of 10%, in particular a maximum of 5% and preferably a maximum of 1% of the primary radiation is transmitted through the conversion layer.
  • the chip-scale assembly then emits only the secondary radiation. For example, the chip-scale assembly emits yellow or red light without any blue component.
  • the optoelectronic component comprises a protective layer on the at least one semiconductor chip.
  • the protective layer is designed to protect the components of the optoelectronic component arranged underneath, for example the at least one semiconductor chip and/or the carrier and/or a chip connection point, from mechanical and/or short-term thermal effects.
  • the protective layer is designed as a heat-insulating layer.
  • heat-insulating means that heat, which strikes one side of the protective layer does not reach an opposite side of the protective layer, or only does so to a small extent.
  • the protective layer transmits a maximum of 50%, a maximum of 40%, a maximum of 30%, a maximum of 20%, a maximum of 10%, a maximum of 5% or a maximum of 1% of the incident heat.
  • the protective layer can have a low thermal conductivity.
  • the protective layer can be designed to protect the components of the optoelectronic component arranged underneath, in particular the semiconductor chip, from corrosion. In this case, the protective layer can prevent or limit the penetration of corrosive compounds, for example corrosive gases or moisture.
  • the optoelectronic component comprises a potting on the protective layer.
  • a potting serves to protect the components, in particular the components arranged under the potting, of the optoelectronic component from external influences.
  • the potting can be arranged in direct mechanical contact on the protective layer.
  • further elements, such as layers, can be arranged between the protective layer and the potting.
  • the potting has a thickness of 500 pm inclusive to 1 cm inclusive, for example 700 pm.
  • the optoelectronic component comprises a carrier, at least one semiconductor chip on the carrier, a protective layer on the at least one semiconductor chip and an encapsulation on the protective layer.
  • the optoelectronic component is based on the following considerations, among others.
  • high forces and temperatures act on the semiconductor chip, the carrier, and the connection between the semiconductor chip and the carrier.
  • solder materials are used for the connection between the semiconductor chip and the carrier, the shear forces of the semiconductor chip are minimal at the potting temperatures used, since the solder material used can melt.
  • the force and temperature effects can be significantly reduced by the protective layer over the at least one semiconductor chip, so that one or more semiconductor chips on a carrier can be integrated into a potting compound without damaging the carrier, the semiconductor chip, and its connection to the carrier.
  • This advantageously makes it possible to provide miniaturized optoelectronic components, for example for automotive trim parts or trim parts.
  • the protective layer in the optoelectronic components provides additional corrosion protection and thus advantageously extends the service life of the optoelectronic component.
  • the carrier is designed to be flexible.
  • the carrier is not a rigid carrier.
  • a flexible carrier is designed to be flexible and/or elastic and/or deformable in at least one spatial direction.
  • a flexible carrier can advantageously bend or deform under the influence of external forces, for example bending stress, without losing its structural integrity, in particular without becoming damaged.
  • the carrier is a film.
  • a film is understood to mean a homogeneous flat structure, for example made of plastic.
  • a carrier designed as a film is flexible.
  • the carrier is a 2D or 2.5D shaped film.
  • a 2D shaped film is a flat film that extends in two spatial directions.
  • a 2.5D shaped film is a two-dimensional film that is bent along an axis. In other words, a 2.5D shaped film is bent but not plastically deformed.
  • a carrier designed as a film can advantageously bend or deform under the influence of external forces, for example bending stress, without losing its structural integrity, in particular without being damaged.
  • the carrier comprises a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone.
  • Structured in the context of a carrier material means that the material has one or a plurality of chip connection points and/or one or a plurality of metal tracks, for example Cu tracks, for electrical contact.
  • the carrier consists of a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone.
  • the carrier comprises a structured film made of one of these materials or consists of it. Polyethylene terephthalate, polyimide, polymethyl methacrylate, Polycarbonate and silicone are particularly suitable for the production of flexible, structured films.
  • the carrier comprises or consists of structured polyethylene terephthalate (PET).
  • PET polyethylene terephthalate
  • Polyethylene terephthalate is advantageously suitable for maintaining adhesion to the protective layer even under bending stress.
  • the thickness of the carrier is in the range from 15 pm to 200 pm inclusive, in particular in the range from 50 pm to 100 pm inclusive, for example 100 pm.
  • a carrier in particular a flexible carrier with a thickness in the range from 50 pm to 200 pm inclusive, can advantageously be used in roll-to-roll processes.
  • the thickness of the at least one semiconductor chip is 80 pm. According to at least one further embodiment, the thickness of the at least one semiconductor chip is less than 10 pm, for example 6 pm or 7 pm.
  • the thickness of a semiconductor chip is understood here to mean the extent of the semiconductor chip perpendicular to the extension plane of the carrier. In other words, the thickness of the semiconductor chip is the height of the semiconductor chip above the carrier.
  • Micro LEDs can have a width, a length, a thickness and/or a diameter of less than or equal to 100 pm, in particular less than or equal to 70 pm, for example less than or equal to 50 pm.
  • micro LEDs for example rectangular micro LEDs, have an edge length, in particular in plan view of the layers of the layer stack, of a luminous area of less than or equal to 70 pm, for example less than or equal to 50 pm.
  • a micro LED is, for example, a light emitting diode in which a growth substrate has been removed, so that a thickness of the micro LED is, for example, in the range from 1.5 pm inclusive to 10 pm inclusive.
  • the protective layer comprises a polysiloxane, a polyurethane, an acrylate, an epoxy or a combination thereof.
  • the protective layer consists of a polysiloxane, a polyurethane, an acrylate, an epoxy or a combination thereof.
  • Polysiloxanes, polyurethanes, acrylates and epoxies can offer good corrosion protection while simultaneously providing thermal insulation.
  • the protective layer comprises or consists of a polysiloxane.
  • a polysiloxane is a polymer in which silicon atoms are linked via oxygen atoms.
  • Polysiloxanes have individual siloxane units.
  • Polysiloxanes can have M units, D units, T units and Q units.
  • the letters M (mono), D (di), T (tri) and Q (quatro) stand for the number of oxygen atoms that are linked to a silicon atom. M units therefore have one oxygen atom, D units two, T units three and Q units four.
  • the greater the number of oxygen atoms bonded to a silicon atom the stronger the cross-linking of the polysiloxane network can be.
  • the protective layer comprises a polysiloxane that has only M units and D units. Such a polysiloxane is advantageously flexible.
  • the protective layer comprises a silicone or consists thereof.
  • a silicone is understood to mean a polysiloxane that only has M units and D units in its network.
  • a protective layer that comprises a silicone is advantageously flexible and provides both mechanical protection and corrosion protection.
  • the protective layer has a high level of stability against blue radiation, which means that the service life of the optoelectronic component can be extended while maintaining the same optical properties.
  • the silicone of the protective layer is an addition-crosslinked silicone.
  • the silicone of the protective layer is not a condensation-crosslinked silicone. In contrast to condensation reactions, no water is formed in addition reactions.
  • a protective layer made of an addition-crosslinked silicone therefore contains less water than layers made of condensation-crosslinked silicone. This can increase the corrosion protection provided by the protective layer.
  • the protective layer is designed to be flexible. In other words, the protective layer is not a rigid protective layer.
  • a flexible protective layer is designed to be flexible and/or elastic and/or deformable in at least one spatial direction. A flexible protective layer can advantageously maintain its adhesion to the carrier under the action of external forces, for example bending stress, without delamination of the protective layer from the carrier taking place.
  • the protective layer has a surface resistance of at least 1 - 10 14 Q, for example 2 - 10 14 Q.
  • the surface resistance of a layer is a measure of the insulating effect of the layer. The higher the surface resistance of a layer, the higher the insulating effect of the layer.
  • the protective layer advantageously has a high surface resistance and thus a good insulating effect.
  • the protective layer is designed to protect components of the optoelectronic component arranged underneath, in particular the at least one semiconductor chip, from corrosive compounds.
  • the protective layer has a high moisture resistance or insulation resistance.
  • the moisture resistance or insulation resistance is a measure of the amount of water absorbed by a component. The more water a component has absorbed, the higher the electrical conductivity and the lower the electrical resistance.
  • a high moisture resistance or insulation resistance therefore means that the protective layer absorbs no or only a small amount of water and thus advantageously protects the components of the optoelectronic device arranged underneath from water.
  • the protective layer is transparent to electromagnetic radiation.
  • a transparent protective layer is permeable to electromagnetic radiation.
  • the protective layer transmits incident electromagnetic radiation.
  • the protective layer transmits incident electromagnetic radiation to at least 80%, 90%, 95% or 99%.
  • the protective layer is transparent to electromagnetic radiation emitted by the optoelectronic component during operation.
  • the protective layer is transparent to the primary radiation emitted by the at least one semiconductor chip. The protective layer therefore advantageously does not influence the optical properties of the optoelectronic component.
  • the protective layer does not change the properties of electromagnetic radiation, in particular not the properties of the primary radiation.
  • the properties of electromagnetic radiation transmitted through the protective layer such as wavelength, intensity and direction, do not change as a result of the transmission.
  • the radiation has the same properties after transmission through the protective layer as before entering the protective layer.
  • the electromagnetic radiation has the same wavelength before and after transmission through the protective layer.
  • the electromagnetic radiation is not converted by the protective layer.
  • the electromagnetic radiation can have the same intensity before and after transmission through the protective layer.
  • the electromagnetic radiation is not absorbed by the protective layer.
  • the electromagnetic radiation can have the same direction before and after transmission through the protective layer. In other words, the electromagnetic radiation is not scattered by the protective layer.
  • the protective layer advantageously does not influence the optical properties of the optoelectronic component.
  • the protective layer does not absorb any electromagnetic radiation in the visible range of the electromagnetic spectrum.
  • “none” means that so little of the incident electromagnetic radiation is absorbed by the protective layer that the electromagnetic radiation is not perceptibly influenced in its intensity. For example, at most 10%, in particular at most 5% and preferably at most 1% of the incident electromagnetic radiation is absorbed by the protective layer.
  • the protective layer therefore advantageously does not influence the optical properties of the optoelectronic component.
  • the protective layer is free of scattering particles, conversion material, fillers, nanoparticles and/or particles for adjusting a refractive index.
  • the protective layer thus influences advantageously the optical properties of the optoelectronic component are not .
  • the protective layer is not a conversion layer.
  • the protective layer is not a layer that comprises a conversion material in a matrix material.
  • a protective layer that is not a conversion layer advantageously offers protection against the penetration of corrosive gases.
  • the protective layer completely covers the at least one semiconductor chip.
  • the protective layer covers the surfaces of the at least one semiconductor chip that are free from the carrier.
  • the protective layer is designed such that there is no direct mechanical contact between the at least one semiconductor chip and the encapsulation.
  • the protective layer can advantageously prevent diffusion paths for corrosive compounds along the edges of the semiconductor chip.
  • the thickness of the protective layer on the at least one semiconductor chip is at least 40 pm. It should be noted in particular that the thickness of the protective layer on the at least one semiconductor chip is only limited for commercial and integration reasons. In particular, as the thickness of the protective layer increases, the thickness of the optoelectronic component also increases. This can make it more difficult to integrate the components in application systems, in particular in application systems with little installation space.
  • the thickness of the protective layer on the at least one semiconductor chip is at least 40 pm and at most 500 pm, in particular at least 40 pm and at most 300 pm. A thickness of the protective layer of at least 40 pm on the at least one semiconductor chip prevents diffusion paths along the edges of the semiconductor chip.
  • the protective layer advantageously forms a barrier against water vapor and corrosive gases in the optoelectronic component.
  • it advantageously protects the at least one semiconductor chip, the carrier and the connection of the at least one semiconductor chip to the carrier from heat.
  • the at least one semiconductor chip is completely enclosed by the carrier and the protective layer. In other words, all sides of the at least one semiconductor chip are covered by the carrier and/or the protective layer.
  • the direct mechanical contact between the carrier and the protective layer extends completely around the semiconductor chip.
  • the carrier and the protective layer form a cavity in which the at least one semiconductor chip is arranged.
  • the at least one semiconductor chip is arranged on the carrier and embedded in the protective layer.
  • the carrier can cover one side of the semiconductor chip and the protective layer can cover the other sides of the semiconductor chip.
  • a thickness of the protective layer between the carrier and the encapsulation corresponds to the thickness of the protective layer on the semiconductor chip and the thickness of the semiconductor chip.
  • the thickness of the at least one semiconductor chip is 80 pm and the thickness of the protective layer on the semiconductor chip is at least 40 pm, so that the thickness of the The protective layer between the carrier and the encapsulation is at least 120 gm.
  • the at least one semiconductor chip comprises a plurality of semiconductor chips.
  • a plurality of semiconductor chips comprises at least two semiconductor chips, in particular at least 50 semiconductor chips, preferably at least 100 semiconductor chips, for example at least 150 semiconductor chips.
  • the plurality of semiconductor chips comprises at most 50,000 semiconductor chips, in particular at most 10,000 semiconductor chips, for example at most 2,000 semiconductor chips.
  • each of the semiconductor chips of the plurality of semiconductor chips is individually enclosed by the carrier and the protective layer, in particular completely.
  • the protective layer is designed such that each semiconductor chip is embedded in the protective layer on its own.
  • the protective layer between the semiconductor chips is in direct contact with the carrier.
  • the light yield of the optoelectronic component can advantageously be increased by a plurality of semiconductor chips on the carrier.
  • the distance between two semiconductor chips of the plurality of semiconductor chips is between 0.1 mm inclusive and 5 mm inclusive.
  • the distance between semiconductor chips with a thickness of 80 gm can be between 40 gm inclusive and 50 gm inclusive.
  • the distance between the semiconductor chips leads in particular to the protective layer between the semiconductor chips being in direct contact with the carrier, which advantageously reduces the mechanical can enhance the protective effect and corrosion protection of the protective layer.
  • the encapsulation comprises a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC) or a polyamide.
  • the encapsulation consists of a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC) or a polyamide.
  • the protective layer is embedded in the encapsulation.
  • the encapsulation covers a side of the protective layer facing away from the carrier as well as the lateral sides of the protective layer.
  • the protective layer is enclosed or enclosed by the encapsulation and the carrier, in particular completely.
  • the at least one semiconductor chip is also embedded in the encapsulation.
  • the protective layer and the at least one semiconductor chip can be integrated into the encapsulation. Embedding the protective layer in the encapsulation leads to integration of the at least one semiconductor chip in the encapsulation and can advantageously increase the stability of the optoelectronic component.
  • the encapsulation is produced on the protective layer.
  • the production of the encapsulation on the protective layer results in particular in the protective layer being embedded or integrated in the encapsulation.
  • "Producing the encapsulation on the protective layer” does not mean in particular that the carrier, semiconductor chip and protective layer are attached to an already formed and shaped encapsulation, for example via adhesive layers.
  • the encapsulation when produced on the protective layer, the encapsulation only acquires its strength and shape when the encapsulation material in Contact with the component that contains the protective layer.
  • the creation of the encapsulation on the protective layer enables a direct integration of the carrier, semiconductor chip and protective layer into the encapsulation without fastening means such as adhesive layers.
  • the encapsulation can be created on the protective layer using a potting process.
  • the optoelectronic component further comprises a decorative layer on a side of the encapsulation facing away from the protective layer.
  • the decorative layer comprises one or more layers.
  • the side of the encapsulation facing away from the protective layer is in particular a side of the optoelectronic component that is visible to an external observer.
  • a decorative layer arranged on this side can functionalize the optoelectronic component for the desired application, for example optically.
  • the decorative layer has a carbon optic print or a root wood foil print.
  • the decorative layer can be semi-transparent and/or structured.
  • the decorative layer can define a symbol or logo via a structuring that becomes visible when the optoelectronic component is in operation.
  • the optoelectronic component further comprises at least one component.
  • the at least one component is arranged on the carrier, for example adjacent to the at least one semiconductor chip.
  • the at least one component comprises, for example, a sensor and/or a component with detection functions or touch functions.
  • the at least one component has a similar topography to the at least one semiconductor chip.
  • the at least one component has a smaller, a similar or the same thickness as the semiconductor chip.
  • the component can have a greater thickness than the semiconductor chip.
  • the thickness of the protective layer on the thickest component is at least 40 pm.
  • the optoelectronic component further comprises a cover layer on a side of the protective layer facing away from the carrier.
  • the cover layer in particular completely covers a surface of the protective layer facing away from the carrier.
  • the protective layer is enclosed by the cover layer and the carrier, in particular completely.
  • the carrier, the protective layer and the cover layer form a sandwich structure.
  • the cover layer is flexible.
  • the cover layer is a film.
  • the covering layer can be arranged between the protective layer and the casting.
  • the cover layer comprises polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone.
  • the cover layer consists of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), Polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PI polyimide
  • cPI colorless polyimide
  • PC polycarbonate
  • Such a cover layer can advantageously have particularly good adhesion to the material of the casting.
  • the cover layer comprises polyethylene terephthalate (PET) or consists of it.
  • An optoelectronic component with a covering layer made of polyethylene terephthalate (PET) can be manufactured particularly cost-effectively.
  • the cover layer and the carrier comprise different materials.
  • the carrier comprises polyethylene terephthalate (PET) and the cover layer comprises polycarbonate (PC).
  • cover layer and the carrier comprise the same material.
  • the cover layer and the carrier comprise polyethylene terephthalate (PET).
  • an adhesive layer is arranged between the cover layer and the protective layer.
  • the adhesive layer provides a connection between the protective layer and the cover layer.
  • the adhesive layer is in direct mechanical contact with the protective layer and the cover layer.
  • the adhesive layer comprises a material that is suitable as an adhesive material for low-energy surfaces, such as silicone surfaces.
  • the adhesive layer comprises a polysiloxane adhesive.
  • the cover layer has at least one interface with the carrier.
  • the cover layer and the carrier are in direct mechanical contact at least in places.
  • the interface forms a frame which surrounds a surface of the
  • the at least one semiconductor chip and optionally present components of the optoelectronic component are arranged on the enclosed surface of the carrier.
  • the cover layer and the carrier are connected at least in places at the at least one interface with a welded connection, for example with a weld seam.
  • a welded connection is understood here and below to mean a mechanical connection that cannot be released without destruction and that is created between the carrier and the cover layer under external influences, for example ultrasound, laser radiation, heat and/or pressure.
  • a weld seam is understood here and below to mean a welded connection along a connecting line or connecting curve that connects the cover layer and the carrier to one another, in particular along the interface.
  • the cover layer and the carrier are connected along their entire interface with a welded connection, with areas of the electrical contacts, for example the Cu conductor tracks, that lead through the interface being excluded from the welded connection.
  • cover layer and the carrier are connected along the entire frame formed by the interface with a welded connection, with areas of the electrical contacts, for example the Cu conductor tracks, which pass through the interface being excluded from the welded connection.
  • a welded connection between the cover layer and the carrier advantageously increases the stability of the connection between the cover layer and the carrier.
  • a method for producing an optoelectronic component is also specified. The method described here is preferably used to produce the optoelectronic component in accordance with the above-mentioned embodiments. In particular, all statements made for the optoelectronic component also apply to the method and vice versa.
  • the method for producing an optoelectronic component comprises providing a carrier.
  • the carrier is a flexible carrier, for example a film.
  • the method comprises arranging at least one semiconductor chip on the carrier, in particular on a chip connection point of the carrier.
  • the semiconductor chip is attached to the carrier, in particular on a chip connection point of the carrier, using a solder material.
  • the method comprises applying a protective layer to the at least one semiconductor chip.
  • the protective layer is applied using a printing method, a spraying method or a laminating method.
  • the protective layer is applied using a stencil printing method, a screen printing method, a spray coating method or a dispensing method.
  • the method comprises applying a potting compound to the protective layer.
  • the potting compound is applied using a potting process
  • the casting is done via In-Mould
  • the method for producing an optoelectronic component comprises providing a carrier, arranging at least one semiconductor chip on the carrier, applying a protective layer on the at least one semiconductor chip and applying an encapsulation on the protective layer.
  • the protective layer acts as thermal insulation and can thermally decouple areas above and below the protective layer from one another, so that different temperatures prevail above and below the protective layer. This makes it possible to reduce the forces and temperatures acting on the carrier, on the at least one semiconductor chip and on the connection between the semiconductor chip and the carrier during the formation of the encapsulation.
  • an injection molding process with materials that require high temperatures such as polymethyl methacrylate (PMMA) or polycarbonate (PC), with encapsulation temperatures of more than 220 °C, for example 300 °C, can be used without damaging at least the semiconductor chip, the carrier and the connection between the semiconductor chip and the carrier.
  • PMMA polymethyl methacrylate
  • PC polycarbonate
  • the potting compound is applied directly to the protective layer.
  • the potting compound is applied directly to the protective layer if the potting material adheres well to the protective layer.
  • a Direct application of the casting onto the protective layer is advantageously simple and cost-effective.
  • a side of the carrier facing away from the at least one semiconductor chip is cooled during the application of the encapsulation.
  • the cooling takes place via a cooling circuit with water.
  • the cooling can take place constantly or in a pulsed mode and can be controlled via a valve.
  • the side of the carrier facing away from the at least one semiconductor chip is cooled to 80 ° C to 90 ° C.
  • the cooling of the carrier serves to keep the connection between the at least one semiconductor chip and the carrier at a temperature during the application of the encapsulation at which the connection between the semiconductor chip and the carrier remains stable.
  • the temperature of the connection between the semiconductor chip and the carrier can advantageously be kept at a temperature that is lower than the melting temperature of the solder material.
  • the thermal insulation provided by the protective layer simultaneously advantageously means that the application of the encapsulation at the temperatures required for this on the protective layer is not impaired by the cooling of the side of the carrier facing away from the semiconductor chip.
  • the method further comprises, prior to the application of the encapsulation, the application of an adhesive layer on the protective layer and the application of a cover layer on the adhesive layer.
  • a sandwich structure is formed from the carrier, the protective layer and the cover layer.
  • the Cover layer a material that is compatible with the material of the casting.
  • the method comprises, before applying the encapsulation, applying an adhesive layer to a cover layer and applying the adhesive layer with the cover layer to the protective layer.
  • the adhesive layer and cover layer are applied as a composite.
  • the composite is applied with the side of the adhesive layer to the protective layer so that the adhesive layer is in direct contact with the protective layer.
  • a polysiloxane adhesive can be applied to a polyethylene terephthalate film and then the composite of the film with the already applied adhesive can be applied with the adhesive side to the protective layer.
  • the cover layer and/or the carrier can deform or warp.
  • the deformation or warping can be more pronounced in the cover layer than in the carrier.
  • the adhesive layer ensures in particular that the cover layer does not lose its connection to the protective layer during the application of the casting.
  • the cover layer is applied to the protective layer in such a way that the cover layer has at least one interface with the carrier.
  • the cover layer is applied in such a way that the interface forms a frame which surrounds a surface of the Carrier, for example the surface of the carrier on which the at least one semiconductor chip and optionally present components of the optoelectronic component are arranged.
  • the method further comprises producing a welded connection at at least one interface between the cover layer and the carrier.
  • a welded connection is produced at the entire interface between the cover layer and the carrier, with regions of the electrical contacts, for example the Cu conductor tracks, which lead through the interface being excluded from the welded connection.
  • the welded connection is produced via plastic welding, for example ultrasonic welding or laser welding.
  • a welded connection at the interface between the cover layer and the carrier strengthens the interface and advantageously improves the connection between the carrier and the cover layer.
  • Figures 1 to 5 each show a schematic representation of an optoelectronic component according to various embodiments and Figures 6A to 6C and Figures 7A to 7C each show a schematic representation of a method for Production of an optoelectronic component according to various embodiments.
  • FIGS 1 to 5 each show a schematic sectional view of an optoelectronic component 1.
  • the optoelectronic components 1 each comprise a carrier 2, at least one semiconductor chip 3, a protective layer 4 and a potting compound 5.
  • the carrier 2 is structured and has at least one chip connection point and/or at least one metal track.
  • the carrier 2 is in particular flexible and can comprise or consist of a structured film.
  • the carrier 2 can comprise a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PI polyimide
  • cPI colorless polyimide
  • PMMA polymethyl methacrylate
  • PC polycarbonate
  • silicone silicone.
  • the carrier 2 is a structured polyethylene terephthalate film with a thickness of 100 pm.
  • the semiconductor chips 3 are connected by means of a solder connection, in particular by means of a solder connection comprising a low-temperature solder system, on the carrier 2, in particular on chip connection points of the carrier 2.
  • the solder system comprises an SnBi solder system with a melting point of 138 °C.
  • the solder system comprises an SAC solder system with a melting point of 217 °C.
  • An SAC solder system can advantageously be used in combination with a polyimide carrier or a polyethylene terephthalate carrier in photonic soldering.
  • the semiconductor chips 3 are in particular pure semiconductor chips or chip-scale assemblies without polymer or ceramic-type intermediate carriers.
  • the semiconductor chips 3 have dimensions of 90x150x80 pm 3 .
  • the thickness of the semiconductor chips, i.e. the height above the carrier, can be 80 pm.
  • the protective layer 4 is arranged on the carrier 2 such that it covers, in particular encloses, the semiconductor chips 3.
  • the thickness of the protective layer 4 on the semiconductor chip is at least 40 pm.
  • the thickness of the protective layer 4 above the carrier 2 depends on the thickness of the semiconductor chips 3 and is, for example, at least 120 pm for semiconductor chips 3 that are 80 pm thick.
  • the protective layer 4 can comprise a polysiloxane, a polyurethane, an acrylate, an epoxy or a combination thereof.
  • the protective layer 4 is a silicone, for example the silicone DSL 1705 or VT3602 from Peters with a thickness of at least 120 pm.
  • the protective layer 4 is designed to be
  • the protective layer 4 is designed to protect the semiconductor chips 3 against corrosion by preventing or limiting the penetration of corrosive compounds, for example corrosive gases or moisture.
  • the encapsulation 5 is arranged on the protective layer 4.
  • the encapsulation 5 covers the sides of the protective layer 4 that are not covered by the carrier 2.
  • the protective layer 4 is thus embedded or integrated in the encapsulation 5.
  • the encapsulation 5 can comprise a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC) or a polyamide.
  • the encapsulation 5 is a silicone, in particular the silicone LPS-3570M from Shin-Etsu, with a thickness of 700 pm.
  • the encapsulation is a polymethyl methacrylate with a thickness of 700 pm.
  • the encapsulation is a polycarbonate with a thickness of 700 pm.
  • the optoelectronic component 1 of Figure 2 differs from the optoelectronic component 1 of Figure 1 in that it has a decorative layer 6 on the side of the encapsulation that faces away from the protective layer.
  • the decorative layer can be semi-transparent or structured, for example, and can consist of one or more layers.
  • the arrow in Figure 2 indicates the direction of radiation emitted by the semiconductor chips 3.
  • the optoelectronic component 1 of Figure 3 differs from the optoelectronic component 1 of Figure 1 in that it has a component 7 which is arranged on the carrier 2, preferably adjacent to the semiconductor chips 3.
  • the component 7 is, for example, a sensor and/or a component with detection functions or touch functions.
  • the optoelectronic component 1 can have further components 7 with the same or other functions (not shown here).
  • the thickness of the component 7 is similar to the thickness of the semiconductor chips 3.
  • the component 7 may have a greater thickness than the semiconductor chips 3.
  • the thickness of the protective layer above the thickest component 7 is at least 40 pm.
  • the optoelectronic component 1 of Figure 4 differs from the optoelectronic component 1 of Figure 1 in that a cover layer 10 is arranged between the protective layer 4 and the encapsulation 5.
  • the cover layer 10 is attached to the protective layer 4 with an adhesive layer 11.
  • the cover layer 10 has an interface 12 with the carrier 2.
  • the interface 12 can extend like a frame around a region of the carrier 2, in particular around the region of the carrier 2 on which the semiconductor chips 3 and optional components 7 are arranged.
  • the cover layer 10 and the carrier 2 can be connected to one another at the interface 12 with a welded connection.
  • the casting 5 can cover the area facing away from the protective layer 4.
  • the cover layer 10 may comprise a material which is compatible with the material of the encapsulation 5, such that there is a high level of adhesion and bonding between the cover layer 10 and the encapsulation 5.
  • the cover layer 10 is a polyethylene terephthalate film.
  • the optoelectronic component 1 of Figure 5 differs from the optoelectronic component 1 of Figure 4 in that it has a decorative layer 6 on the side of the encapsulation that faces away from the protective layer.
  • the decorative layer can be semi-transparent or structured, for example.
  • Figures 6A to 6C show a method for producing the optoelectronic component 1 of Figure 1.
  • a carrier 2 for example a structured polyethylene terephthalate film.
  • Semiconductor chips 3 are arranged on the carrier 2.
  • the semiconductor chips 3 are soldered to a chip connection point of the carrier.
  • a protective layer 4 is applied to the semiconductor chips 3, for example made of a silicone by means of a stencil printing process ( Figure 6A).
  • Figure 6B shows the application of the encapsulation 5, for example a silicone.
  • the encapsulation 5 can be applied using a encapsulation process such as in-mold decoration (IMD), injection molding or compression molding.
  • IMD in-mold decoration
  • the application of the encapsulation requires temperatures of at least 220 ° C, for example 300 ° C. At these temperatures, in particular the solder material used to connect the semiconductor chip 3 to the carrier 2, for example an SnBi solder, can melt, whereby the shear forces of the semiconductor chip 3 are minimal.
  • the protective layer 4 acts, for example due to its thickness, as thermal insulation and minimizes the thermal load on the semiconductor chip 3, the carrier 2, in particular the metal tracks of the carrier 2, and the connection between the semiconductor chip 3 and the carrier 2.
  • the forces and temperatures acting during the application of the encapsulation 5, in particular on the solder material, are significantly reduced, so that the semiconductor chips 3 can be integrated into the optoelectronic component 1 without detaching from the carrier 2 during the application of the encapsulation 5.
  • a potting tool 8 can be used to apply the potting compound 5, which predetermines the shape of the potting compound to be formed.
  • the potting tool can have a cooling system 9, with which the side of the carrier 2 facing away from the semiconductor chips 3 is cooled during the application of the potting compound 5.
  • the cooling can be constant or in a pulsed mode and can be controlled via a valve. For example, cooling takes place via a cooling circuit with water to a temperature of 80 ° C to 90 ° C.
  • the protective layer 4 here also acts as thermal insulation, so that the application of the potting compound 5 and the high temperatures required for this are not impaired by the cooling of the underside of the carrier 2.
  • Figure 6C shows the optoelectronic component 1 produced by the method, which corresponds to the optoelectronic component 1 of Figure 1.
  • Figures 7A to 7C show a method for producing the optoelectronic component 1 of Figure 4.
  • Figure 7A shows a layer stack comprising carrier 2 , semiconductor chips 3 and protective layer 4 , which can be manufactured as described in connection with Figure 6A.
  • the method of Figures 7A to 7C differs from the method of Figures 6A to 6C in that before the potting compound 5 is applied to the protective layer 4, an adhesive layer 11 is applied to the protective layer 4 and a cover layer 10, for example a polyethylene terephthalate film, is applied to the adhesive layer 11.
  • the adhesive layer 11 can first be applied to the cover layer 10 before the adhesive layer 11 is applied to the cover layer 10 as a composite to the protective layer 4.
  • the composite is applied to the protective layer 4 with the side of the adhesive layer 11 so that the adhesive layer 11 is in direct contact with the protective layer 4.
  • a polysiloxane adhesive can be applied to a polyethylene terephthalate film and then the composite of the film with the already applied adhesive can be applied with the adhesive side to the protective layer 4 ( Figure 7B).
  • the covering layer 10 is applied in such a way that an interface 12 is formed between the carrier 2 and the covering layer 10.
  • the carrier 2 and the covering layer 10 can be connected at the interface 12 by plastic welding, for example ultrasonic welding or laser welding, with a welded joint.
  • the encapsulation 5 is then applied to the side of the cover layer 10 facing away from the protective layer 4.
  • the encapsulation can be applied as described in connection with Figure 6B.
  • the protective layer 4 arranged under the cover layer 10 protects the semiconductor chips 3 and the carrier 2 from thermal stress during the application of the encapsulation 5, while the material of the cover layer 10, due to its compatibility with the encapsulation material, leads to improved adhesion of the encapsulation 5 to the layer stack of carrier 2, semiconductor chips 3 and protective layer 4.
  • the carrier 2 and the cover layer 10, in particular the cover layer 10 can deform or warp.
  • the adhesive layer 11 between the protective layer 4 and the cover layer 10 ensures that the cover layer 10 does not delaminate during the application of the encapsulation 5.
  • FIG 7C shows the optoelectronic component 1 produced by the method, which corresponds to the optoelectronic component 1 of Figure 4.
  • the invention is not limited to the embodiments by the description. Rather, the invention includes any new feature and any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or this combination itself is not explicitly specified in the patent claims or embodiments.

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

L'invention concerne un composant optoélectronique. Dans un mode de réalisation, le composant optoélectronique comprend un support (2), au moins une puce semi-conductrice (3) sur le support (2), une couche de protection (4) sur la puce semi-conductrice (3), et une encapsulation (5) sur la couche de protection (4). En particulier, la ou les puces semi-conductrices (3) comprennent au moins une micro-DEL. L'invention concerne également un procédé de fabrication d'un composant optoélectronique.
EP23806237.6A 2022-12-15 2023-11-14 Composant optoélectronique et procédé de fabrication d'un composant optoélectronique Pending EP4620042A1 (fr)

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DE102022133373.6A DE102022133373A1 (de) 2022-12-15 2022-12-15 Optoelektronisches bauelement und verfahren zur herstellung eines optoelektronischen bauelements
PCT/EP2023/081741 WO2024125914A1 (fr) 2022-12-15 2023-11-14 Composant optoélectronique et procédé de fabrication d'un composant optoélectronique

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EP4620042A1 true EP4620042A1 (fr) 2025-09-24

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KR (1) KR20250117698A (fr)
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DE102022133373A1 (de) 2022-12-15 2024-06-20 Ams-Osram International Gmbh Optoelektronisches bauelement und verfahren zur herstellung eines optoelektronischen bauelements
DE102024131728A1 (de) * 2024-10-30 2026-04-30 Ams-Osram International Gmbh Spritzgusskörper mit formflexibler optoelektronischer anordung und verfahren zur herstellung desselbigen

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JP5353602B2 (ja) * 2009-09-25 2013-11-27 凸版印刷株式会社 光源ユニットの製造方法
DE102011084276B4 (de) * 2011-10-11 2019-10-10 Osram Oled Gmbh Verkapselung für ein organisches elektronisches bauelement, ein organisches elektronisches bauelement mit der verkapselung und ein verfahren zur herstellung eines organischen elektronischen bauelements mit der verkapselung
EP2792934B1 (fr) * 2011-12-16 2018-08-22 Panasonic Intellectual Property Management Co., Ltd. Module électroluminescent et source de lumière d'éclairage et dispositif utilisant celui-ci
CN103367611B (zh) * 2012-03-28 2017-08-08 日亚化学工业株式会社 波长变换用无机成型体及其制造方法以及发光装置
CN107017325B (zh) * 2015-11-30 2020-06-23 隆达电子股份有限公司 量子点复合材料及其制造方法与应用
JP6288061B2 (ja) * 2015-12-10 2018-03-07 日亜化学工業株式会社 発光装置の製造方法
US10596388B2 (en) * 2016-09-21 2020-03-24 Epistar Corporation Therapeutic light-emitting module
DE102019115600A1 (de) * 2019-06-07 2020-12-10 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Bauelement mit korrosionsschutz und verfahren zur herstellung eines bauelements mit korrosionsschutz
DE102021114070A1 (de) * 2021-05-31 2022-12-01 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronische leuchtvorrichtung
DE102022133373A1 (de) 2022-12-15 2024-06-20 Ams-Osram International Gmbh Optoelektronisches bauelement und verfahren zur herstellung eines optoelektronischen bauelements

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KR20250117698A (ko) 2025-08-05

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