ES2002951A6 - Un metodo y un aparato para transferir una pluralidad de grupos de senales de datos sobre una linea general del sistema - Google Patents

Un metodo y un aparato para transferir una pluralidad de grupos de senales de datos sobre una linea general del sistema

Info

Publication number
ES2002951A6
ES2002951A6 ES8700203A ES8700203A ES2002951A6 ES 2002951 A6 ES2002951 A6 ES 2002951A6 ES 8700203 A ES8700203 A ES 8700203A ES 8700203 A ES8700203 A ES 8700203A ES 2002951 A6 ES2002951 A6 ES 2002951A6
Authority
ES
Spain
Prior art keywords
data processing
processing system
write command
control signals
bus utilization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES8700203A
Other languages
English (en)
Inventor
Paul J Natusch
David C Senerchia
John F Herny
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of ES2002951A6 publication Critical patent/ES2002951A6/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

EN UN SISTEMA DE TRATAMIENTO DE DATOS QUE TIENE UN MANDO DE INSCRIPCION MULTIPLE Y UN MANDO DE INSCRIPCION ENMASCARADA, UNA PLURALIDAD DE GRUPOS DE SEÑALES PUEDEN SER TRANSFERIDOS DESDE UN SUBSISTEMA DE TRATAMIENTO DE DATOS A UNA UNIDAD DE MEMORIA EN CICLOS CONSECUTIVOS DEL SISTEMA. ASOCIADAS CON CADA GRUPO DE SEÑALES Y APLICADAS A LINEAS USADAS PARA TRANSFERIR SEÑALES DE MASCARA, HAY SEÑALES DE CONTROL QUE DESIGNAN CUANDO HAN DE SER ALMACENADAS EL GRUPO DE SEÑALES ASOCIADAS EN LA UNIDAD DE MEMORIA. CUANDO ES EMITIDA LA ORDEN O MANDO DE INSCRIPCION MULTIPLE, EL APARATO ACOPLADO A LAS LINEAS DE SEÑALES DE MASCARA ES HABILITADO Y LAS SEÑALES DE CONTROL PUEDEN SER IDENTIFICADAS. CUANDO ESTAN IDENTIFICADAS LAS SEÑALES DE CONTROL, SE INHIBE LA OPERACION QUE ALMACENA EL GRUPO DE SEÑALES DE ASOCIADO. LAS SEÑALES DE APARATO Y MANDO ESTAN GENERALMENTE YA DISPONIBLES PARA ORGANIZAR ESTE INVENTO. SIN EMBARGO, ELAPARATO Y LOS MANDOS U ORDENES SE USAN DE UNA MANERA NUEVA.
ES8700203A 1986-01-29 1987-01-28 Un metodo y un aparato para transferir una pluralidad de grupos de senales de datos sobre una linea general del sistema Expired ES2002951A6 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/823,801 US4809218A (en) 1986-01-29 1986-01-29 Apparatus and method for increased system bus utilization in a data processing system

Publications (1)

Publication Number Publication Date
ES2002951A6 true ES2002951A6 (es) 1988-10-01

Family

ID=25239763

Family Applications (1)

Application Number Title Priority Date Filing Date
ES8700203A Expired ES2002951A6 (es) 1986-01-29 1987-01-28 Un metodo y un aparato para transferir una pluralidad de grupos de senales de datos sobre una linea general del sistema

Country Status (8)

Country Link
US (1) US4809218A (es)
EP (1) EP0290468A1 (es)
JP (1) JPH01501347A (es)
AU (1) AU6933187A (es)
CA (1) CA1274920A (es)
ES (1) ES2002951A6 (es)
IL (1) IL81425A (es)
WO (1) WO1987004824A1 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0440452B1 (en) * 1990-01-31 1996-10-09 Hewlett-Packard Company Multiple bus system memory architecture

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3368207A (en) * 1965-05-12 1968-02-06 Ibm File protection to i/o storage
US4104721A (en) * 1976-12-30 1978-08-01 International Business Machines Corporation Hierarchical security mechanism for dynamically assigning security levels to object programs
US4290102A (en) * 1977-10-25 1981-09-15 Digital Equipment Corporation Data processing system with read operation splitting
DE2754890C2 (de) * 1977-12-09 1982-10-28 Ibm Deutschland Gmbh, 7000 Stuttgart Einrichtung zur Programmunterbrechung
US4245303A (en) * 1978-10-25 1981-01-13 Digital Equipment Corporation Memory for data processing system with command and data buffering
EP0091488B1 (en) * 1981-10-21 1987-03-18 Elxsi Bus system

Also Published As

Publication number Publication date
AU6933187A (en) 1987-08-25
IL81425A0 (en) 1987-08-31
JPH01501347A (ja) 1989-05-11
US4809218A (en) 1989-02-28
EP0290468A1 (en) 1988-11-17
WO1987004824A1 (en) 1987-08-13
CA1274920A (en) 1990-10-02
IL81425A (en) 1990-12-23

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19980401