ES2062063T3 - Sistema informatico de interconexion central. - Google Patents

Sistema informatico de interconexion central.

Info

Publication number
ES2062063T3
ES2062063T3 ES89401679T ES89401679T ES2062063T3 ES 2062063 T3 ES2062063 T3 ES 2062063T3 ES 89401679 T ES89401679 T ES 89401679T ES 89401679 T ES89401679 T ES 89401679T ES 2062063 T3 ES2062063 T3 ES 2062063T3
Authority
ES
Spain
Prior art keywords
union
bus
internal
joined
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89401679T
Other languages
English (en)
Inventor
Maurice Hubert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Application granted granted Critical
Publication of ES2062063T3 publication Critical patent/ES2062063T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Communication Control (AREA)

Abstract

SEGUN ESTE INVENTO EL SISTEMA INFORMATICO COMPORTA COMO MINIMO UNA UNIDAD CENTRAL (CPU) (18) Y UNA MEMORIA CENTRAL (MMU) (20) QUE SE COMUNICAN POR MEDIO DE UN BUS INTERNO DE COMUNICACION (16), AL MENOS UN ORGANO PERIFERICO (28, 29) ASOCIADO A UN MODULO DE CONTROL (30, 31) MAS ADELANTE LLAMADO MODULO IOM, Y AL MENOS UNA INTERCONEXION ENTRE EL MODULO IOM (30, 31) Y EL BUS INTERNO (16). EL SISTEMA SE CARACTERIZA POR UNA PARTE EN QUE EL MODULO IOM (30, 31) ESTA UNIDO A UN BUS EXTERNO DE COMUNICACION (24, 26) DE TIPO DIFERENTE A AQUEL DEL BUS INTERNO Y POR OTRA PARTE LA INTERCONEXION COMPORTA UN AGENTE DE UNION INTERNA (CLM) (32) UNIDO AL BUS INTERNO (16), UN AGENTE DE UNION EXTERNA (PLM) (34, 36) UNIDO AL BUS EXTERNO (24, 26), UNA UNION INTERAGENTE (38, 40), MAS ADELANTE LLAMADA UNION PLI, DISPUESTA ENTRE DICHOS AGENTES DE UNION (32, 44-46). DICHOS AGENTES DE UNION (CLM) (PLM) ASEGURAN LA ADAPTACION ENTRE LOS PROTOCOLOS UTILIZADOS RESPECTIVAMENTE EN LOS DOS BUS (16, 24-26) Y LA UNION PLI (38,40).
ES89401679T 1988-06-27 1989-06-15 Sistema informatico de interconexion central. Expired - Lifetime ES2062063T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8808578A FR2633414B1 (fr) 1988-06-27 1988-06-27 Systeme informatique a interconnexion centrale

Publications (1)

Publication Number Publication Date
ES2062063T3 true ES2062063T3 (es) 1994-12-16

Family

ID=9367737

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89401679T Expired - Lifetime ES2062063T3 (es) 1988-06-27 1989-06-15 Sistema informatico de interconexion central.

Country Status (6)

Country Link
US (1) US5245703A (es)
EP (1) EP0349371B1 (es)
JP (1) JPH0731654B2 (es)
DE (1) DE68917388T2 (es)
ES (1) ES2062063T3 (es)
FR (1) FR2633414B1 (es)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5297291A (en) * 1991-03-07 1994-03-22 Digital Equipment Corporation System for linking program units by binding symbol vector index in the symbol table into calling image to obtain current value of the target image
JP2930257B2 (ja) * 1991-04-22 1999-08-03 株式会社東芝 携帯可能電子装置
FR2679352B1 (fr) 1991-07-15 1996-12-13 Bull Sa Dispositif universel de couplage d'un bus d'ordinateur a un controleur d'un groupe de peripheriques.
US5826017A (en) * 1992-02-10 1998-10-20 Lucent Technologies Apparatus and method for communicating data between elements of a distributed system using a general protocol
US5495585A (en) * 1992-10-16 1996-02-27 Unisys Corporation Programmable timing logic system for dual bus interface
US5430847A (en) * 1992-10-22 1995-07-04 International Business Machines Corporation Method and system for extending system buses to external devices
US5784622A (en) * 1992-11-18 1998-07-21 Canon Kabushiki Kaisha Method and apparatus for multiprotocol operation of a networked peripheral
US5442754A (en) * 1992-12-04 1995-08-15 Unisys Corporation Receiving control logic system for dual bus network
JP3421378B2 (ja) * 1993-03-23 2003-06-30 株式会社東芝 伝送制御方式
JP3264465B2 (ja) * 1993-06-30 2002-03-11 株式会社日立製作所 記憶システム
US5594874A (en) * 1993-09-30 1997-01-14 Cirrus Logic, Inc. Automatic bus setting, sensing and switching interface unit
US5758107A (en) * 1994-02-14 1998-05-26 Motorola Inc. System for offloading external bus by coupling peripheral device to data processor through interface logic that emulate the characteristics of the external bus
US6510465B1 (en) 1994-04-19 2003-01-21 Ibm Dual communication services interface for distributed transaction processing
US5727184A (en) * 1994-06-27 1998-03-10 Cirrus Logic, Inc. Method and apparatus for interfacing between peripherals of multiple formats and a single system bus
US5794014A (en) * 1994-06-27 1998-08-11 Cirrus Logic, Inc. Method and apparatus for interfacing between peripherals of multiple formats and a single system bus
US5805924A (en) * 1994-11-08 1998-09-08 Stoevhase; Bent Method and apparatus for configuring fabrics within a fibre channel system
JP3522882B2 (ja) * 1995-03-22 2004-04-26 株式会社東芝 プロトコル切換方法
US5608877A (en) * 1995-03-24 1997-03-04 Cirrus Logic, Inc. Reset based computer bus identification method and circuit resilient to power transience
US5596169A (en) * 1995-05-12 1997-01-21 Iomega Corporation Combined SCSI/parallel port cable
US7137107B1 (en) 2003-04-29 2006-11-14 Roy-G-Biv Corporation Motion control systems and methods
US20100131081A1 (en) * 1995-05-30 2010-05-27 Brown David W Systems and methods for motion control
US7139843B1 (en) 1995-05-30 2006-11-21 Roy-G-Biv Corporation System and methods for generating and communicating motion data through a distributed network
US6859671B1 (en) 1995-05-30 2005-02-22 Roy-G-Biv Corporation Application programs for motion control devices including access limitations
US7024666B1 (en) 2002-01-28 2006-04-04 Roy-G-Biv Corporation Motion control systems and methods
US5691897A (en) * 1995-05-30 1997-11-25 Roy-G-Biv Corporation Motion control systems
US20060206219A1 (en) * 1995-05-30 2006-09-14 Brown David W Motion control systems and methods
US6542925B2 (en) 1995-05-30 2003-04-01 Roy-G-Biv Corporation Generation and distribution of motion commands over a distributed network
US6571141B1 (en) 1995-05-30 2003-05-27 Roy-G-Biv Corporation Application programs for motion control devices including access limitations
US6209037B1 (en) 1995-05-30 2001-03-27 Roy-G-Biv Corporation Motion control systems using communication map to facilitating communication with motion control hardware
US5832244A (en) * 1996-02-20 1998-11-03 Iomega Corporation Multiple interface input/output port for a peripheral device
US5878225A (en) * 1996-06-03 1999-03-02 International Business Machines Corporation Dual communication services interface for distributed transaction processing
US6058263A (en) * 1996-06-03 2000-05-02 Microsoft Corporation Interface hardware design using internal and external interfaces
US6105093A (en) * 1997-02-21 2000-08-15 General Electric Company Interface monitor for communicating between different communication protocols
US5978861A (en) * 1997-09-30 1999-11-02 Iomega Corporation Device and method for continuously polling for communication bus type and termination
US20010032278A1 (en) 1997-10-07 2001-10-18 Brown Stephen J. Remote generation and distribution of command programs for programmable devices
SE516175C2 (sv) * 1999-02-17 2001-11-26 Axis Ab Anordning och metod för kommunikation över ett nätverk
US8032605B2 (en) 1999-10-27 2011-10-04 Roy-G-Biv Corporation Generation and distribution of motion commands over a distributed network
US20100131078A1 (en) * 1999-10-27 2010-05-27 Brown David W Event driven motion systems
US6885898B1 (en) 2001-05-18 2005-04-26 Roy-G-Biv Corporation Event driven motion systems
CA2625283C (en) 1999-10-27 2012-12-18 Roy-G-Biv Corporation Systems and methods for generating and communicating motion data through a distributed network
US7904194B2 (en) 2001-02-09 2011-03-08 Roy-G-Biv Corporation Event management systems and methods for motion control systems
WO2002071241A1 (en) 2001-02-09 2002-09-12 Roy-G-Biv Corporation Event management systems and methods for the distribution of motion control commands
US20060064503A1 (en) 2003-09-25 2006-03-23 Brown David W Data routing systems and methods
US8027349B2 (en) * 2003-09-25 2011-09-27 Roy-G-Biv Corporation Database event driven motion systems
US20100131077A1 (en) * 2004-02-25 2010-05-27 Brown David W Data Collection Systems and Methods for Motion Control
US7606945B2 (en) * 2006-01-04 2009-10-20 Broadcom Corporation Method and apparatus for dynamically configuring hardware resources by a generic CPU management interface
US20130235884A1 (en) * 2012-03-11 2013-09-12 Broadcom Corporation Mixed serial and parallel stream channel bonding architecture
US9383932B2 (en) * 2013-12-27 2016-07-05 Intel Corporation Data coherency model and protocol at cluster level

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4162536A (en) * 1976-01-02 1979-07-24 Gould Inc., Modicon Div. Digital input/output system and method
JPS5427748A (en) * 1977-08-03 1979-03-02 Toshiba Corp Bus control system of composite computer system
US4156796A (en) * 1977-11-29 1979-05-29 International Business Machines Corporation Programmable data processing communications multiplexer
US4188665A (en) * 1977-11-29 1980-02-12 International Business Machines Corporation Programmable communications subsystem
JPS581454B2 (ja) * 1978-03-27 1983-01-11 株式会社東芝 入出力制御方式
US4434459A (en) * 1980-04-25 1984-02-28 Data General Corporation Data processing system having instruction responsive apparatus for both a basic and an extended instruction set
US4814979A (en) * 1981-04-01 1989-03-21 Teradata Corporation Network to transmit prioritized subtask pockets to dedicated processors
US4945471A (en) * 1981-04-01 1990-07-31 Teradata Corporation Message transmission system for selectively transmitting one of two colliding messages based on contents thereof
US4493021A (en) * 1981-04-03 1985-01-08 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Multicomputer communication system
US4631666A (en) * 1982-10-25 1986-12-23 Burroughs Corporation Data transfer network for variable protocol management
EP0133117A3 (en) * 1983-07-20 1988-01-27 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Independently operable local area network
AU589400B2 (en) * 1985-03-05 1989-10-12 Wang Laboratories, Inc. Apparatus and method for control of one computer system by another computer system
JPS62184558A (ja) * 1986-02-10 1987-08-12 Fujitsu Ltd インタフエ−ス装置
US4774659A (en) * 1986-04-16 1988-09-27 Astronautics Corporation Of America Computer system employing virtual memory
US5056015A (en) * 1988-03-23 1991-10-08 Du Pont Pixel Systems Limited Architectures for serial or parallel loading of writable control store
US4872157A (en) * 1988-03-31 1989-10-03 American Telephone And Telegraph Company, At&T Bell Laboratories Architecture and organization of a high performance metropolitan area telecommunications packet network
US4872159A (en) * 1988-03-31 1989-10-03 American Telephone And Telegraph Company At&T Bell Laboratories Packet network architecture for providing rapid response time

Also Published As

Publication number Publication date
FR2633414A1 (fr) 1989-12-29
DE68917388D1 (de) 1994-09-15
JPH0245856A (ja) 1990-02-15
US5245703A (en) 1993-09-14
EP0349371B1 (fr) 1994-08-10
JPH0731654B2 (ja) 1995-04-10
DE68917388T2 (de) 1995-04-06
FR2633414B1 (fr) 1993-07-09
EP0349371A1 (fr) 1990-01-03

Similar Documents

Publication Publication Date Title
ES8507273A1 (es) Perfeccionamientos en los dispositivos para entrada de datos de direccion en un circuito integrado
ES2169278T3 (es) Disposicion de circuito para un automovil con modulos funcionales, que estan conectados con un portico a traves de al menos dos sistemas de bus.
EP0260125A3 (en) Electrostatic discharge protection circuit
MX173460B (es) Arbitraje dinamico de barra colectora, con transferencia que comparte cada ciclo
KR960029965A (ko) 마이크로 컴퓨터
BR9405409A (pt) Aparelho para acoplar primeiro e segundo dispositivos eletrônicos e sistema de comunicação.
KR860007787A (ko) 반도체 집적회로 장치
ES8606687A1 (es) Aparato para controlar una unidad para que responda aproximadamente a solo una senal de peticion en un sistema de trata miento de datos.
ES2140660T3 (es) Sistema de gestion de transacciones controlado por un circuito integrado.
ES8605341A1 (es) Circuito de interfase uso en un sistema de comunicacion telefonica.
ES2026136T3 (es) Tarjeta que comprende un componente y un micromodulo con contactos de flanco.
ES8201747A1 (es) Perfeccionamientos en circuitos de deteccion de errores pa- ra dispositivos de memoria en sistema de proceso de datos
BR9803576A (pt) Conector munido de retentor
MX9400064A (es) Sistema de interface de coraza posterior.
ES8702677A1 (es) Disposicion destinada a repartir prioridad a ordenadores quecontienen procesadores de dos tipos
KR900013622A (ko) 반도체 집적회로장치
BR0007080A (pt) Unidade de tomada de computador a ser montada em um componente eletrônico e sistema de entretenimento
ES2037345T3 (es) Conector para enchufes acoplados a cables electricos.
US6130475A (en) Clock distribution system for synchronous circuit assemblies
ES2152002T3 (es) Accesorio de soporte para la sujecion de una barra a otro elemento de bastidor, principalmente para el soporte de aparatos electricos.
BR0105318A (pt) Repetidora
ES2125423T3 (es) Conector con organos de contacto autodesnudantes.
KR930020682A (ko) 반 주문형 집적 회로
TW229288B (en) Microprocessor with multiplexed and non-multiplexed address busses
KR940022288A (ko) 이기종 버스시스템에서의 버스쉐어링방법

Legal Events

Date Code Title Description
FG2A Definitive protection

Ref document number: 349371

Country of ref document: ES