ES2071263T3 - Dispositivo de atraso regulable. - Google Patents

Dispositivo de atraso regulable.

Info

Publication number
ES2071263T3
ES2071263T3 ES91403222T ES91403222T ES2071263T3 ES 2071263 T3 ES2071263 T3 ES 2071263T3 ES 91403222 T ES91403222 T ES 91403222T ES 91403222 T ES91403222 T ES 91403222T ES 2071263 T3 ES2071263 T3 ES 2071263T3
Authority
ES
Spain
Prior art keywords
delay device
door
adjustable delay
whose
per
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES91403222T
Other languages
English (en)
Inventor
Roland Marbot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Bull SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SAS filed Critical Bull SAS
Application granted granted Critical
Publication of ES2071263T3 publication Critical patent/ES2071263T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/26—Time-delay networks
    • H03H11/265—Time-delay networks with adjustable delay

Landscapes

  • Pulse Circuits (AREA)

Abstract

EL DISPOSITIVO DE RETARDO (10) COMPRENDE UNA PUERTA ECL (11) CUYA FUENTE DE CORRIENTE (16) Y CUYAS RESISTENCIAS DE CARGA (14, 15) ESTAN ASOCIADAS A UN CIRCUITO DE AJUSTE (23) QUE PRODUCE UNA TENSION VH PARA MANTENER CONSTANTE LA TENSION SOBRE LOS COLECTORES DE LOS TRANSISTORES (12 Y 13) DE LA PUERTA (11). EL DISPOSITIVO DE RETARDO (10) HACE VARIAR LINEALMENTE LOS RETARDOS ENTRE LAS SEÑALES DE ENTRADA IN, IN* Y DE SALIDA OUT, OUT*. LA INVENCION SE APLICA EN PARTICULAR A LOS SISTEMAS DE TRANSMISION DE DATOS NUMERICOS DE ALTISIMO CAUDAL, DE MAS DE 1 GIGABIT POR SEGUNDO POR EJEMPLO.
ES91403222T 1990-12-27 1991-11-27 Dispositivo de atraso regulable. Expired - Lifetime ES2071263T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9016339A FR2671245B1 (fr) 1990-12-27 1990-12-27 Dispositif de retard reglable.

Publications (1)

Publication Number Publication Date
ES2071263T3 true ES2071263T3 (es) 1995-06-16

Family

ID=9403720

Family Applications (1)

Application Number Title Priority Date Filing Date
ES91403222T Expired - Lifetime ES2071263T3 (es) 1990-12-27 1991-11-27 Dispositivo de atraso regulable.

Country Status (7)

Country Link
US (1) US5463343A (es)
EP (1) EP0493150B1 (es)
JP (1) JP2688552B2 (es)
CA (1) CA2057824C (es)
DE (1) DE69107432T2 (es)
ES (1) ES2071263T3 (es)
FR (1) FR2671245B1 (es)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4227282C1 (de) * 1992-08-18 1993-11-25 Siemens Ag Digitaler Stromschalter
FR2731570B1 (fr) * 1995-03-07 1997-05-23 Sgs Thomson Microelectronics Circuit logique a etage differentiel
CA2170666A1 (en) * 1995-03-17 1996-09-18 Taewon Jung Complementary multiplexer with low disabled-output capacitance, and method
US5872477A (en) * 1997-06-13 1999-02-16 Vtc Inc. Multiplexer with CMOS break-before-make circuit
US5945863A (en) * 1997-06-18 1999-08-31 Applied Micro Circuits Corporation Analog delay circuit
JP3795733B2 (ja) * 2000-01-31 2006-07-12 富士通株式会社 半導体集積回路
US7287429B2 (en) * 2004-03-25 2007-10-30 Denso Corporation Capacitive acceleration sensor system
WO2008023624A1 (fr) * 2006-08-24 2008-02-28 Advantest Corporation Circuit à retard variable, générateur de synchronisation, et appareil pour tester des semi-conducteurs

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4422052A (en) * 1981-05-29 1983-12-20 Rca Corporation Delay circuit employing active bandpass filter
US4709170A (en) * 1984-08-20 1987-11-24 National Semiconductor Corp. Subnanosecond programmable phase shifter for a high frequency digital PLL
US4766559A (en) * 1986-03-31 1988-08-23 Tektronix Inc. Linearity correcting control circuit for tunable delay line
US4866314A (en) * 1986-07-18 1989-09-12 Tektronix, Inc. Programmable high-speed digital delay circuit
JPH01119114A (ja) * 1987-10-31 1989-05-11 Sony Corp ディレイ回路
US4797586A (en) * 1987-11-25 1989-01-10 Tektronix, Inc. Controllable delay circuit
JPH01175407A (ja) * 1987-12-29 1989-07-11 Matsushita Electric Ind Co Ltd 半導体集積回路
US4862020A (en) * 1988-06-20 1989-08-29 Tektronix, Inc. Electronic delay control circuit having pulse width maintenance
US4893036A (en) * 1988-08-15 1990-01-09 Vtc Incorporated Differential signal delay circuit
JP2788746B2 (ja) * 1989-02-14 1998-08-20 日本電気アイシーマイコンシステム 株式会社 デューティ可変回路

Also Published As

Publication number Publication date
CA2057824A1 (fr) 1992-06-28
FR2671245A1 (fr) 1992-07-03
EP0493150A1 (fr) 1992-07-01
US5463343A (en) 1995-10-31
DE69107432T2 (de) 1995-06-14
EP0493150B1 (fr) 1995-02-15
DE69107432D1 (de) 1995-03-23
JP2688552B2 (ja) 1997-12-10
CA2057824C (fr) 1997-02-11
JPH04294631A (ja) 1992-10-19
FR2671245B1 (fr) 1993-03-05

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