ES2073568T3 - Carbono de sustitucion en silicio. - Google Patents

Carbono de sustitucion en silicio.

Info

Publication number
ES2073568T3
ES2073568T3 ES90906309T ES90906309T ES2073568T3 ES 2073568 T3 ES2073568 T3 ES 2073568T3 ES 90906309 T ES90906309 T ES 90906309T ES 90906309 T ES90906309 T ES 90906309T ES 2073568 T3 ES2073568 T3 ES 2073568T3
Authority
ES
Spain
Prior art keywords
silicon
good quality
stages
microplate
carbon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90906309T
Other languages
English (en)
Inventor
Leigh Trevor Canham
Keith Gordon Barraclough
Mark Roy Dyball
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UK Secretary of State for Defence
Original Assignee
UK Secretary of State for Defence
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by UK Secretary of State for Defence filed Critical UK Secretary of State for Defence
Application granted granted Critical
Publication of ES2073568T3 publication Critical patent/ES2073568T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/226—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping at a temperature lower than room temperature
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/004—Annealing, incoherent light
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/155—Solid solubility
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/918—Special or nonstandard dopant

Landscapes

  • Silicon Compounds (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Silicon Polymers (AREA)
  • Led Devices (AREA)

Abstract

LA INVENCION SE REFIERE A UN METODO PARA PRODUCIR SILICONA CON UNA SUSTITUCIONALIDAD APROXIMADA DEL 100% CON CONCENTRACIONES DE CARBONO MUY ALTAS HASTA 10 ELEVADO 21 CM ELEVADO -3 APROXIMADAMENTE, QUE TIENE CAPAS RECRISTALIZADAS DE BUENAS CUALIDADES CONTENIENDO NIVELES BAJOS DE DAÑO RESIDUAL, Y QUE EVITA LA PRECIPITACION DE CARBON MOVIL. ESTE METODO, COMPATIBLE CON EL ESTADO ACTUAL DE LA TECNOLOGIA DEL SILICIO VLSI, COMPRENDE LAS ETAPAS SECUENCIALES DE: IMPLANTAR UNA MICROPLAQUETA DE SILICIO CON IONES DE CARBONO, Y DOS ETAPAS DE RECOCCION DE LA MICROPLAQUETA DE SILICIO IMPLANTADA.
ES90906309T 1989-04-14 1990-04-11 Carbono de sustitucion en silicio. Expired - Lifetime ES2073568T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB898908509A GB8908509D0 (en) 1989-04-14 1989-04-14 Substitutional carbon in silicon

Publications (1)

Publication Number Publication Date
ES2073568T3 true ES2073568T3 (es) 1995-08-16

Family

ID=10655066

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90906309T Expired - Lifetime ES2073568T3 (es) 1989-04-14 1990-04-11 Carbono de sustitucion en silicio.

Country Status (10)

Country Link
US (1) US5212101A (es)
EP (1) EP0467944B1 (es)
JP (1) JP3207851B2 (es)
AT (1) ATE124168T1 (es)
CA (1) CA2054722C (es)
DE (1) DE69020344T2 (es)
DK (1) DK0467944T3 (es)
ES (1) ES2073568T3 (es)
GB (3) GB8908509D0 (es)
WO (1) WO1990013138A1 (es)

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US6090646A (en) 1993-05-26 2000-07-18 Semiconductor Energy Laboratory Co., Ltd. Method for producing semiconductor device
KR100355938B1 (ko) 1993-05-26 2002-12-16 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치제작방법
US5360986A (en) * 1993-10-05 1994-11-01 Motorola, Inc. Carbon doped silicon semiconductor device having a narrowed bandgap characteristic and method
US5565690A (en) * 1995-02-02 1996-10-15 Motorola, Inc. Method for doping strained heterojunction semiconductor devices and structure
US6258695B1 (en) 1999-02-04 2001-07-10 International Business Machines Corporation Dislocation suppression by carbon incorporation
US6235599B1 (en) * 1999-10-25 2001-05-22 Advanced Micro Devices, Inc. Fabrication of a shallow doped junction having low sheet resistance using multiple implantations
US6702407B2 (en) 2000-01-31 2004-03-09 Semiconductor Energy Laboratory Co., Ltd. Color image display device, method of driving the same, and electronic equipment
DE10024857A1 (de) * 2000-05-19 2001-11-29 Infineon Technologies Ag Verfahren zur Herstellung einer einkristallinen SiC-Schicht durch Ionenstrahlsynthese
US6498078B2 (en) * 2000-09-05 2002-12-24 The Regents Of The University Of California Method for enhancing the solubility of boron and indium in silicon
US7041581B2 (en) * 2001-11-16 2006-05-09 International Business Machines Corporation Method and structure for improving latch-up immunity using non-dopant implants
US6806151B2 (en) * 2001-12-14 2004-10-19 Texas Instruments Incorporated Methods and apparatus for inducing stress in a semiconductor device
US20040121524A1 (en) * 2002-12-20 2004-06-24 Micron Technology, Inc. Apparatus and method for controlling diffusion
US7297617B2 (en) * 2003-04-22 2007-11-20 Micron Technology, Inc. Method for controlling diffusion in semiconductor regions
US7479431B2 (en) 2004-12-17 2009-01-20 Intel Corporation Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
US7438760B2 (en) 2005-02-04 2008-10-21 Asm America, Inc. Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition
US8110469B2 (en) 2005-08-30 2012-02-07 Micron Technology, Inc. Graded dielectric layers
WO2007070321A2 (en) * 2005-12-09 2007-06-21 Semequip Inc. System and method for the manufacture of semiconductor devices by the implantation of carbon clusters
US20070238267A1 (en) * 2006-03-28 2007-10-11 International Business Machines Corporation Epitaxy of Silicon-Carbon Substitutional Solid Solutions by Ultra-Fast Annealing of Amorphous Material
US7582547B2 (en) 2006-08-04 2009-09-01 Interuniversitair Microelektronica Centrum Vzw (Imec) Method for junction formation in a semiconductor device and the semiconductor device made thereof
JP2008091876A (ja) * 2006-08-04 2008-04-17 Interuniv Micro Electronica Centrum Vzw 半導体装置の接合形成方法およびそれにより作製された半導体装置
EP1884985A1 (en) * 2006-08-04 2008-02-06 Interuniversitair Microelektronica Centrum Method for junction formation in a semiconductor device and the semiconductor device thereof
US7696000B2 (en) 2006-12-01 2010-04-13 International Business Machines Corporation Low defect Si:C layer with retrograde carbon profile
JP5037988B2 (ja) * 2007-03-29 2012-10-03 新電元工業株式会社 ＳｉＣ半導体装置の製造方法
US8072791B2 (en) * 2007-06-25 2011-12-06 Sandisk 3D Llc Method of making nonvolatile memory device containing carbon or nitrogen doped diode
US7902032B2 (en) * 2008-01-21 2011-03-08 Texas Instruments Incorporated Method for forming strained channel PMOS devices and integrated circuits therefrom
JP2010016302A (ja) * 2008-07-07 2010-01-21 Panasonic Corp 半導体装置及びその製造方法
JP5315897B2 (ja) * 2008-09-30 2013-10-16 信越半導体株式会社 シリコンウエーハの評価方法及びシリコンウエーハの製造方法
US8124487B2 (en) * 2008-12-22 2012-02-28 Varian Semiconductor Equipment Associates, Inc. Method for enhancing tensile stress and source/drain activation using Si:C
US20100279479A1 (en) * 2009-05-01 2010-11-04 Varian Semiconductor Equipment Associates, Inc. Formation Of Raised Source/Drain On A Strained Thin Film Implanted With Cold And/Or Molecular Carbon
US10128115B2 (en) * 2010-02-26 2018-11-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming ultra-shallow junctions in semiconductor devices
US20110212590A1 (en) * 2010-02-26 2011-09-01 Taiwan Semiconductor Manufacturing Company, Ltd. High temperature implantation method for stressor formation
JP5051331B1 (ja) * 2011-02-28 2012-10-17 パナソニック株式会社 赤外発光素子の製造方法
GB201114365D0 (en) 2011-08-22 2011-10-05 Univ Surrey Method of manufacture of an optoelectronic device and an optoelectronic device manufactured using the method
US20140360546A1 (en) * 2013-06-08 2014-12-11 Alphabet Energy, Inc. Silicon-based thermoelectric materials including isoelectronic impurities, thermoelectric devices based on such materials, and methods of making and using same
JP6686419B2 (ja) * 2015-12-18 2020-04-22 株式会社Sumco シリコンゲルマニウムエピタキシャルウェーハの製造方法およびシリコンゲルマニウムエピタキシャルウェーハ
RU2687087C1 (ru) * 2018-07-12 2019-05-07 Федеральное государственное автономное образовательное учреждение высшего образования "Национальный исследовательский Нижегородский государственный университет им. Н.И. Лобачевского" Способ формирования гексагональной фазы кремния

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DE220812C (es) *
DE220814C (es) * 1900-01-01
US3622382A (en) * 1969-05-05 1971-11-23 Ibm Semiconductor isolation structure and method of producing
JPS56105652A (en) * 1980-01-28 1981-08-22 Mitsubishi Electric Corp Manufacture of semiconductor device
NL8103649A (nl) * 1981-08-03 1983-03-01 Philips Nv Halfgeleiderinrichting en werkwijze voor het vervaardigen van de halfgeleiderinrichting.
JPS5846617A (ja) * 1981-09-14 1983-03-18 Nec Corp 化合物半導体ｐｎ接合の形成方法
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
GB8711373D0 (en) * 1987-05-14 1987-06-17 Secr Defence Electroluminescent silicon device

Also Published As

Publication number Publication date
CA2054722C (en) 2001-03-20
DK0467944T3 (da) 1995-11-20
US5212101A (en) 1993-05-18
WO1990013138A1 (en) 1990-11-01
ATE124168T1 (de) 1995-07-15
EP0467944A1 (en) 1992-01-29
GB2249664A (en) 1992-05-13
GB2249664B (en) 1993-05-12
DE69020344D1 (de) 1995-07-27
GB9120345D0 (en) 1992-01-22
CA2054722A1 (en) 1990-10-15
GB8908509D0 (en) 1989-06-01
EP0467944B1 (en) 1995-06-21
JPH04504634A (ja) 1992-08-13
JP3207851B2 (ja) 2001-09-10
GB9006047D0 (en) 1990-05-09
DE69020344T2 (de) 1995-12-21

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Winius SJ Joseph Wicki and SJ John Gomes (it. eds.). Documenta Indica, Vol. XIV (1585–1588), Rome (Institutum Historicum Societatis Iesu, Via dei Penitenzieri 20), 1979. No ISBN no.; no price given.

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