ES2074481T3 - Ordenador con un gran numero de tarjetas enchufables. - Google Patents

Ordenador con un gran numero de tarjetas enchufables.

Info

Publication number
ES2074481T3
ES2074481T3 ES90100251T ES90100251T ES2074481T3 ES 2074481 T3 ES2074481 T3 ES 2074481T3 ES 90100251 T ES90100251 T ES 90100251T ES 90100251 T ES90100251 T ES 90100251T ES 2074481 T3 ES2074481 T3 ES 2074481T3
Authority
ES
Spain
Prior art keywords
computer
cards
plug
large number
interrupt signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90100251T
Other languages
English (en)
Inventor
Evangelos Skordou
Stefan Hofmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Force Computers GmbH
Original Assignee
Force Computers GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Force Computers GmbH filed Critical Force Computers GmbH
Application granted granted Critical
Publication of ES2074481T3 publication Critical patent/ES2074481T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Hardware Redundancy (AREA)
  • Telephonic Communication Services (AREA)
  • Stored Programmes (AREA)
  • Facsimile Scanning Arrangements (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Image Input (AREA)

Abstract

SE HA PREVISTO UN DISPOSITIVO DE DETENCION (10) PARA LA TRANSMISION DE LA SEÑAL DE INTERRUPCION ENTRE LOS CUERPOS CONECTABLES DE UN ORDENADOR. ESTE DISPOSITIVO, SITUADO EN LOS CIRCUITOS (22), TRANSMITE CORRECTAMENTE LA SEÑAL DE INTERRUPCION, INDEPENDIENTEMENTE DE QUE EL ORDENADOR TENGA UNO O VARIOS CUERPOS. POR OTRA PARTE ESTE DISPOSITIVO GARANTIZA QUE LA INTERRUPCION SE LLEVE A CABO ADECUADAMENTE EN LOS DIVERSOS CUERPOS CONECTABLES
ES90100251T 1989-04-19 1990-01-06 Ordenador con un gran numero de tarjetas enchufables. Expired - Lifetime ES2074481T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE8904936U DE8904936U1 (de) 1989-04-19 1989-04-19 Computer mit einer Mehrzahl von steckbaren Baugruppen

Publications (1)

Publication Number Publication Date
ES2074481T3 true ES2074481T3 (es) 1995-09-16

Family

ID=6838460

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90100251T Expired - Lifetime ES2074481T3 (es) 1989-04-19 1990-01-06 Ordenador con un gran numero de tarjetas enchufables.

Country Status (7)

Country Link
US (1) US5293589A (es)
EP (1) EP0393302B1 (es)
JP (1) JPH02294862A (es)
AT (1) ATE122482T1 (es)
DE (2) DE8904936U1 (es)
DK (1) DK0393302T3 (es)
ES (1) ES2074481T3 (es)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5397861A (en) * 1992-10-21 1995-03-14 Mupac Corporation Electrical interconnection board
US5591984A (en) * 1995-06-15 1997-01-07 The Whitaker Corporation Current sensing daisy-chain bypass arrangement
DE19530130A1 (de) * 1995-08-16 1997-02-20 Siemens Ag Verfahren und Vorrichtung für den Anschluß einer Vielzahl von Halbleiterchipkarten
US5798901A (en) * 1995-08-22 1998-08-25 Rockwell International Corporation Interrupt system
GB9522856D0 (en) * 1995-11-08 1996-01-10 Havant International Ltd Data processing apparatus
WO2001086455A2 (en) * 2000-05-10 2001-11-15 Rambus, Inc. Multiple channel modules and bus systems
US6545875B1 (en) * 2000-05-10 2003-04-08 Rambus, Inc. Multiple channel modules and bus systems using same
US6665762B2 (en) 2001-01-03 2003-12-16 Force Computers, Inc. Computer having a plurality of plug-in cards
DE102004023737A1 (de) * 2004-05-11 2005-12-08 Plein & Baus Gmbh Steuerungsschaltung für eine Busplatine eines Computersystems

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2744111A1 (de) * 1977-09-30 1979-04-05 Siemens Ag Schaltungsanordnung zur eingabe von unterbrechungsbefehlen und ausgabe von unterbrechungsbestaetigungen fuer computer-systeme
US4363094A (en) * 1977-12-29 1982-12-07 M/A-COM DDC, Inc. Communications processor
EP0077328A4 (en) * 1981-04-27 1985-06-26 Textron Inc BUS FOR SEVERAL MAIN PROCESSORS.
US4633392A (en) * 1982-04-05 1986-12-30 Texas Instruments Incorporated Self-configuring digital processor system with logical arbiter
US4562535A (en) * 1982-04-05 1985-12-31 Texas Instruments Incorporated Self-configuring digital processor system with global system
US4604689A (en) * 1983-04-15 1986-08-05 Convergent Technologies, Inc. Bus repeater
US4631670A (en) * 1984-07-11 1986-12-23 Ibm Corporation Interrupt level sharing
JPS61107456A (ja) * 1984-10-30 1986-05-26 Toshiba Corp 割込制御方式
EP0265574B1 (en) * 1986-10-30 1992-04-29 International Business Machines Corporation Daisy chain bus access configuration
EP0271626B1 (en) * 1986-12-16 1992-03-04 International Business Machines Corporation Bypass mechanism for daisy chain connected units
US5083259A (en) * 1988-12-07 1992-01-21 Xycom, Inc. Computer bus interconnection device

Also Published As

Publication number Publication date
US5293589A (en) 1994-03-08
JPH02294862A (ja) 1990-12-05
DE59009042D1 (de) 1995-06-14
EP0393302B1 (de) 1995-05-10
ATE122482T1 (de) 1995-05-15
EP0393302A1 (de) 1990-10-24
DE8904936U1 (de) 1989-06-01
DK0393302T3 (da) 1995-07-10

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