ES2083386T3 - Procedimiento y aparato para configurar vias de datos en una estacion de la red. - Google Patents
Procedimiento y aparato para configurar vias de datos en una estacion de la red.Info
- Publication number
- ES2083386T3 ES2083386T3 ES89312379T ES89312379T ES2083386T3 ES 2083386 T3 ES2083386 T3 ES 2083386T3 ES 89312379 T ES89312379 T ES 89312379T ES 89312379 T ES89312379 T ES 89312379T ES 2083386 T3 ES2083386 T3 ES 2083386T3
- Authority
- ES
- Spain
- Prior art keywords
- station
- bus
- module
- network station
- mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/42—Loop networks
- H04L12/437—Ring fault isolation or reconfiguration
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Communication Control (AREA)
Abstract
UN SISTEMA MODULAR PARA CONFIGURAR Y RECONFIGURAR LOS TRAYECTOS DE DATOS DENTRO DE UNA ESTACION DE UNA RED DE AREA LOCAL PERMITE QUE LA ESTACION DE LA RED SE CONFIGURE EN DIVERSOS MODOS OPERATIVOS INCLUIDO UN MODO DE TRANSFERENCIA, UN MODO DE ENROLLAMIENTO, Y UN MODO DE CONCENTRADOR. UN MODULO COMPRENDE UN CONTROLADOR DE ACCESO DE MEDIOS MAC Y UN CODIFICADOR/DESCODIFICADOR ENDEC CONECTADOS JUNTOS POR MEDIO DE UN BUS. CIERTAS SEÑALES DEL BUS SE SELECCIONAN POR MEDIO DE UN MULTIPLEXOR. LAS SEÑALES EXTERNAS, POR EJEMPLO, DE OTRO MODULO SE INTRODUCEN AL BUS POR MEDIO DE UN CIERRE. EL MULTIPLEXOR Y LOS TRAYECTOS DE DATOS A TRAVES DE MAC Y ENDEC SE CONTROLAN PARA CONFIGURAR LA ESTACION EN UNO DE LOS MODOS OPERATIVOS. SE UTILIZA UN SEGUNDO MODULO SIMILAR AL PRIMER MODULO PARA PROPORCIONAR UNA ESTACION PARA UNA RED DE AREA LOCAL DE DOBLE LLAMADA CONFORME AL ESTANDAR FDDI.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/281,991 US4951280A (en) | 1988-12-09 | 1988-12-09 | Method and apparatus for configuring data paths within a supernet station |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES2083386T3 true ES2083386T3 (es) | 1996-04-16 |
Family
ID=23079628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES89312379T Expired - Lifetime ES2083386T3 (es) | 1988-12-09 | 1989-11-29 | Procedimiento y aparato para configurar vias de datos en una estacion de la red. |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4951280A (es) |
| EP (1) | EP0372801B1 (es) |
| JP (1) | JP2619725B2 (es) |
| AT (1) | ATE133306T1 (es) |
| DE (1) | DE68925472T2 (es) |
| ES (1) | ES2083386T3 (es) |
| GR (1) | GR3019299T3 (es) |
Families Citing this family (47)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5005120A (en) * | 1988-07-29 | 1991-04-02 | Lsi Logic Corporation | Compensating time delay in filtering signals of multi-dimensional reconvigurable array processors |
| JPH02121547A (ja) * | 1988-10-31 | 1990-05-09 | Toshiba Corp | ローカルエリアネットワーク |
| US5063575A (en) * | 1989-04-17 | 1991-11-05 | Advanced Micro Devices, Inc. | Apparatus and method for proper byte alignment in an encoder/decoder |
| JPH0795766B2 (ja) * | 1989-06-30 | 1995-10-11 | 株式会社日立製作所 | デジタル・データ通信装置及びそれに使用するデータ通信アダプタ |
| JPH03135133A (ja) * | 1989-10-20 | 1991-06-10 | Toshiba Corp | マルチメディア統合ネットワークシステム |
| EP0468053B1 (en) * | 1990-01-26 | 1997-11-12 | Fujitsu Limited | Communication system between lans having different kinds of equipment |
| WO1991015831A1 (fr) * | 1990-04-05 | 1991-10-17 | Seiko Epson Corporation | Interpreteur de langage de description de page |
| US5247626A (en) * | 1990-05-29 | 1993-09-21 | Advanced Micro Devices, Inc. | Fddi controller having flexible buffer management |
| US5182747A (en) * | 1990-06-26 | 1993-01-26 | International Business Machines Corporation | Method for controlling the insertion of stations into fddi network |
| DE69218644T2 (de) * | 1991-01-30 | 1997-09-11 | Canon Kk | Kontrollverfahren und Vorrichtung der Verbindung zwischen Mikrocomputer(n) und einem Zentralrechner |
| US5241540A (en) * | 1991-07-31 | 1993-08-31 | International Business Machines Corporation | Reverse ordered control information transmission |
| US5305321A (en) * | 1992-02-24 | 1994-04-19 | Advanced Micro Devices | Ethernet media access controller with external address detection interface and associated method |
| US5355124A (en) * | 1992-06-09 | 1994-10-11 | Digital Equipment Corporation | Wiring concentrator for data networks |
| US5412782A (en) | 1992-07-02 | 1995-05-02 | 3Com Corporation | Programmed I/O ethernet adapter with early interrupts for accelerating data transfer |
| US5734926A (en) * | 1992-07-15 | 1998-03-31 | Advanced Hardware Architectures | Direct memory access controller in an integrated circuit |
| US5420986A (en) * | 1992-07-30 | 1995-05-30 | Digital Equipment Corporation | FDDI concentrator with backplane port for dual datapath systems |
| US5442623A (en) * | 1992-08-17 | 1995-08-15 | Bell Communications Research, Inc. | Passive protected self healing ring network |
| US5434976A (en) * | 1992-09-28 | 1995-07-18 | Standard Microsystems Corporation | Communications controller utilizing an external buffer memory with plural channels between a host and network interface operating independently for transferring packets between protocol layers |
| US5649224A (en) * | 1993-01-26 | 1997-07-15 | Intel Corporation | Integrated circuit card having contacts along the side rails and method for transferring information using the contacts |
| US5501608A (en) * | 1993-12-20 | 1996-03-26 | Intel Corporation | Computer system with an interconnection receptacle suitable for different external connectors |
| US5619660A (en) * | 1994-04-28 | 1997-04-08 | Intel Corporation | Keying notches for side contacts on a thin form factor computer card |
| US5525795A (en) * | 1994-05-24 | 1996-06-11 | Intel Corporation | Voltage protection for add in cards with sideswipe contacts |
| US5526217A (en) * | 1994-05-24 | 1996-06-11 | Intel Corporation | Voltage protection for modem add in cards with sideswipe contacts |
| US5889866A (en) * | 1994-06-30 | 1999-03-30 | Intel Corporation | Method and apparatus for controlling access to detachably connectable computer devices using an encrypted password |
| US5477418A (en) * | 1994-07-15 | 1995-12-19 | Intel Corporation | I/O connector for add in printed circuit cards for computer systems |
| US5563769A (en) * | 1994-07-19 | 1996-10-08 | Intel Corporation | Tabbed cover attach for PCMCIA card packaging and method for attaching the PCMCIA covers to the printed circuit board assembly |
| US5546378A (en) * | 1994-07-21 | 1996-08-13 | Newbridge Networks Corporation | Fault tolerant FDDI wiring hub |
| US5655140A (en) * | 1994-07-22 | 1997-08-05 | Network Peripherals | Apparatus for translating frames of data transferred between heterogeneous local area networks |
| US5687316A (en) * | 1994-07-29 | 1997-11-11 | International Business Machines Corporation | Communication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet data |
| US5606704A (en) * | 1994-10-26 | 1997-02-25 | Intel Corporation | Active power down for PC card I/O applications |
| US5637018A (en) * | 1994-11-01 | 1997-06-10 | Intel Corporation | Hi-jack hinged connection adapter for input/output cards |
| KR960027720A (ko) * | 1994-12-23 | 1996-07-22 | 양승택 | 동기식 디지틀 회선분배장치(sdh dxc)용 복합형 망보호/복구 장치 |
| US5519701A (en) * | 1995-03-29 | 1996-05-21 | International Business Machines Corporation | Architecture for high performance management of multiple circular FIFO storage means |
| EP0760501B1 (en) * | 1995-09-04 | 2002-02-20 | Hewlett-Packard Company, A Delaware Corporation | Data handling system with circular queue formed in paged memory |
| US5748634A (en) * | 1995-09-14 | 1998-05-05 | Level One Communications, Inc. | Method and apparatus for implementing a two-port ethernet bridge using a semaphoring technique |
| JPH09265363A (ja) * | 1996-03-28 | 1997-10-07 | Fuji Xerox Co Ltd | 印刷処理装置および方法 |
| US6108726A (en) * | 1996-09-13 | 2000-08-22 | Advanced Micro Devices. Inc. | Reducing the pin count within a switching element through the use of a multiplexer |
| US5892772A (en) * | 1997-04-15 | 1999-04-06 | Lockheed Martin Corporation | Spatial reuse by means of dual homing on a ring network |
| JPH11308253A (ja) * | 1998-04-20 | 1999-11-05 | Honda Motor Co Ltd | ネットワーク・システム |
| US6748451B2 (en) | 1998-05-26 | 2004-06-08 | Dow Global Technologies Inc. | Distributed computing environment using real-time scheduling logic and time deterministic architecture |
| US6587947B1 (en) | 1999-04-01 | 2003-07-01 | Intel Corporation | System and method for verification of off-chip processor code |
| US6622198B2 (en) * | 2000-08-31 | 2003-09-16 | United Memories, Inc. | Look-ahead, wrap-around first-in, first-out integrated (FIFO) circuit device architecture |
| US7339687B2 (en) * | 2002-09-30 | 2008-03-04 | Sharp Laboratories Of America | Load-balancing distributed raster image processing |
| DE10312907A1 (de) * | 2003-03-22 | 2004-10-07 | Bosch Rexroth Ag | Kommunikationssystem mit redundanter Kommunikation |
| US20050086385A1 (en) * | 2003-10-20 | 2005-04-21 | Gordon Rouleau | Passive connection backup |
| US8688887B2 (en) | 2009-12-22 | 2014-04-01 | International Business Machines Corporation | Computer peripheral expansion apparatus |
| US11640335B2 (en) * | 2021-06-15 | 2023-05-02 | Western Digital Technologies, Inc. | Multiple function level reset management |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2534753A1 (fr) * | 1982-10-15 | 1984-04-20 | Gixi Ingenierie Inf | Systeme d'etablissement de circuits de transmission de donnees a debit constant entre une pluralite de stations |
| FR2535557B1 (fr) * | 1982-11-03 | 1987-08-21 | Electricite De France | Procede et installation de transmission de donnees numeriques |
| US4527270A (en) * | 1983-05-04 | 1985-07-02 | Allen-Bradley Company | Communications network with stations that detect and automatically bypass faults |
| IT1199859B (it) * | 1985-03-06 | 1989-01-05 | Cselt Centro Studi Lab Telecom | Rete locale integrata ad alta velo-cita'riconfigurabile |
-
1988
- 1988-12-09 US US07/281,991 patent/US4951280A/en not_active Expired - Lifetime
-
1989
- 1989-11-29 ES ES89312379T patent/ES2083386T3/es not_active Expired - Lifetime
- 1989-11-29 DE DE68925472T patent/DE68925472T2/de not_active Expired - Fee Related
- 1989-11-29 EP EP89312379A patent/EP0372801B1/en not_active Expired - Lifetime
- 1989-11-29 AT AT89312379T patent/ATE133306T1/de not_active IP Right Cessation
- 1989-12-08 JP JP1320414A patent/JP2619725B2/ja not_active Expired - Lifetime
-
1996
- 1996-03-13 GR GR960400704T patent/GR3019299T3/el unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0372801B1 (en) | 1996-01-17 |
| DE68925472T2 (de) | 1996-10-17 |
| ATE133306T1 (de) | 1996-02-15 |
| GR3019299T3 (en) | 1996-06-30 |
| EP0372801A2 (en) | 1990-06-13 |
| JPH02202247A (ja) | 1990-08-10 |
| JP2619725B2 (ja) | 1997-06-11 |
| US4951280A (en) | 1990-08-21 |
| DE68925472D1 (de) | 1996-02-29 |
| EP0372801A3 (en) | 1992-04-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG2A | Definitive protection |
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