ES2087115T3 - Terminal de acceso para linea de transmision sincrona de alta velocidad. - Google Patents

Terminal de acceso para linea de transmision sincrona de alta velocidad.

Info

Publication number
ES2087115T3
ES2087115T3 ES90123673T ES90123673T ES2087115T3 ES 2087115 T3 ES2087115 T3 ES 2087115T3 ES 90123673 T ES90123673 T ES 90123673T ES 90123673 T ES90123673 T ES 90123673T ES 2087115 T3 ES2087115 T3 ES 2087115T3
Authority
ES
Spain
Prior art keywords
speed
line
lines
low
subscriber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90123673T
Other languages
English (en)
Inventor
Richard Marion Czerwiec
Raymond Eugene Tyrrell
Gus Clint Sanders
Joseph Edward Sutherland
Jr Richard James Sanders
Claude Melvin Hurlocker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel NV filed Critical Alcatel NV
Application granted granted Critical
Publication of ES2087115T3 publication Critical patent/ES2087115T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Communication Control (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Small-Scale Networks (AREA)
  • Telephonic Communication Services (AREA)

Abstract

UN TERMINAL (22) PARA UN SISTEMA DE TELECOMUNICACIONES QUE PROPORCIONA UN ACCESO A UNA O DOS LINEAS DE TRANSMISION SINCRONICA DE ALTA VELOCIDAD (10, 12) PARA LINEAS DE TRANSMISION DE BAJA VELOCIDAD (16) Y LINEAS DE ABONADO (20). UN NUCLEO MODULADO INCLUYE INTERFACES (32) PARA LAS LINEAS DE ALTA VELOCIDAD (10, 12) UN INTERCAMBIADOR DE CUOTAS DE TIEMPO (34), UN INTERFACE (42) PARA LAS LINEAS DE TRANSMISION DE BAJA VELOCIDAD (16), PROCESADORES (40) Y CIRCUITO SUPLEMENTARIO (40) PARA APOYAR EL TERMINAL (22). UN MODULO DE ACCESO (26) INCLUYE UNA PLURALIDAD DE ESTANTES DE LINEAS (48) CONECTADOS A LINEAS DE ABONADOS (20); CADA ESTANTE DE LINEA (48) INCLUYE UN PAR DE PROCESADORES (68) Y CUATRO ASIGNADORES DE CUOTAS DE TIEMPO (82). UNA VIA EN SERIE DE MULTIENLACES (44) CONECTA EL INTERCAMBIADOR DE CUOTAS DE TIEMPO (34) AL MODULO DE ACCESO (26) Y AL INTERFACE DE BAJA VELOCIDAD (42) Y PROPORCIONA UN ACOPLAMIENTO ESTRECHO ENTRE LOS PROCESADORES (40) EN EL MODULO DEL NUCLEO (24) Y LOS ESTANTES DE LINEAS(48). LOS PROCESADORES COOPERAN A LA HORA DE PREPARAR LA INFORMACION DEL ABONADO DE DICHAS LINEAS DE ABONADO (20) PARA Y A PARTIR DE CUOTAS DE TIEMPO EN DICHA LINEA DE ALIMENTACION DE ALTA VELOCIDAD (10, 12) Y DICHA LINEA DE BAJA VELOCIDAD (16). TAMBIEN SE PUEDE HABILITAR LA INFORMACION DEL ABONADO ENTRE CUOTAS DE TIEMPO DE LA LINEA DE ALIMENTACION DE ALTA VELOCIDAD (10, 12) Y LAS LINEAS DE TRANSMISION DE BAJA VELOCIDAD (16) ENTRE CUOTAS DE TIEMPO DENTRO DE CADA LINEA DE ABONADO (20).
ES90123673T 1989-12-15 1990-12-10 Terminal de acceso para linea de transmision sincrona de alta velocidad. Expired - Lifetime ES2087115T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/452,291 US5161152A (en) 1989-12-15 1989-12-15 High-speed synchronous transmission line access terminal

Publications (1)

Publication Number Publication Date
ES2087115T3 true ES2087115T3 (es) 1996-07-16

Family

ID=23795910

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90123673T Expired - Lifetime ES2087115T3 (es) 1989-12-15 1990-12-10 Terminal de acceso para linea de transmision sincrona de alta velocidad.

Country Status (7)

Country Link
US (1) US5161152A (es)
EP (1) EP0432678B1 (es)
AT (1) ATE135148T1 (es)
AU (1) AU640184B2 (es)
CA (1) CA2031935C (es)
DE (1) DE69025724T2 (es)
ES (1) ES2087115T3 (es)

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DE69226150T2 (de) * 1991-11-05 1999-02-18 Hsu Fu Chieh Redundanzarchitektur für Schaltungsmodul
US5831467A (en) * 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
US5498990A (en) * 1991-11-05 1996-03-12 Monolithic System Technology, Inc. Reduced CMOS-swing clamping circuit for bus lines
EP0654168B1 (en) * 1992-08-10 2001-10-31 Monolithic System Technology, Inc. Fault-tolerant hierarchical bus system
US5351236A (en) * 1992-10-20 1994-09-27 At&T Bell Laboratories Multirate, sonet-ready, switching arrangement
US5345441A (en) * 1992-10-20 1994-09-06 At&T Bell Laboratories Hierarchical path hunt for multirate connections
US5355362A (en) * 1992-10-26 1994-10-11 Nec America, Inc. Digital loop carrier system
US5784377A (en) * 1993-03-09 1998-07-21 Hubbell Incorporated Integrated digital loop carrier system with virtual tributary mapper circuit
JPH0787046A (ja) * 1993-09-16 1995-03-31 Fujitsu Ltd 同期多重通信の回線設定位相調整装置
KR100362337B1 (ko) * 1994-02-25 2003-04-08 텔레폰아크티에볼라게트 엘엠 에릭슨 원격통신네트워크에서무선송신기-수신기로및무선송신기-수신기로부터의통신대역폭요구조건을줄이기위한분산기지국
JP3159862B2 (ja) * 1994-03-15 2001-04-23 富士通株式会社 加入者系伝送装置
US5655113A (en) 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5497363A (en) * 1994-09-29 1996-03-05 Alcatel Network Systems, Inc. Expansion shelf for access system and switch block therefor
US5490142A (en) * 1994-09-30 1996-02-06 Alcatel Network Systems, Inc. VT group optical extension interface and VT group optical extension format method
US6002502A (en) * 1995-12-07 1999-12-14 Bell Atlantic Network Services, Inc. Switchable optical network unit
US5673253A (en) * 1996-02-29 1997-09-30 Siemens Business Communication Systems Dynamic allocation of telecommunications resources
US6160806A (en) * 1997-08-14 2000-12-12 Alcatel Usa Sourcing, L.P. High density unit shelf with network interface cards and method
US6154770A (en) * 1997-10-30 2000-11-28 Merrill Lynch & Co. Inc. Internetwork communication system using tiers of configurable multiple bandwidth capacity modes of operation
US6473436B1 (en) * 1998-01-27 2002-10-29 Alcatel Usa Sourcing, L.P. Digital loop carrier
US6768745B1 (en) * 1998-04-29 2004-07-27 Zhone Technologies, Inc. Flexible SONET access and transmission system
US6636501B1 (en) * 1998-12-11 2003-10-21 International Business Machines Corporation High-speed digital network node communication system and method
US7924706B1 (en) 1999-03-22 2011-04-12 Cisco Technology, Inc. Method and apparatus for controlling the operation of a flexible cross-connect system
US6865181B1 (en) * 1999-03-22 2005-03-08 Cisco Technology, Inc. Method and apparatus for routing telecommunications signals
JP2001044961A (ja) * 1999-08-02 2001-02-16 Fujitsu Ltd 時分割多重装置
US6898378B1 (en) 2000-03-24 2005-05-24 Northrop Grumman Corporation Shock-resistant backplane utilizing infrared communication scheme with electrical interface for embedded systems
US6813353B1 (en) * 2000-04-12 2004-11-02 Adtran, Inc. Redundant operation of ring voltage generators utilizing voltage bus segmentation for fault isolation
US7035204B1 (en) 2000-07-26 2006-04-25 Cicso Technology, Inc. Method and apparatus for rerouting telecommunications signals
US6941381B2 (en) * 2001-03-31 2005-09-06 Redback Networks Inc. Method and apparatus for sync hunting signals
US6950446B2 (en) * 2001-03-31 2005-09-27 Redback Networks Inc. Method and apparatus for simultaneously sync hunting signals
US7593432B2 (en) * 2001-03-31 2009-09-22 Redback Networks Inc. Method and apparatus for deframing signals

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4627047A (en) * 1982-01-07 1986-12-02 Rockwell International Corp. Integrated voice and data telecommunication switching system
US4768188A (en) * 1982-05-20 1988-08-30 Hughes Network Systems, Inc. Optical demand assigned local loop communication system
US4530093A (en) * 1983-07-05 1985-07-16 International Standard Electric Corporation PCM Telecommunications system for voice and data
US4716561A (en) * 1985-08-26 1987-12-29 American Telephone And Telegraph Company, At&T Bell Laboratories Digital transmission including add/drop module
JPS6262697A (ja) * 1985-09-13 1987-03-19 Toshiba Corp デ−タ送信制御方式
US4967405A (en) * 1988-12-09 1990-10-30 Transwitch Corporation System for cross-connecting high speed digital SONET signals
US5040170A (en) * 1988-12-09 1991-08-13 Transwitch Corporation System for cross-connecting high speed digital signals
US5014268A (en) * 1989-01-11 1991-05-07 Alcatel Na, Inc. Parallel time slot interchanger matrix and switch block module for use therewith

Also Published As

Publication number Publication date
EP0432678A1 (en) 1991-06-19
EP0432678B1 (en) 1996-03-06
CA2031935A1 (en) 1991-06-16
AU6787190A (en) 1991-06-20
DE69025724D1 (de) 1996-04-11
US5161152A (en) 1992-11-03
DE69025724T2 (de) 1996-08-08
ATE135148T1 (de) 1996-03-15
AU640184B2 (en) 1993-08-19
CA2031935C (en) 1994-07-19

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